1 /*- 2 * Copyright (c) 2012-2025 Patrick Kelsey. All rights reserved. 3 * Copyright (c) 2025 Ruslan Bukin <br@bsdpad.com> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * Portions of this software may have been developed with reference to 27 * the SD Simplified Specification. The following disclaimer may apply: 28 * 29 * The following conditions apply to the release of the simplified 30 * specification ("Simplified Specification") by the SD Card Association and 31 * the SD Group. The Simplified Specification is a subset of the complete SD 32 * Specification which is owned by the SD Card Association and the SD 33 * Group. This Simplified Specification is provided on a non-confidential 34 * basis subject to the disclaimers below. Any implementation of the 35 * Simplified Specification may require a license from the SD Card 36 * Association, SD Group, SD-3C LLC or other third parties. 37 * 38 * Disclaimers: 39 * 40 * The information contained in the Simplified Specification is presented only 41 * as a standard specification for SD Cards and SD Host/Ancillary products and 42 * is provided "AS-IS" without any representations or warranties of any 43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44 * Card Association for any damages, any infringements of patents or other 45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46 * parties, which may result from its use. No license is granted by 47 * implication, estoppel or otherwise under any patent or other rights of the 48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50 * or the SD Card Association to disclose or distribute any technical 51 * information, know-how or other confidential information to any third party. 52 * 53 * 54 * CRC routines adapted from public domain code written by Lammert Bies. 55 * 56 * 57 * This is an implementation of mmcbr that communicates with SD/MMC cards in 58 * SPI mode via spibus_if. In order to minimize changes to the existing 59 * MMC/SD stack (and allow for maximal reuse of the same), the behavior of 60 * the SD-bus command set is emulated as much as possible, where required. 61 * 62 * The SPI bus ownership behavior is to acquire the SPI bus for the entire 63 * duration that the MMC host is acquired. 64 * 65 * CRC checking is enabled by default, but can be disabled at runtime 66 * per-card via sysctl (e.g. sysctl dev.mmcspi.0.use_crc=0). 67 * 68 * Considered, but not implemented: 69 * - Card presence detection 70 * - Card power control 71 * - Detection of lock switch state on cards that have them 72 * - Yielding the CPU during long card busy cycles 73 * 74 * Originally developed and tested using a MicroTik RouterBOARD RB450G and 75 * 31 microSD cards available circa 2012. 76 */ 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/bus.h> 81 #include <sys/conf.h> 82 #include <sys/kernel.h> 83 #include <sys/lock.h> 84 #include <sys/module.h> 85 #include <sys/mutex.h> 86 #include <sys/resource.h> 87 #include <sys/sysctl.h> 88 89 #include <dev/mmc/bridge.h> 90 #include <dev/mmc/mmcreg.h> 91 #include <dev/mmc/mmcbrvar.h> 92 #include <dev/spibus/spi.h> 93 94 #include <dev/ofw/ofw_bus.h> 95 #include <dev/ofw/ofw_bus_subr.h> 96 97 #include "mmcbr_if.h" 98 #include "spibus_if.h" 99 100 #define MMCSPI_RETRIES 3 101 #define MMCSPI_TIMEOUT_SEC 3 102 103 #define MMCSPI_MAX_RSP_LEN 5 /* max length of an Rn response */ 104 #define MMCSPI_OCR_LEN 4 105 106 #define MMCSPI_DATA_BLOCK_LEN 512 107 #define MMCSPI_DATA_CRC_LEN 2 108 109 #define MMCSPI_POLL_LEN 8 /* amount to read when searching */ 110 111 #define MMCSPI_R1_MASK 0x80 /* mask used to search for R1 tokens */ 112 #define MMCSPI_R1_VALUE 0x00 /* value used to search for R1 tokens */ 113 #define MMCSPI_DR_MASK 0x11 /* mask used to search for data resp tokens */ 114 #define MMCSPI_DR_VALUE 0x01 /* value used to search for data resp tokens */ 115 116 #define MMCSPI_DR_ERR_MASK 0x0e 117 #define MMCSPI_DR_ERR_NONE 0x04 118 #define MMCSPI_DR_ERR_CRC 0x0a 119 #define MMCSPI_DR_ERR_WRITE 0x0c 120 121 #define MMCSPI_TOKEN_SB 0xfe /* start block token for read single, 122 read multi, and write single */ 123 #define MMCSPI_TOKEN_SB_WM 0xfc /* start block token for write multi */ 124 #define MMCSPI_TOKEN_ST 0xfd /* stop transmission token */ 125 #define MMCSPI_IS_DE_TOKEN(x) (0 == ((x) & 0xf0)) /* detector for data 126 error token */ 127 128 #define MMCSPI_R1_IDLE 0x01 129 #define MMCSPI_R1_ERASE_RST 0x02 130 #define MMCSPI_R1_ILL_CMD 0x04 131 #define MMCSPI_R1_CRC_ERR 0x08 132 #define MMCSPI_R1_ERASE_ERR 0x10 133 #define MMCSPI_R1_ADDR_ERR 0x20 134 #define MMCSPI_R1_PARAM_ERR 0x40 135 136 #define MMCSPI_R1_ERR_MASK (MMCSPI_R1_PARAM_ERR | MMCSPI_R1_ADDR_ERR | \ 137 MMCSPI_R1_ERASE_ERR | MMCSPI_R1_CRC_ERR | \ 138 MMCSPI_R1_ILL_CMD) 139 140 #define MMCSPI_R2_LOCKED 0x01 141 #define MMCSPI_R2_WP_ER_LCK 0x02 142 #define MMCSPI_R2_ERR 0x04 143 #define MMCSPI_R2_CC_ERR 0x08 144 #define MMCSPI_R2_ECC_FAIL 0x10 145 #define MMCSPI_R2_WP_VIOLATE 0x20 146 #define MMCSPI_R2_ERASE_PARAM 0x40 147 #define MMCSPI_R2_OOR_CSD_OW 0x80 148 149 /* commands that only apply to the SPI interface */ 150 #define MMCSPI_READ_OCR 58 151 #define MMCSPI_CRC_ON_OFF 59 152 153 static struct ofw_compat_data compat_data[] = { 154 { "mmc-spi-slot", 1 }, 155 { NULL, 0 } 156 }; 157 158 struct mmcspi_command { 159 struct mmc_command *mmc_cmd; /* command passed from mmc layer */ 160 uint32_t opcode; /* possibly translated opcode */ 161 uint32_t arg; /* possibly translated arg */ 162 uint32_t flags; /* possibly translated flags */ 163 uint32_t retries; /* possibly translated retry count */ 164 struct mmc_data *data; /* possibly redirected data segment */ 165 unsigned int error_mask; /* R1 errors check mask */ 166 unsigned char use_crc; /* do crc checking for this command */ 167 unsigned char rsp_type; /* SPI response type of this command */ 168 #define MMCSPI_RSP_R1 0 169 #define MMCSPI_RSP_R1B 1 170 #define MMCSPI_RSP_R2 2 171 #define MMCSPI_RSP_R3 3 172 #define MMCSPI_RSP_R7 4 173 unsigned char rsp_len; /* response len of this command */ 174 unsigned char mmc_rsp_type; /* MMC reponse type to translate to */ 175 #define MMCSPI_TO_MMC_RSP_NONE 0 176 #define MMCSPI_TO_MMC_RSP_R1 1 177 #define MMCSPI_TO_MMC_RSP_R1B 2 178 #define MMCSPI_TO_MMC_RSP_R2 3 179 #define MMCSPI_TO_MMC_RSP_R3 4 180 #define MMCSPI_TO_MMC_RSP_R6 5 181 #define MMCSPI_TO_MMC_RSP_R7 6 182 struct mmc_data ldata; /* local read data */ 183 }; 184 185 struct mmcspi_slot { 186 struct mmcspi_softc *sc; /* back pointer to parent bridge */ 187 device_t dev; /* mmc device for slot */ 188 boolean_t bus_busy; /* host has been acquired */ 189 struct mmc_host host; /* host parameters */ 190 struct mtx mtx; /* slot mutex */ 191 uint8_t last_ocr[MMCSPI_OCR_LEN]; /* ocr retrieved after CMD8 */ 192 uint32_t last_opcode; /* last opcode requested by mmc layer */ 193 uint32_t last_flags; /* last flags requested by mmc layer */ 194 unsigned int crc_enabled; /* crc checking is enabled */ 195 unsigned int crc_init_done; /* whether the initial crc setting has 196 been sent to the card */ 197 #define MMCSPI_MAX_LDATA_LEN 16 198 uint8_t ldata_buf[MMCSPI_MAX_LDATA_LEN]; 199 }; 200 201 struct mmcspi_softc { 202 device_t dev; /* this mmc bridge device */ 203 device_t busdev; 204 struct mmcspi_slot slot; 205 unsigned int use_crc; /* command CRC checking */ 206 }; 207 208 #if defined(MMCSPI_ENABLE_DEBUG_FUNCS) 209 static void mmcspi_dump_data(device_t dev, const char *label, uint8_t *data, 210 unsigned int len); 211 static void mmcspi_dump_spi_bus(device_t dev, unsigned int len); 212 #endif 213 214 #define MMCSPI_LOCK_SLOT(_slot) mtx_lock(&(_slot)->mtx) 215 #define MMCSPI_UNLOCK_SLOT(_slot) mtx_unlock(&(_slot)->mtx) 216 #define MMCSPI_SLOT_LOCK_INIT(_slot) mtx_init(&(_slot)->mtx, \ 217 "SD slot mtx", "mmcspi", MTX_DEF) 218 #define MMCSPI_SLOT_LOCK_DESTROY(_slot) mtx_destroy(&(_slot)->mtx); 219 #define MMCSPI_ASSERT_SLOT_LOCKED(_slot) mtx_assert(&(_slot)->mtx, \ 220 MA_OWNED); 221 #define MMCSPI_ASSERT_SLOT_UNLOCKED(_slot) mtx_assert(&(_slot)->mtx, \ 222 MA_NOTOWNED); 223 224 #define TRACE_ZONE_ENABLED(zone) (trace_zone_mask & TRACE_ZONE_##zone) 225 226 #define TRACE_ENTER(dev) \ 227 if (TRACE_ZONE_ENABLED(ENTER)) { \ 228 device_printf(dev, "%s: enter\n", __func__); \ 229 } 230 231 #define TRACE_EXIT(dev) \ 232 if (TRACE_ZONE_ENABLED(EXIT)) { \ 233 device_printf(dev, "%s: exit\n", __func__); \ 234 } 235 236 #define TRACE(dev, zone, ...) \ 237 if (TRACE_ZONE_ENABLED(zone)) { \ 238 device_printf(dev, __VA_ARGS__); \ 239 } 240 241 #define TRACE_ZONE_ENTER (1ul << 0) /* function entrance */ 242 #define TRACE_ZONE_EXIT (1ul << 1) /* function exit */ 243 #define TRACE_ZONE_ACTION (1ul << 2) /* for narrating major actions taken */ 244 #define TRACE_ZONE_RESULT (1ul << 3) /* for narrating results of actions */ 245 #define TRACE_ZONE_ERROR (1ul << 4) /* for reporting errors */ 246 #define TRACE_ZONE_DATA (1ul << 5) /* for dumping bus data */ 247 #define TRACE_ZONE_DETAILS (1ul << 6) /* for narrating minor actions/results */ 248 249 #define TRACE_ZONE_NONE 0 250 #define TRACE_ZONE_ALL 0xffffffff 251 252 #define CRC7_INITIAL 0x00 253 #define CRC16_INITIAL 0x0000 254 255 SYSCTL_NODE(_hw, OID_AUTO, mmcspi, CTLFLAG_RD, 0, "mmcspi driver"); 256 257 static unsigned int trace_zone_mask = TRACE_ZONE_ERROR; 258 259 static uint8_t crc7tab[256]; 260 static uint16_t crc16tab[256]; 261 static uint8_t onesbuf[MMCSPI_DATA_BLOCK_LEN]; /* for driving the tx line 262 when receiving */ 263 static uint8_t junkbuf[MMCSPI_DATA_BLOCK_LEN]; /* for receiving data when 264 transmitting */ 265 266 static uint8_t 267 update_crc7(uint8_t crc, uint8_t *buf, unsigned int len) 268 { 269 uint8_t tmp; 270 int i; 271 272 for (i = 0; i < len; i++) { 273 tmp = (crc << 1) ^ buf[i]; 274 crc = crc7tab[tmp]; 275 } 276 277 return (crc); 278 } 279 280 static uint16_t 281 update_crc16(uint16_t crc, uint8_t *buf, unsigned int len) 282 { 283 uint16_t tmp, c16; 284 int i; 285 286 for (i = 0; i < len; i++) { 287 c16 = 0x00ff & (uint16_t)buf[i]; 288 289 tmp = (crc >> 8) ^ c16; 290 crc = (crc << 8) ^ crc16tab[tmp]; 291 } 292 293 return (crc); 294 } 295 296 static void 297 init_crc7tab(void) 298 { 299 #define P_CRC7 0x89 300 301 int i, j; 302 uint8_t crc, c; 303 304 for (i = 0; i < 256; i++) { 305 306 c = (uint8_t)i; 307 crc = (c & 0x80) ? c ^ P_CRC7 : c; 308 309 for (j=1; j<8; j++) { 310 crc = crc << 1; 311 312 if (crc & 0x80) 313 crc = crc ^ P_CRC7; 314 } 315 316 crc7tab[i] = crc; 317 } 318 } 319 320 static void 321 init_crc16tab(void) 322 { 323 #define P_CCITT 0x1021 324 325 int i, j; 326 uint16_t crc, c; 327 328 for (i = 0; i < 256; i++) { 329 330 crc = 0; 331 c = ((uint16_t) i) << 8; 332 333 for (j=0; j<8; j++) { 334 335 if ((crc ^ c) & 0x8000) crc = ( crc << 1 ) ^ P_CCITT; 336 else crc = crc << 1; 337 338 c = c << 1; 339 } 340 341 crc16tab[i] = crc; 342 } 343 } 344 345 static void 346 mmcspi_slot_init(device_t brdev, struct mmcspi_slot *slot) 347 { 348 struct mmcspi_softc *sc; 349 350 TRACE_ENTER(brdev); 351 352 sc = device_get_softc(brdev); 353 354 slot->sc = sc; 355 slot->dev = NULL; /* will get real value when card is added */ 356 slot->bus_busy = false; 357 slot->host.f_min = 100000; /* this should be as low as we need to go 358 for any card */ 359 slot->host.caps = 0; 360 /* SPI mode requires 3.3V operation */ 361 slot->host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; 362 363 MMCSPI_SLOT_LOCK_INIT(slot); 364 365 TRACE_EXIT(brdev); 366 } 367 368 static void 369 mmcspi_slot_fini(device_t brdev, struct mmcspi_slot *slot) 370 { 371 TRACE_ENTER(brdev); 372 373 MMCSPI_SLOT_LOCK_DESTROY(slot); 374 375 TRACE_EXIT(brdev); 376 } 377 378 static void 379 mmcspi_card_add(struct mmcspi_slot *slot) 380 { 381 device_t brdev; 382 device_t child; 383 384 brdev = slot->sc->dev; 385 386 TRACE_ENTER(brdev); 387 388 child = device_add_child(brdev, "mmc", DEVICE_UNIT_ANY); 389 390 MMCSPI_LOCK_SLOT(slot); 391 slot->dev = child; 392 device_set_ivars(slot->dev, slot); 393 MMCSPI_UNLOCK_SLOT(slot); 394 395 device_probe_and_attach(slot->dev); 396 397 TRACE_EXIT(brdev); 398 } 399 400 static void 401 mmcspi_card_delete(struct mmcspi_slot *slot) 402 { 403 device_t brdev; 404 device_t dev; 405 406 brdev = slot->sc->dev; 407 408 TRACE_ENTER(brdev); 409 410 MMCSPI_LOCK_SLOT(slot); 411 dev = slot->dev; 412 slot->dev = NULL; 413 MMCSPI_UNLOCK_SLOT(slot); 414 device_delete_child(brdev, dev); 415 416 TRACE_EXIT(brdev); 417 } 418 419 static int 420 mmcspi_probe(device_t dev) 421 { 422 423 if (!ofw_bus_status_okay(dev)) 424 return (ENXIO); 425 426 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 427 return (ENXIO); 428 429 device_set_desc(dev, "MMC SPI mode controller"); 430 431 return (BUS_PROBE_DEFAULT); 432 } 433 434 static int 435 mmcspi_attach(device_t dev) 436 { 437 struct mmcspi_softc *sc; 438 struct sysctl_ctx_list *ctx; 439 struct sysctl_oid *tree; 440 struct sysctl_oid_list *child; 441 442 TRACE_ENTER(dev); 443 444 sc = device_get_softc(dev); 445 ctx = device_get_sysctl_ctx(dev); 446 tree = device_get_sysctl_tree(dev); 447 child = SYSCTL_CHILDREN(tree); 448 449 sc->dev = dev; 450 sc->busdev = device_get_parent(dev); 451 sc->use_crc = 1; 452 453 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "use_crc", CTLFLAG_RW, 454 &sc->use_crc, sizeof(sc->use_crc), "Enable/disable crc checking"); 455 456 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "trace_mask", CTLFLAG_RW, 457 &trace_zone_mask, sizeof(trace_zone_mask), "Bitmask for adjusting " 458 "trace messages"); 459 460 mmcspi_slot_init(dev, &sc->slot); 461 462 /* XXX trigger this from card insert detection */ 463 mmcspi_card_add(&sc->slot); 464 465 TRACE_EXIT(dev); 466 467 return (0); 468 } 469 470 static int 471 mmcspi_detach(device_t dev) 472 { 473 struct mmcspi_softc *sc; 474 475 TRACE_ENTER(dev); 476 477 sc = device_get_softc(dev); 478 479 /* XXX trigger this from card removal detection */ 480 mmcspi_card_delete(&sc->slot); 481 482 mmcspi_slot_fini(dev, &sc->slot); 483 484 TRACE_EXIT(dev); 485 486 return (0); 487 } 488 489 static int 490 mmcspi_suspend(device_t dev) 491 { 492 int err; 493 494 TRACE_ENTER(dev); 495 err = bus_generic_suspend(dev); 496 if (err) { 497 TRACE_EXIT(dev); 498 return (err); 499 } 500 TRACE_EXIT(dev); 501 502 return (0); 503 } 504 505 static int 506 mmcspi_resume(device_t dev) 507 { 508 int err; 509 510 TRACE_ENTER(dev); 511 err = bus_generic_resume(dev); 512 if (err) { 513 TRACE_EXIT(dev); 514 return (err); 515 } 516 TRACE_EXIT(dev); 517 518 return (0); 519 } 520 521 static int 522 mmcspi_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 523 { 524 struct mmcspi_slot *slot; 525 526 TRACE_ENTER(bus); 527 528 slot = device_get_ivars(child); 529 530 switch (which) { 531 case MMCBR_IVAR_BUS_TYPE: 532 *result = bus_type_spi; 533 break; 534 case MMCBR_IVAR_BUS_MODE: 535 *result = slot->host.ios.bus_mode; 536 break; 537 case MMCBR_IVAR_BUS_WIDTH: 538 *result = slot->host.ios.bus_width; 539 break; 540 case MMCBR_IVAR_CHIP_SELECT: 541 *result = slot->host.ios.chip_select; 542 break; 543 case MMCBR_IVAR_CLOCK: 544 *result = slot->host.ios.clock; 545 break; 546 case MMCBR_IVAR_F_MIN: 547 *result = slot->host.f_min; 548 break; 549 case MMCBR_IVAR_F_MAX: 550 *result = slot->host.f_max; 551 break; 552 case MMCBR_IVAR_HOST_OCR: 553 *result = slot->host.host_ocr; 554 break; 555 case MMCBR_IVAR_MODE: 556 *result = slot->host.mode; 557 break; 558 case MMCBR_IVAR_OCR: 559 *result = slot->host.ocr; 560 break; 561 case MMCBR_IVAR_POWER_MODE: 562 *result = slot->host.ios.power_mode; 563 break; 564 case MMCBR_IVAR_VDD: 565 *result = slot->host.ios.vdd; 566 break; 567 case MMCBR_IVAR_VCCQ: 568 *result = slot->host.ios.vccq; 569 break; 570 case MMCBR_IVAR_CAPS: 571 *result = slot->host.caps; 572 break; 573 case MMCBR_IVAR_TIMING: 574 *result = slot->host.ios.timing; 575 break; 576 case MMCBR_IVAR_MAX_DATA: 577 /* seems reasonable, not dictated by anything */ 578 *result = 64 * 1024; 579 break; 580 default: 581 return (EINVAL); 582 } 583 584 TRACE_EXIT(bus); 585 586 return (0); 587 } 588 589 static int 590 mmcspi_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 591 { 592 struct mmcspi_slot *slot; 593 594 TRACE_ENTER(bus); 595 596 slot = device_get_ivars(child); 597 598 switch (which) { 599 default: 600 return (EINVAL); 601 case MMCBR_IVAR_BUS_MODE: 602 slot->host.ios.bus_mode = value; 603 break; 604 case MMCBR_IVAR_BUS_WIDTH: 605 slot->host.ios.bus_width = value; 606 break; 607 case MMCBR_IVAR_CLOCK: 608 slot->host.ios.clock = value; 609 break; 610 case MMCBR_IVAR_CHIP_SELECT: 611 slot->host.ios.chip_select = value; 612 break; 613 case MMCBR_IVAR_MODE: 614 slot->host.mode = value; 615 break; 616 case MMCBR_IVAR_OCR: 617 slot->host.ocr = value; 618 break; 619 case MMCBR_IVAR_POWER_MODE: 620 slot->host.ios.power_mode = value; 621 break; 622 case MMCBR_IVAR_VDD: 623 slot->host.ios.vdd = value; 624 break; 625 case MMCBR_IVAR_VCCQ: 626 slot->host.ios.vccq = value; 627 break; 628 case MMCBR_IVAR_TIMING: 629 slot->host.ios.timing = value; 630 break; 631 case MMCBR_IVAR_BUS_TYPE: 632 case MMCBR_IVAR_CAPS: 633 case MMCBR_IVAR_HOST_OCR: 634 case MMCBR_IVAR_F_MIN: 635 case MMCBR_IVAR_F_MAX: 636 case MMCBR_IVAR_MAX_DATA: 637 return (EINVAL); 638 } 639 TRACE_EXIT(bus); 640 641 return (0); 642 } 643 644 static unsigned int 645 mmcspi_do_spi_read(device_t dev, uint8_t *data, unsigned int len) 646 { 647 struct spi_command spi_cmd; 648 struct mmcspi_softc *sc; 649 int err; 650 651 TRACE_ENTER(dev); 652 653 sc = device_get_softc(dev); 654 655 spi_cmd.tx_cmd = onesbuf; 656 spi_cmd.rx_cmd = data; 657 spi_cmd.tx_cmd_sz = len; 658 spi_cmd.rx_cmd_sz = len; 659 spi_cmd.tx_data = NULL; 660 spi_cmd.rx_data = NULL; 661 spi_cmd.tx_data_sz = 0; 662 spi_cmd.rx_data_sz = 0; 663 664 err = SPIBUS_TRANSFER(sc->busdev, sc->dev, &spi_cmd); 665 666 #ifdef DEBUG_RX 667 int i; 668 if (err == 0) { 669 printf("rx val: "); 670 for (i = 0; i < len; i++) 671 printf("%x ", data[i]); 672 printf("\n"); 673 } 674 #endif 675 676 TRACE_EXIT(dev); 677 678 return (err ? MMC_ERR_FAILED : MMC_ERR_NONE); 679 } 680 681 static unsigned int 682 mmcspi_do_spi_write(device_t dev, uint8_t *cmd, unsigned int cmdlen, 683 uint8_t *data, unsigned int datalen) 684 { 685 struct mmcspi_softc *sc; 686 struct spi_command spi_cmd; 687 int err; 688 689 TRACE_ENTER(dev); 690 691 sc = device_get_softc(dev); 692 693 spi_cmd.tx_cmd = cmd; 694 spi_cmd.rx_cmd = junkbuf; 695 spi_cmd.tx_cmd_sz = cmdlen; 696 spi_cmd.rx_cmd_sz = cmdlen; 697 spi_cmd.tx_data = data; 698 spi_cmd.rx_data = junkbuf; 699 spi_cmd.tx_data_sz = datalen; 700 spi_cmd.rx_data_sz = datalen; 701 702 err = SPIBUS_TRANSFER(sc->busdev, sc->dev, &spi_cmd); 703 704 TRACE_EXIT(dev); 705 706 return (err ? MMC_ERR_FAILED : MMC_ERR_NONE); 707 } 708 709 static unsigned int 710 mmcspi_wait_for_not_busy(device_t dev) 711 { 712 unsigned int busy_length; 713 uint8_t pollbuf[MMCSPI_POLL_LEN]; 714 struct bintime start, elapsed; 715 unsigned int err; 716 int i; 717 718 busy_length = 0; 719 720 TRACE_ENTER(dev); 721 TRACE(dev, ACTION, "waiting for not busy\n"); 722 723 getbintime(&start); 724 do { 725 TRACE(dev, DETAILS, "looking for end of busy\n"); 726 err = mmcspi_do_spi_read(dev, pollbuf, MMCSPI_POLL_LEN); 727 if (MMC_ERR_NONE != err) { 728 TRACE(dev, ERROR, "spi read failed\n"); 729 TRACE_EXIT(dev); 730 return (err); 731 } 732 733 for (i = 0; i < MMCSPI_POLL_LEN; i++) { 734 if (pollbuf[i] != 0x00) { 735 TRACE(dev, DETAILS, 736 "end of busy found at %d\n", i); 737 break; 738 } 739 busy_length++; 740 } 741 742 getbintime(&elapsed); 743 bintime_sub(&elapsed, &start); 744 745 if (elapsed.sec > MMCSPI_TIMEOUT_SEC) { 746 TRACE(dev, ERROR, "card busy timeout\n"); 747 return (MMC_ERR_TIMEOUT); 748 } 749 } while (MMCSPI_POLL_LEN == i); 750 751 TRACE(dev, RESULT, "busy for %u byte slots\n", busy_length); 752 TRACE_EXIT(dev); 753 754 return (MMC_ERR_NONE); 755 } 756 757 static int 758 mmcspi_update_ios(device_t brdev, device_t reqdev) 759 { 760 struct mmcspi_softc *sc; 761 struct mmcspi_slot *slot; 762 struct spi_command spi_cmd; 763 764 TRACE_ENTER(brdev); 765 766 sc = device_get_softc(brdev); 767 slot = device_get_ivars(reqdev); 768 769 if (power_up == slot->host.ios.power_mode) { 770 /* 771 * This sequence provides the initialization steps required 772 * by the spec after card power is applied, but before any 773 * commands are issued. These operations are harmless if 774 * applied at any other time (after a warm reset, for 775 * example). 776 */ 777 778 /* 779 * XXX Power-on portion of implementation of card power 780 * control should go here. Should probably include a power 781 * off first to ensure card is fully reset from any previous 782 * state. 783 */ 784 785 /* 786 * Make sure power to card has ramped up. The spec requires 787 * power to ramp up in 35ms or less. 788 */ 789 DELAY(35000); 790 791 /* 792 * Provide at least 74 clocks with CS and MOSI high that the 793 * spec requires after card power stabilizes. 794 */ 795 796 spi_cmd.tx_cmd = onesbuf; 797 spi_cmd.tx_cmd_sz = 10; 798 spi_cmd.rx_cmd = junkbuf; 799 spi_cmd.rx_cmd_sz = 10; 800 spi_cmd.tx_data = NULL; 801 spi_cmd.rx_data = NULL; 802 spi_cmd.tx_data_sz = 0; 803 spi_cmd.rx_data_sz = 0; 804 805 SPIBUS_TRANSFER(sc->busdev, sc->dev, &spi_cmd); 806 807 /* 808 * Perhaps this was a warm reset and the card is in the 809 * middle of a long operation. 810 */ 811 mmcspi_wait_for_not_busy(brdev); 812 813 slot->last_opcode = 0xffffffff; 814 slot->last_flags = 0; 815 memset(slot->last_ocr, 0, MMCSPI_OCR_LEN); 816 slot->crc_enabled = 0; 817 slot->crc_init_done = 0; 818 } 819 820 if (power_off == slot->host.ios.power_mode) { 821 /* 822 * XXX Power-off portion of implementation of card power 823 * control should go here. 824 */ 825 } 826 827 TRACE_EXIT(brdev); 828 829 return (0); 830 } 831 832 static unsigned int 833 mmcspi_shift_copy(uint8_t *dest, uint8_t *src, unsigned int dest_len, 834 unsigned int shift) 835 { 836 unsigned int i; 837 838 if (0 == shift) 839 memcpy(dest, src, dest_len); 840 else { 841 for (i = 0; i < dest_len; i++) { 842 dest[i] = 843 (src[i] << shift) | 844 (src[i + 1] >> (8 - shift)); 845 } 846 } 847 848 return (dest_len); 849 } 850 851 static unsigned int 852 mmcspi_get_response_token(device_t dev, uint8_t mask, uint8_t value, 853 unsigned int len, unsigned int has_busy, uint8_t *rspbuf) 854 { 855 uint8_t pollbuf[2 * MMCSPI_MAX_RSP_LEN]; 856 struct bintime start, elapsed; 857 boolean_t found; 858 unsigned int err; 859 unsigned int offset; 860 unsigned int shift = 0; 861 unsigned int remaining; 862 uint16_t search_space; 863 uint16_t search_mask; 864 uint16_t search_value; 865 int i; 866 867 TRACE_ENTER(dev); 868 869 /* 870 * This loop searches data clocked out of the card for a response 871 * token matching the given mask and value. It will locate tokens 872 * that are not byte-aligned, as some cards send non-byte-aligned 873 * response tokens in some situations. For example, the following 874 * card consistently sends an unaligned response token to the stop 875 * command used to terminate multi-block reads: 876 * 877 * Transcend 2GB SDSC card, cid: 878 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 879 */ 880 881 offset = 0; 882 found = false; 883 getbintime(&start); 884 do { 885 TRACE(dev, DETAILS, "looking for response token with " 886 "mask 0x%02x, value 0x%02x\n", mask, value); 887 err = mmcspi_do_spi_read(dev, &pollbuf[offset], len); 888 if (MMC_ERR_NONE != err) { 889 TRACE(dev, ERROR, "spi read of resp token failed\n"); 890 TRACE_EXIT(dev); 891 return (err); 892 } 893 894 for (i = 0; i < len + offset; i++) { 895 if ((pollbuf[i] & mask) == value) { 896 TRACE(dev, DETAILS, "response token found at " 897 "%d (0x%02x)\n", i, pollbuf[i]); 898 shift = 0; 899 found = true; 900 break; 901 } else if (i < len + offset - 1) { 902 /* 903 * Not the last byte in the buffer, so check 904 * for a non-aligned response. 905 */ 906 search_space = ((uint16_t)pollbuf[i] << 8) | 907 pollbuf[i + 1]; 908 search_mask = (uint16_t)mask << 8; 909 search_value = (uint16_t)value << 8; 910 911 TRACE(dev, DETAILS, "search: space=0x%04x " 912 " mask=0x%04x val=0x%04x\n", search_space, 913 search_mask, search_value); 914 915 for (shift = 1; shift < 8; shift++) { 916 search_space <<= 1; 917 if ((search_space & search_mask) == 918 search_value) { 919 found = true; 920 TRACE(dev, DETAILS, "Found mat" 921 "ch at shift %u\n", shift); 922 break; 923 } 924 } 925 926 if (shift < 8) 927 break; 928 } else { 929 /* 930 * Move the last byte to the first position 931 * and go 'round again. 932 */ 933 pollbuf[0] = pollbuf[i]; 934 } 935 } 936 937 if (!found) { 938 offset = 1; 939 940 getbintime(&elapsed); 941 bintime_sub(&elapsed, &start); 942 943 if (elapsed.sec > MMCSPI_TIMEOUT_SEC) { 944 TRACE(dev, ERROR, "timeout while looking for " 945 "response token\n"); 946 return (MMC_ERR_TIMEOUT); 947 } 948 } 949 } while (!found); 950 951 /* 952 * Note that if i == 0 and offset == 1, shift is always greater than 953 * zero. 954 */ 955 remaining = i - offset + (shift ? 1 : 0); 956 957 TRACE(dev, DETAILS, "len=%u i=%u rem=%u shift=%u\n", 958 len, i, remaining, shift); 959 960 if (remaining) { 961 err = mmcspi_do_spi_read(dev, &pollbuf[len + offset], 962 remaining); 963 if (MMC_ERR_NONE != err) { 964 TRACE(dev, ERROR, "spi read of remainder of response " 965 "token failed\n"); 966 TRACE_EXIT(dev); 967 return (err); 968 } 969 } 970 971 mmcspi_shift_copy(rspbuf, &pollbuf[i], len, shift); 972 973 if (TRACE_ZONE_ENABLED(RESULT)) { 974 TRACE(dev, RESULT, "response ="); 975 for (i = 0; i < len; i++) 976 printf(" 0x%02x", rspbuf[i]); 977 printf("\n"); 978 } 979 980 if (has_busy) { 981 err = mmcspi_wait_for_not_busy(dev); 982 if (MMC_ERR_NONE != err) { 983 TRACE_EXIT(dev); 984 return (err); 985 } 986 } 987 988 TRACE_EXIT(dev); 989 990 return (MMC_ERR_NONE); 991 } 992 993 static unsigned int 994 mmcspi_set_up_command(device_t dev, struct mmcspi_command *mmcspi_cmd, 995 struct mmc_command *mmc_cmd) 996 { 997 struct mmcspi_softc *sc; 998 struct mmcspi_slot *slot; 999 uint32_t opcode; 1000 uint32_t arg; 1001 uint32_t flags; 1002 uint32_t retries; 1003 unsigned char rsp_type; 1004 unsigned char rsp_len; 1005 unsigned char mmc_rsp_type; 1006 unsigned int ldata_len = 0; 1007 unsigned int use_crc; 1008 1009 sc = device_get_softc(dev); 1010 slot = &sc->slot; 1011 use_crc = slot->crc_enabled; 1012 1013 opcode = mmc_cmd->opcode; 1014 arg = mmc_cmd->arg; 1015 flags = mmc_cmd->flags; 1016 retries = mmc_cmd->retries; 1017 1018 if (flags & MMC_CMD_IS_APP) { 1019 switch (opcode) { 1020 case ACMD_SD_STATUS: 1021 rsp_type = MMCSPI_RSP_R2; 1022 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R1; 1023 break; 1024 case ACMD_SEND_NUM_WR_BLOCKS: 1025 case ACMD_SET_WR_BLK_ERASE_COUNT: 1026 case ACMD_SET_CLR_CARD_DETECT: 1027 case ACMD_SEND_SCR: 1028 rsp_type = MMCSPI_RSP_R1; 1029 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R1; 1030 break; 1031 case ACMD_SD_SEND_OP_COND: 1032 /* only HCS bit is valid in spi mode */ 1033 arg &= 0x40000000; 1034 rsp_type = MMCSPI_RSP_R1; 1035 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R3; 1036 break; 1037 default: 1038 TRACE(dev, ERROR, "Invalid app command opcode %u\n", 1039 opcode); 1040 return (MMC_ERR_INVALID); 1041 } 1042 } else { 1043 switch (opcode) { 1044 case MMC_GO_IDLE_STATE: 1045 use_crc = 1; 1046 rsp_type = MMCSPI_RSP_R1; 1047 mmc_rsp_type = MMCSPI_TO_MMC_RSP_NONE; 1048 break; 1049 1050 case MMC_SEND_OP_COND: 1051 case MMC_SWITCH_FUNC: /* also SD_SWITCH_FUNC */ 1052 case MMC_SET_BLOCKLEN: 1053 case MMC_READ_SINGLE_BLOCK: 1054 case MMC_READ_MULTIPLE_BLOCK: 1055 case MMC_WRITE_BLOCK: 1056 case MMC_WRITE_MULTIPLE_BLOCK: 1057 case MMC_PROGRAM_CSD: 1058 case MMC_SEND_WRITE_PROT: 1059 case SD_ERASE_WR_BLK_START: 1060 case SD_ERASE_WR_BLK_END: 1061 case MMC_LOCK_UNLOCK: 1062 case MMC_GEN_CMD: 1063 rsp_type = MMCSPI_RSP_R1; 1064 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R1; 1065 break; 1066 case MMCSPI_CRC_ON_OFF: 1067 rsp_type = MMCSPI_RSP_R1; 1068 mmc_rsp_type = MMCSPI_TO_MMC_RSP_NONE; 1069 break; 1070 1071 case MMC_SEND_CSD: 1072 case MMC_SEND_CID: 1073 arg = 0; /* no rca in spi mode */ 1074 rsp_type = MMCSPI_RSP_R1; 1075 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R2; 1076 ldata_len = 16; 1077 break; 1078 1079 case MMC_APP_CMD: 1080 arg = 0; /* no rca in spi mode */ 1081 rsp_type = MMCSPI_RSP_R1; 1082 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R1; 1083 break; 1084 1085 case MMC_STOP_TRANSMISSION: 1086 case MMC_SET_WRITE_PROT: 1087 case MMC_CLR_WRITE_PROT: 1088 case MMC_ERASE: 1089 rsp_type = MMCSPI_RSP_R1B; 1090 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R1B; 1091 break; 1092 1093 case MMC_ALL_SEND_CID: 1094 /* handle MMC_ALL_SEND_CID as MMC_SEND_CID */ 1095 opcode = MMC_SEND_CID; 1096 rsp_type = MMCSPI_RSP_R1; 1097 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R2; 1098 ldata_len = 16; 1099 break; 1100 1101 case MMC_SEND_STATUS: 1102 arg = 0; /* no rca in spi mode */ 1103 rsp_type = MMCSPI_RSP_R2; 1104 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R1; 1105 break; 1106 1107 1108 case MMCSPI_READ_OCR: 1109 rsp_type = MMCSPI_RSP_R3; 1110 mmc_rsp_type = MMCSPI_TO_MMC_RSP_NONE; 1111 break; 1112 1113 case SD_SEND_RELATIVE_ADDR: 1114 /* 1115 * Handle SD_SEND_RELATIVE_ADDR as MMC_SEND_STATUS - 1116 * the rca returned to the caller will always be 0. 1117 */ 1118 opcode = MMC_SEND_STATUS; 1119 rsp_type = MMCSPI_RSP_R2; 1120 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R6; 1121 break; 1122 1123 case SD_SEND_IF_COND: 1124 use_crc = 1; 1125 rsp_type = MMCSPI_RSP_R7; 1126 mmc_rsp_type = MMCSPI_TO_MMC_RSP_R7; 1127 break; 1128 1129 default: 1130 TRACE(dev, ERROR, "Invalid cmd opcode %u\n", opcode); 1131 return (MMC_ERR_INVALID); 1132 } 1133 } 1134 1135 switch (rsp_type) { 1136 case MMCSPI_RSP_R1: 1137 case MMCSPI_RSP_R1B: 1138 rsp_len = 1; 1139 break; 1140 case MMCSPI_RSP_R2: 1141 rsp_len = 2; 1142 break; 1143 case MMCSPI_RSP_R3: 1144 case MMCSPI_RSP_R7: 1145 rsp_len = 5; 1146 break; 1147 default: 1148 TRACE(dev, ERROR, "Unknown response type %u\n", rsp_type); 1149 return (MMC_ERR_INVALID); 1150 } 1151 1152 mmcspi_cmd->mmc_cmd = mmc_cmd; 1153 mmcspi_cmd->opcode = opcode; 1154 mmcspi_cmd->arg = arg; 1155 mmcspi_cmd->flags = flags; 1156 mmcspi_cmd->retries = retries; 1157 mmcspi_cmd->use_crc = use_crc; 1158 mmcspi_cmd->error_mask = MMCSPI_R1_ERR_MASK; 1159 if (!mmcspi_cmd->use_crc) 1160 mmcspi_cmd->error_mask &= ~MMCSPI_R1_CRC_ERR; 1161 mmcspi_cmd->rsp_type = rsp_type; 1162 mmcspi_cmd->rsp_len = rsp_len; 1163 mmcspi_cmd->mmc_rsp_type = mmc_rsp_type; 1164 1165 memset(&mmcspi_cmd->ldata, 0, sizeof(struct mmc_data)); 1166 mmcspi_cmd->ldata.len = ldata_len; 1167 if (ldata_len) { 1168 mmcspi_cmd->ldata.data = sc->slot.ldata_buf; 1169 mmcspi_cmd->ldata.flags = MMC_DATA_READ; 1170 1171 mmcspi_cmd->data = &mmcspi_cmd->ldata; 1172 } else 1173 mmcspi_cmd->data = mmc_cmd->data; 1174 1175 return (MMC_ERR_NONE); 1176 } 1177 1178 static unsigned int 1179 mmcspi_send_cmd(device_t dev, struct mmcspi_command *cmd, uint8_t *rspbuf) 1180 { 1181 unsigned int err; 1182 uint32_t opcode; 1183 uint32_t arg; 1184 uint8_t txbuf[8]; 1185 uint8_t crc; 1186 1187 TRACE_ENTER(dev); 1188 1189 opcode = cmd->opcode; 1190 arg = cmd->arg; 1191 1192 TRACE(dev, ACTION, "sending %sMD%u(0x%08x)\n", 1193 cmd->flags & MMC_CMD_IS_APP ? "AC": "C", opcode, arg); 1194 1195 /* 1196 * Sending this byte ahead of each command prevents some cards from 1197 * responding with unaligned data, and doesn't bother the others. 1198 * Examples: 1199 * 1200 * Sandisk 32GB SDHC card, cid: 1201 * mid=0x03 oid=0x5344 pnm="SU32G" prv=8.0 mdt=00.2000 1202 */ 1203 txbuf[0] = 0xff; 1204 1205 txbuf[1] = 0x40 | (opcode & 0x3f); 1206 txbuf[2] = arg >> 24; 1207 txbuf[3] = (arg >> 16) & 0xff; 1208 txbuf[4] = (arg >> 8) & 0xff; 1209 txbuf[5] = arg & 0xff; 1210 1211 if (cmd->use_crc) 1212 crc = update_crc7(CRC7_INITIAL, &txbuf[1], 5); 1213 else 1214 crc = 0; 1215 1216 txbuf[6] = (crc << 1) | 0x01; 1217 1218 /* 1219 * Some cards have garbage on the bus in the first byte slot after 1220 * the last command byte. This seems to be common with the stop 1221 * command. Clocking out an extra byte with the command will 1222 * result in that data not being searched for the response token, 1223 * which is ok, because no cards respond that fast. 1224 */ 1225 txbuf[7] = 0xff; 1226 1227 err = mmcspi_do_spi_write(dev, txbuf, sizeof(txbuf), NULL, 0); 1228 if (MMC_ERR_NONE != err) { 1229 TRACE(dev, ERROR, "spi write of command failed\n"); 1230 TRACE_EXIT(dev); 1231 return (err); 1232 } 1233 1234 TRACE(dev, DETAILS, 1235 "rx cmd bytes 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", 1236 junkbuf[0], junkbuf[1], junkbuf[2], junkbuf[3], junkbuf[4], 1237 junkbuf[5] ); 1238 TRACE(dev, DETAILS, "skipped response byte is 0x%02x\n", junkbuf[6]); 1239 1240 err = mmcspi_get_response_token(dev, MMCSPI_R1_MASK, MMCSPI_R1_VALUE, 1241 cmd->rsp_len, MMCSPI_RSP_R1B == cmd->rsp_type, rspbuf); 1242 1243 if (MMC_ERR_NONE == err) { 1244 if (rspbuf[0] & cmd->error_mask & MMCSPI_R1_CRC_ERR) 1245 err = MMC_ERR_BADCRC; 1246 else if (rspbuf[0] & cmd->error_mask) 1247 err = MMC_ERR_INVALID; 1248 } 1249 1250 TRACE_EXIT(dev); 1251 1252 return (err); 1253 } 1254 1255 static unsigned int 1256 mmcspi_read_block(device_t dev, uint8_t *data, unsigned int len, 1257 unsigned int check_crc16, unsigned int check_crc7) 1258 { 1259 struct bintime start; 1260 struct bintime elapsed; 1261 unsigned int non_token_bytes; 1262 unsigned int data_captured; 1263 unsigned int crc_captured; 1264 unsigned int pollbufpos; 1265 unsigned int crc16_mismatch; 1266 unsigned int err; 1267 uint16_t crc16, computed_crc16; 1268 uint8_t crc7, computed_crc7; 1269 uint8_t pollbuf[MMCSPI_POLL_LEN]; 1270 uint8_t crcbuf[MMCSPI_DATA_CRC_LEN]; 1271 int i; 1272 1273 crc16_mismatch = 0; 1274 1275 TRACE_ENTER(dev); 1276 TRACE(dev, ACTION, "read block(%u)\n", len); 1277 1278 /* 1279 * With this approach, we could pointlessly read up to 1280 * (MMCSPI_POLL_LEN - 3 - len) bytes from the spi bus, but only in 1281 * the odd situation where MMCSPI_POLL_LEN is greater than len + 3. 1282 */ 1283 getbintime(&start); 1284 do { 1285 TRACE(dev, DETAILS, "looking for read token\n"); 1286 err = mmcspi_do_spi_read(dev, pollbuf, MMCSPI_POLL_LEN); 1287 if (MMC_ERR_NONE != err) { 1288 TRACE(dev, ERROR, "token read on spi failed\n"); 1289 TRACE_EXIT(dev); 1290 return (err); 1291 } 1292 1293 for (i = 0; i < MMCSPI_POLL_LEN; i++) { 1294 if (MMCSPI_TOKEN_SB == pollbuf[i]) { 1295 TRACE(dev, RESULT, 1296 "found start block token at %d\n", i); 1297 break; 1298 } else if (MMCSPI_IS_DE_TOKEN(pollbuf[i])) { 1299 TRACE(dev, ERROR, 1300 "found data error token at %d\n", i); 1301 TRACE_EXIT(dev); 1302 return (MMC_ERR_FAILED); 1303 } 1304 } 1305 1306 getbintime(&elapsed); 1307 bintime_sub(&elapsed, &start); 1308 1309 if (elapsed.sec > MMCSPI_TIMEOUT_SEC) { 1310 TRACE(dev, ERROR, "timeout while looking for read " 1311 "token\n"); 1312 return (MMC_ERR_TIMEOUT); 1313 } 1314 } while (MMCSPI_POLL_LEN == i); 1315 1316 /* copy any data captured in tail of poll buf to data buf */ 1317 non_token_bytes = MMCSPI_POLL_LEN - i - 1; 1318 data_captured = min(non_token_bytes, len); 1319 crc_captured = non_token_bytes - data_captured; 1320 pollbufpos = i + 1; 1321 1322 TRACE(dev, DETAILS, "data bytes captured in pollbuf = %u\n", 1323 data_captured); 1324 1325 memcpy(data, &pollbuf[pollbufpos], data_captured); 1326 pollbufpos += data_captured; 1327 1328 TRACE(dev, DETAILS, "data bytes to read = %u, crc_captured = %u\n", 1329 len - data_captured, crc_captured); 1330 1331 /* get any remaining data from the spi bus */ 1332 if (data_captured < len) { 1333 err = mmcspi_do_spi_read(dev, &data[data_captured], 1334 len - data_captured); 1335 if (MMC_ERR_NONE != err) { 1336 TRACE(dev, ERROR, 1337 "spi read of remainder of block failed\n"); 1338 TRACE_EXIT(dev); 1339 return (err); 1340 } 1341 } 1342 1343 /* copy any crc captured in the poll buf to the crc buf */ 1344 memcpy(crcbuf, &pollbuf[pollbufpos], crc_captured); 1345 1346 /* get any remaining crc */ 1347 if (crc_captured < MMCSPI_DATA_CRC_LEN) { 1348 TRACE(dev, DETAILS, "crc bytes to read = %u\n", 1349 MMCSPI_DATA_CRC_LEN - crc_captured); 1350 1351 err = mmcspi_do_spi_read(dev, &crcbuf[crc_captured], 1352 MMCSPI_DATA_CRC_LEN - crc_captured); 1353 if (MMC_ERR_NONE != err) { 1354 TRACE(dev, ERROR, "spi read of crc failed\n"); 1355 TRACE_EXIT(dev); 1356 return (err); 1357 } 1358 } 1359 1360 /* 1361 * The following crc checking code is deliberately structured to 1362 * allow a passing crc-7 check to override a failing crc-16 check 1363 * when both are enabled. 1364 */ 1365 if (check_crc16) { 1366 crc16 = ((uint16_t)crcbuf[0] << 8) | crcbuf[1]; 1367 computed_crc16 = update_crc16(CRC16_INITIAL, data, len); 1368 TRACE(dev, RESULT, "sent_crc16=0x%04x computed_crc16=0x%04x\n", 1369 crc16, computed_crc16); 1370 1371 if (computed_crc16 != crc16) { 1372 crc16_mismatch = 1; 1373 1374 TRACE(dev, ERROR, "crc16 mismatch, should be 0x%04x, " 1375 " is 0x%04x\n", crc16, computed_crc16); 1376 1377 if (!check_crc7) { 1378 TRACE_EXIT(dev); 1379 return (MMC_ERR_BADCRC); 1380 } 1381 } 1382 } 1383 1384 if (check_crc7) { 1385 if (crc16_mismatch) { 1386 /* 1387 * Let the user know something else is being checked 1388 * after announcing an error above. 1389 */ 1390 TRACE(dev, ERROR, "checking crc7\n"); 1391 } 1392 1393 crc7 = data[len - 1] >> 1; 1394 computed_crc7 = update_crc7(CRC7_INITIAL, data, len - 1); 1395 TRACE(dev, RESULT, "sent_crc7=0x%02x computed_crc7=0x%02x\n", 1396 crc7, computed_crc7); 1397 1398 if (computed_crc7 != crc7) { 1399 TRACE(dev, ERROR, 1400 "crc7 mismatch, should be 0x%02x, is 0x%02x\n", 1401 crc7, computed_crc7); 1402 1403 TRACE_EXIT(dev); 1404 return (MMC_ERR_BADCRC); 1405 } 1406 } 1407 1408 TRACE_EXIT(dev); 1409 1410 return (MMC_ERR_NONE); 1411 } 1412 1413 static unsigned int 1414 mmcspi_send_stop(device_t dev, unsigned int retries) 1415 { 1416 struct mmcspi_command stop; 1417 struct mmc_command mmc_stop; 1418 uint8_t stop_response; 1419 unsigned int err; 1420 int i; 1421 1422 TRACE_ENTER(dev); 1423 1424 memset(&mmc_stop, 0, sizeof(mmc_stop)); 1425 mmc_stop.opcode = MMC_STOP_TRANSMISSION; 1426 mmc_stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 1427 1428 err = mmcspi_set_up_command(dev, &stop, &mmc_stop); 1429 if (MMC_ERR_NONE != err) { 1430 TRACE_EXIT(dev); 1431 return (err); 1432 } 1433 1434 /* 1435 * Retry stop commands that fail due to bad crc here because having 1436 * the caller retry the entire read/write command due to such a 1437 * failure is pointlessly expensive. 1438 */ 1439 for (i = 0; i <= retries; i++) { 1440 TRACE(dev, ACTION, "sending stop message\n"); 1441 1442 err = mmcspi_send_cmd(dev, &stop, &stop_response); 1443 if (MMC_ERR_NONE != err) { 1444 TRACE_EXIT(dev); 1445 return (err); 1446 } 1447 1448 TRACE(dev, RESULT, "stop response=0x%02x\n", stop_response); 1449 1450 /* retry on crc error */ 1451 if (stop_response & stop.error_mask & MMCSPI_R1_CRC_ERR) { 1452 continue; 1453 } 1454 } 1455 1456 if (stop_response & stop.error_mask) { 1457 TRACE_EXIT(dev); 1458 1459 /* 1460 * Don't return MMC_ERR_BADCRC here, even if 1461 * MMCSPI_R1_CRC_ERR is set, because that would trigger the 1462 * caller's retry-on-crc-error mechanism, effectively 1463 * squaring the maximum number of retries of the stop 1464 * command. 1465 */ 1466 return (MMC_ERR_FAILED); 1467 } 1468 TRACE_EXIT(dev); 1469 1470 return (MMC_ERR_NONE); 1471 } 1472 1473 static unsigned int 1474 mmcspi_read_phase(device_t dev, struct mmcspi_command *cmd) 1475 { 1476 struct mmc_data *data; 1477 unsigned int data_offset; 1478 unsigned int num_blocks; 1479 unsigned int len; 1480 unsigned int err; 1481 uint8_t *data8; 1482 int i; 1483 1484 TRACE_ENTER(dev); 1485 1486 data = cmd->data; 1487 data8 = (uint8_t *)data->data; 1488 data_offset = 0; 1489 1490 if (data->len < MMCSPI_DATA_BLOCK_LEN) { 1491 num_blocks = 1; 1492 len = data->len; 1493 } else { 1494 num_blocks = data->len / MMCSPI_DATA_BLOCK_LEN; 1495 len = MMCSPI_DATA_BLOCK_LEN; 1496 } 1497 1498 for (i = 0; i < num_blocks; i++) { 1499 /* 1500 * The CID and CSD data blocks contain both a trailing crc-7 1501 * inside the data block and the standard crc-16 following 1502 * the data block, so both are checked when use_crc is true. 1503 * 1504 * When crc checking has been enabled via CMD59, some cards 1505 * send CID and CSD data blocks with correct crc-7 values 1506 * but incorrect crc-16 values. read_block will accept 1507 * those responses as valid as long as the crc-7 is correct. 1508 * 1509 * Examples: 1510 * 1511 * Super Talent 1GB SDSC card, cid: 1512 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=02.2010 1513 */ 1514 err = mmcspi_read_block(dev, &data8[data_offset], len, 1515 cmd->use_crc, cmd->use_crc && ((MMC_SEND_CID == cmd->opcode) 1516 || (MMC_SEND_CSD == cmd->opcode))); 1517 1518 if (MMC_ERR_NONE != err) { 1519 TRACE_EXIT(dev); 1520 return (err); 1521 } 1522 1523 data_offset += MMCSPI_DATA_BLOCK_LEN; 1524 } 1525 1526 /* multi-block read commands require a stop */ 1527 if (num_blocks > 1) { 1528 err = mmcspi_send_stop(dev, cmd->retries); 1529 if (MMC_ERR_NONE != err) { 1530 TRACE_EXIT(dev); 1531 return (err); 1532 } 1533 } 1534 1535 TRACE_EXIT(dev); 1536 1537 return (MMC_ERR_NONE); 1538 } 1539 1540 static unsigned int 1541 mmcspi_write_block(device_t dev, uint8_t *data, unsigned int is_multi, 1542 unsigned char use_crc, uint8_t *status) 1543 { 1544 uint8_t txbuf[max(MMCSPI_POLL_LEN, 2)]; 1545 uint8_t response_token; 1546 unsigned int err; 1547 uint16_t crc; 1548 1549 TRACE_ENTER(dev); 1550 1551 if (use_crc) 1552 crc = update_crc16(CRC16_INITIAL, data, MMCSPI_DATA_BLOCK_LEN); 1553 else 1554 crc = 0; 1555 1556 TRACE(dev, ACTION, "write block(512) crc=0x%04x\n", crc); 1557 1558 txbuf[0] = is_multi ? MMCSPI_TOKEN_SB_WM : MMCSPI_TOKEN_SB; 1559 err = mmcspi_do_spi_write(dev, txbuf, 1, data, MMCSPI_DATA_BLOCK_LEN); 1560 if (MMC_ERR_NONE != err) { 1561 TRACE_EXIT(dev); 1562 return (err); 1563 } 1564 1565 txbuf[0] = crc >> 8; 1566 txbuf[1] = crc & 0xff; 1567 err = mmcspi_do_spi_write(dev, txbuf, 2, NULL, 0); 1568 if (MMC_ERR_NONE != err) { 1569 TRACE_EXIT(dev); 1570 return (err); 1571 } 1572 1573 err = mmcspi_get_response_token(dev, MMCSPI_DR_MASK, MMCSPI_DR_VALUE, 1574 1, 1, &response_token); 1575 if (MMC_ERR_NONE != err) { 1576 TRACE_EXIT(dev); 1577 return (err); 1578 } 1579 1580 *status = response_token & MMCSPI_DR_ERR_MASK; 1581 1582 TRACE_EXIT(dev); 1583 1584 return (MMC_ERR_NONE); 1585 } 1586 1587 static unsigned int 1588 mmcspi_write_phase(device_t dev, struct mmcspi_command *cmd) 1589 { 1590 1591 struct mmc_data *data; 1592 unsigned int data_offset; 1593 unsigned int num_blocks; 1594 unsigned int err; 1595 uint8_t *data8; 1596 uint8_t token[2]; 1597 uint8_t status; 1598 int i; 1599 1600 TRACE_ENTER(dev); 1601 1602 data = cmd->data; 1603 1604 data8 = (uint8_t *)data->data; 1605 data_offset = 0; 1606 num_blocks = data->len / MMCSPI_DATA_BLOCK_LEN; 1607 for (i = 0; i < num_blocks; i++) { 1608 err = mmcspi_write_block(dev, &data8[data_offset], 1609 num_blocks > 1, cmd->use_crc, &status); 1610 1611 if (MMC_ERR_NONE != err) { 1612 TRACE_EXIT(dev); 1613 return (err); 1614 } 1615 1616 if (MMCSPI_DR_ERR_NONE != status) { 1617 if (num_blocks > 1) { 1618 /* 1619 * Ignore any failure reported for the stop 1620 * command, as the return status for the 1621 * write phase will be whatever error was 1622 * indicated in the data respone token. 1623 */ 1624 mmcspi_send_stop(dev, cmd->retries); 1625 } 1626 1627 /* 1628 * A CRC error can't be ignored here, even if crc 1629 * use is disabled, as there is no way to simply 1630 * carry on when a data error token has been sent. 1631 */ 1632 if (MMCSPI_DR_ERR_CRC == status) { 1633 TRACE_EXIT(dev); 1634 return (MMC_ERR_BADCRC); 1635 } else { 1636 TRACE_EXIT(dev); 1637 return (MMC_ERR_FAILED); 1638 } 1639 } 1640 1641 data_offset += MMCSPI_DATA_BLOCK_LEN; 1642 } 1643 1644 /* successful multi-block write commands require a stop token */ 1645 if (num_blocks > 1) { 1646 TRACE(dev, ACTION, "Sending stop token\n"); 1647 1648 /* 1649 * Most/all cards are a bit sluggish in assserting busy 1650 * after receipt of the STOP_TRAN token. Clocking out an 1651 * extra byte here provides a byte of dead time before 1652 * looking for not busy, avoiding a premature not-busy 1653 * determination with such cards. 1654 */ 1655 token[0] = MMCSPI_TOKEN_ST; 1656 token[1] = 0xff; 1657 1658 err = mmcspi_do_spi_write(dev, token, sizeof(token), NULL, 0); 1659 if (MMC_ERR_NONE != err) { 1660 TRACE_EXIT(dev); 1661 return (err); 1662 } 1663 1664 err = mmcspi_wait_for_not_busy(dev); 1665 if (MMC_ERR_NONE != err) { 1666 TRACE_EXIT(dev); 1667 return (err); 1668 } 1669 } 1670 1671 TRACE_EXIT(dev); 1672 1673 return (MMC_ERR_NONE); 1674 } 1675 1676 static unsigned int 1677 mmcspi_translate_response(device_t dev, struct mmcspi_command *cmd, 1678 uint8_t *rspbuf) 1679 { 1680 struct mmc_command *mmc_cmd; 1681 uint32_t mmc_rsp_type; 1682 uint8_t *ldata; 1683 1684 mmc_cmd = cmd->mmc_cmd; 1685 mmc_rsp_type = cmd->mmc_rsp_type; 1686 ldata = cmd->ldata.data; 1687 1688 TRACE_ENTER(dev); 1689 1690 TRACE(dev, ACTION, "translating SPI rsp %u to SD rsp %u\n", 1691 cmd->rsp_type, mmc_rsp_type); 1692 1693 if ((MMCSPI_TO_MMC_RSP_R1 == mmc_rsp_type) || 1694 (MMCSPI_TO_MMC_RSP_R1B == mmc_rsp_type)) { 1695 1696 TRACE(dev, ACTION, "translating SPI-R1/2 to SD-R1\n"); 1697 1698 if ((MMCSPI_RSP_R1 == cmd->rsp_type) || 1699 (MMCSPI_RSP_R1B == cmd->rsp_type) || 1700 (MMCSPI_RSP_R2 == cmd->rsp_type)) { 1701 mmc_cmd->resp[0] = 0; 1702 1703 if (rspbuf[0] & MMCSPI_R1_PARAM_ERR) 1704 mmc_cmd->resp[0] |= R1_OUT_OF_RANGE; 1705 1706 if (rspbuf[0] & MMCSPI_R1_ADDR_ERR) 1707 mmc_cmd->resp[0] |= R1_ADDRESS_ERROR; 1708 1709 if (rspbuf[0] & MMCSPI_R1_ERASE_ERR) 1710 mmc_cmd->resp[0] |= R1_ERASE_SEQ_ERROR; 1711 1712 if (rspbuf[0] & MMCSPI_R1_CRC_ERR) 1713 mmc_cmd->resp[0] |= R1_COM_CRC_ERROR; 1714 1715 if (rspbuf[0] & MMCSPI_R1_ILL_CMD) 1716 mmc_cmd->resp[0] |= R1_ILLEGAL_COMMAND; 1717 1718 if (rspbuf[0] & MMCSPI_R1_ERASE_RST) 1719 mmc_cmd->resp[0] |= R1_ERASE_RESET; 1720 1721 if (rspbuf[0] & MMCSPI_R1_IDLE) 1722 mmc_cmd->resp[0] |= 1723 (uint32_t)R1_STATE_IDLE << 9; 1724 else 1725 mmc_cmd->resp[0] |= 1726 (uint32_t)R1_STATE_READY << 9; 1727 1728 /* When MMC_CMD_IS_APP is sent, emulate R1_APP_CMD 1729 SD-bus status bit. */ 1730 if (!(cmd->flags & MMC_CMD_IS_APP) && 1731 (MMC_APP_CMD == cmd->opcode)) 1732 mmc_cmd->resp[0] |= R1_APP_CMD; 1733 1734 if (MMCSPI_RSP_R2 == cmd->rsp_type) { 1735 if (rspbuf[1] & MMCSPI_R2_OOR_CSD_OW) 1736 mmc_cmd->resp[0] |= 1737 R1_OUT_OF_RANGE | 1738 R1_CSD_OVERWRITE; 1739 1740 if (rspbuf[1] & MMCSPI_R2_ERASE_PARAM) 1741 mmc_cmd->resp[0] |= R1_ERASE_PARAM; 1742 1743 if (rspbuf[1] & MMCSPI_R2_WP_VIOLATE) 1744 mmc_cmd->resp[0] |= R1_WP_VIOLATION; 1745 1746 if (rspbuf[1] & MMCSPI_R2_ECC_FAIL) 1747 mmc_cmd->resp[0] |= R1_CARD_ECC_FAILED; 1748 1749 if (rspbuf[1] & MMCSPI_R2_CC_ERR) 1750 mmc_cmd->resp[0] |= R1_CC_ERROR; 1751 1752 if (rspbuf[1] & MMCSPI_R2_ERR) 1753 mmc_cmd->resp[0] |= R1_ERROR; 1754 1755 if (rspbuf[1] & MMCSPI_R2_WP_ER_LCK) 1756 mmc_cmd->resp[0] |= 1757 R1_LOCK_UNLOCK_FAILED | 1758 R1_WP_ERASE_SKIP; 1759 1760 if (rspbuf[1] & MMCSPI_R2_LOCKED) 1761 mmc_cmd->resp[0] |= R1_CARD_IS_LOCKED; 1762 1763 } 1764 } else 1765 return (MMC_ERR_INVALID); 1766 1767 } else if (MMCSPI_TO_MMC_RSP_R2 == mmc_rsp_type) { 1768 1769 if (16 == cmd->ldata.len) { 1770 1771 TRACE(dev, ACTION, "translating SPI-R1/ldata(16) " 1772 "to SD-R2\n"); 1773 1774 /* ldata contains bits 127:0 of the spi response */ 1775 1776 mmc_cmd->resp[0] = 1777 (uint32_t)ldata[0] << 24 | 1778 (uint32_t)ldata[1] << 16 | 1779 (uint32_t)ldata[2] << 8 | 1780 (uint32_t)ldata[3]; 1781 1782 mmc_cmd->resp[1] = 1783 (uint32_t)ldata[4] << 24 | 1784 (uint32_t)ldata[5] << 16 | 1785 (uint32_t)ldata[6] << 8 | 1786 (uint32_t)ldata[7]; 1787 1788 mmc_cmd->resp[2] = 1789 (uint32_t)ldata[8] << 24 | 1790 (uint32_t)ldata[9] << 16 | 1791 (uint32_t)ldata[10] << 8 | 1792 (uint32_t)ldata[11]; 1793 1794 mmc_cmd->resp[3] = 1795 (uint32_t)ldata[12] << 24 | 1796 (uint32_t)ldata[13] << 16 | 1797 (uint32_t)ldata[14] << 8; 1798 1799 } else 1800 return (MMC_ERR_INVALID); 1801 1802 } else if (MMCSPI_TO_MMC_RSP_R3 == mmc_rsp_type) { 1803 1804 if (MMCSPI_RSP_R3 == cmd->rsp_type) { 1805 1806 TRACE(dev, ACTION, "translating SPI-R3 to SD-R3\n"); 1807 1808 /* rspbuf contains a 40-bit spi-R3 from the 1809 MMCSPI_READ_OCR response, of which bits 31:0 are 1810 the OCR value */ 1811 1812 /* spi response bits 31:0 mapped to 1813 sdhc register bits 31:0 */ 1814 mmc_cmd->resp[0] = 1815 (uint32_t)rspbuf[1] << 24 | 1816 (uint32_t)rspbuf[2] << 16 | 1817 (uint32_t)rspbuf[3] << 8 | 1818 (uint32_t)rspbuf[4]; 1819 1820 /* Clear card busy bit (indicating busy) if the 1821 SPI-R1 idle bit is set. */ 1822 if (rspbuf[0] & MMCSPI_R1_IDLE) { 1823 mmc_cmd->resp[0] &= ~MMC_OCR_CARD_BUSY; 1824 } else { 1825 mmc_cmd->resp[0] |= MMC_OCR_CARD_BUSY; 1826 } 1827 1828 TRACE(dev, DETAILS, "ocr=0x%08x\n", mmc_cmd->resp[0]); 1829 } else 1830 return (MMC_ERR_INVALID); 1831 1832 } else if (MMCSPI_TO_MMC_RSP_R6 == mmc_rsp_type) { 1833 if (MMCSPI_RSP_R2 == cmd->rsp_type) { 1834 1835 TRACE(dev, ACTION, "translating SPI-R2 to SD-R6\n"); 1836 1837 /* rca returned will always be zero */ 1838 mmc_cmd->resp[0] = 0; 1839 1840 if (rspbuf[0] & MMCSPI_R1_CRC_ERR) 1841 mmc_cmd->resp[0] |= 0x8000; 1842 1843 if (rspbuf[0] & MMCSPI_R1_ILL_CMD) 1844 mmc_cmd->resp[0] |= 0x4000; 1845 1846 if (rspbuf[1] & MMCSPI_R2_ERR) 1847 mmc_cmd->resp[0] |= 0x2000; 1848 1849 if (rspbuf[0] & MMCSPI_R1_IDLE) 1850 mmc_cmd->resp[0] |= 1851 (uint32_t)R1_STATE_IDLE << 9; 1852 else 1853 mmc_cmd->resp[0] |= 1854 (uint32_t)R1_STATE_READY << 9; 1855 } else 1856 return (MMC_ERR_INVALID); 1857 1858 } else if (MMCSPI_TO_MMC_RSP_R7 == mmc_rsp_type) { 1859 if (MMCSPI_RSP_R7 == cmd->rsp_type) { 1860 1861 TRACE(dev, ACTION, "translating SPI-R7 to SD-R7\n"); 1862 1863 /* rsp buf contains a 40-bit spi-R7, of which bits 1864 11:0 need to be transferred */ 1865 1866 /* spi response bits 11:0 mapped to 1867 sdhc register bits 11:0 */ 1868 mmc_cmd->resp[0] = 1869 (uint32_t)(rspbuf[3] & 0xf) << 8 | 1870 (uint32_t)rspbuf[4]; 1871 } else 1872 return (MMC_ERR_INVALID); 1873 1874 } else if (MMCSPI_TO_MMC_RSP_NONE != mmc_rsp_type) 1875 return (MMC_ERR_INVALID); 1876 1877 TRACE_EXIT(dev); 1878 1879 return (MMC_ERR_NONE); 1880 } 1881 1882 static unsigned int 1883 mmcspi_get_ocr(device_t dev, uint8_t *ocrbuf) 1884 { 1885 struct mmc_command mmc_cmd; 1886 struct mmcspi_command cmd; 1887 unsigned int err; 1888 uint8_t r1_status; 1889 uint8_t rspbuf[MMCSPI_MAX_RSP_LEN]; 1890 1891 TRACE_ENTER(dev); 1892 1893 memset(&mmc_cmd, 0, sizeof(struct mmc_command)); 1894 mmc_cmd.opcode = MMCSPI_READ_OCR; 1895 mmc_cmd.flags = MMC_RSP_R3 | MMC_CMD_AC; 1896 1897 err = mmcspi_set_up_command(dev, &cmd, &mmc_cmd); 1898 if (MMC_ERR_NONE != err) { 1899 TRACE_EXIT(dev); 1900 return (err); 1901 } 1902 1903 err = mmcspi_send_cmd(dev, &cmd, rspbuf); 1904 if (MMC_ERR_NONE != err) { 1905 TRACE_EXIT(dev); 1906 return (err); 1907 } 1908 1909 r1_status = rspbuf[0] & cmd.error_mask; 1910 if (r1_status) { 1911 if (r1_status & MMCSPI_R1_CRC_ERR) 1912 err = MMC_ERR_BADCRC; 1913 else 1914 err = MMC_ERR_INVALID; 1915 1916 TRACE_EXIT(dev); 1917 return (err); 1918 } 1919 1920 memcpy(ocrbuf, &rspbuf[1], MMCSPI_OCR_LEN); 1921 1922 TRACE_EXIT(dev); 1923 1924 return (MMC_ERR_NONE); 1925 } 1926 1927 static unsigned int 1928 mmcspi_set_crc_on_off(device_t dev, unsigned int crc_on) 1929 { 1930 struct mmc_command mmc_cmd; 1931 struct mmcspi_command cmd; 1932 unsigned int err; 1933 uint8_t r1_status; 1934 uint8_t rspbuf[MMCSPI_MAX_RSP_LEN]; 1935 1936 TRACE_ENTER(dev); 1937 1938 memset(&mmc_cmd, 0, sizeof(struct mmc_command)); 1939 mmc_cmd.opcode = MMCSPI_CRC_ON_OFF; 1940 mmc_cmd.arg = crc_on ? 1 : 0; 1941 mmc_cmd.flags = MMC_RSP_NONE | MMC_CMD_AC; 1942 1943 err = mmcspi_set_up_command(dev, &cmd, &mmc_cmd); 1944 if (MMC_ERR_NONE != err) { 1945 TRACE_EXIT(dev); 1946 return (err); 1947 } 1948 1949 err = mmcspi_send_cmd(dev, &cmd, rspbuf); 1950 if (MMC_ERR_NONE != err) { 1951 TRACE_EXIT(dev); 1952 return (err); 1953 } 1954 1955 r1_status = rspbuf[0] & cmd.error_mask; 1956 if (r1_status) { 1957 if (r1_status & MMCSPI_R1_CRC_ERR) 1958 err = MMC_ERR_BADCRC; 1959 else 1960 err = MMC_ERR_INVALID; 1961 1962 TRACE_EXIT(dev); 1963 return (err); 1964 } 1965 1966 TRACE_EXIT(dev); 1967 return (MMC_ERR_NONE); 1968 } 1969 1970 static unsigned int 1971 mmcspi_update_crc_setting(device_t dev, unsigned int crc_on) 1972 { 1973 struct mmcspi_softc *sc; 1974 struct mmcspi_slot *slot; 1975 unsigned int err; 1976 int i; 1977 1978 TRACE_ENTER(dev); 1979 1980 sc = device_get_softc(dev); 1981 slot = &sc->slot; 1982 1983 for (i = 0; i <= MMCSPI_RETRIES; i++) { 1984 err = mmcspi_set_crc_on_off(dev, crc_on); 1985 if (MMC_ERR_BADCRC != err) 1986 break; 1987 } 1988 1989 if (MMC_ERR_NONE != err) { 1990 TRACE_EXIT(dev); 1991 return (err); 1992 } 1993 1994 if (crc_on) 1995 slot->crc_enabled = 1; 1996 else 1997 slot->crc_enabled = 0; 1998 1999 TRACE_EXIT(dev); 2000 2001 return (MMC_ERR_NONE); 2002 } 2003 2004 static int 2005 mmcspi_request(device_t brdev, device_t reqdev, struct mmc_request *req) 2006 { 2007 TRACE_ENTER(brdev); 2008 2009 struct mmcspi_softc *sc = device_get_softc(brdev); 2010 struct mmcspi_slot *slot = &sc->slot; 2011 struct mmcspi_command cmd; 2012 struct mmc_command *mmc_cmd = req->cmd; 2013 struct mmc_data *data; 2014 unsigned int err; 2015 unsigned int use_crc_sample; 2016 int i, j; 2017 uint32_t opcode; 2018 uint32_t flags; 2019 uint32_t last_opcode; 2020 uint32_t last_flags; 2021 uint8_t rspbuf[MMCSPI_MAX_RSP_LEN]; 2022 2023 #define IS_CMD(code, cmd, flags) \ 2024 (!((flags) & MMC_CMD_IS_APP) && ((code) == (cmd))) 2025 #define IS_ACMD(code, cmd, flags) \ 2026 (((flags) & MMC_CMD_IS_APP) && ((code) == (cmd))) 2027 2028 if (power_on != slot->host.ios.power_mode) 2029 return (MMC_ERR_INVALID); 2030 2031 /* 2032 * Sample use_crc sysctl and adjust card setting if required and 2033 * appropriate. 2034 */ 2035 use_crc_sample = sc->use_crc; 2036 if (slot->crc_init_done && 2037 (use_crc_sample != slot->crc_enabled)) { 2038 err = mmcspi_update_crc_setting(brdev, use_crc_sample); 2039 if (MMC_ERR_NONE != err) 2040 goto out; 2041 slot->crc_init_done = 1; 2042 } 2043 2044 err = mmcspi_set_up_command(brdev, &cmd, mmc_cmd); 2045 if (MMC_ERR_NONE != err) 2046 goto out; 2047 2048 opcode = cmd.opcode; 2049 flags = cmd.flags; 2050 data = cmd.data; 2051 2052 last_opcode = slot->last_opcode; 2053 last_flags = slot->last_flags; 2054 2055 /* enforce restrictions on request parameters */ 2056 if (data) { 2057 /* 2058 * All writes must be a multiple of the block length. All 2059 * reads greater than the block length must be a multiple of 2060 * the block length. 2061 */ 2062 if ((data->len % MMCSPI_DATA_BLOCK_LEN) && 2063 !((data->flags & MMC_DATA_READ) && 2064 (data->len < MMCSPI_DATA_BLOCK_LEN))) { 2065 TRACE(brdev, ERROR, 2066 "requested data phase not a multiple of %u\n", 2067 MMCSPI_DATA_BLOCK_LEN); 2068 err = MMC_ERR_INVALID; 2069 goto out; 2070 } 2071 2072 if (((data->flags & MMC_DATA_READ) && 2073 (data->flags & MMC_DATA_WRITE)) || 2074 (data->flags & MMC_DATA_STREAM)) { 2075 TRACE(brdev, ERROR, "illegal data phase flags 0x%02x\n", 2076 data->flags); 2077 err = MMC_ERR_INVALID; 2078 goto out; 2079 } 2080 } 2081 2082 for (i = 0; i <= cmd.retries; i++) { 2083 /* 2084 * On the next command following a CMD8, collect the OCR and 2085 * save it off for use in the next ACMD41. 2086 */ 2087 if (IS_CMD(SD_SEND_IF_COND, last_opcode, last_flags)) { 2088 err = mmcspi_get_ocr(brdev, slot->last_ocr); 2089 if (MMC_ERR_NONE != err) { 2090 if (MMC_ERR_BADCRC == err) 2091 continue; 2092 goto out; 2093 } 2094 } 2095 2096 err = mmcspi_send_cmd(brdev, &cmd, rspbuf); 2097 if (MMC_ERR_NONE != err) { 2098 if (MMC_ERR_BADCRC == err) 2099 continue; 2100 goto out; 2101 } 2102 2103 if (data) { 2104 if (data->flags & MMC_DATA_READ) 2105 err = mmcspi_read_phase(brdev, &cmd); 2106 else /* MMC_DATA_WRITE */ 2107 err = mmcspi_write_phase(brdev, &cmd); 2108 if (MMC_ERR_NONE != err) { 2109 if (MMC_ERR_BADCRC == err) 2110 continue; 2111 goto out; 2112 } 2113 } 2114 break; 2115 } 2116 2117 if (MMC_ERR_NONE != err) 2118 goto out; 2119 2120 /* 2121 * If this was an ACMD_SD_SEND_OP_COND or MMC_SEND_OP_COND, we need 2122 * to return an OCR value in the result. If the response from the 2123 * card indicates it is still in the IDLE state, supply the OCR 2124 * value obtained after the last CMD8, otherwise issue an 2125 * MMCSPI_READ_OCR to get the current value, which will have a valid 2126 * CCS bit. 2127 * 2128 * This dance is required under this emulation approach because the 2129 * spec stipulates that no other commands should be sent while 2130 * ACMD_SD_SEND_OP_COND is being used to poll for the end of the 2131 * IDLE state, and some cards do enforce that requirement. 2132 */ 2133 if (IS_ACMD(ACMD_SD_SEND_OP_COND, opcode, flags) || 2134 IS_CMD(MMC_SEND_OP_COND, opcode, flags)) { 2135 2136 if (rspbuf[0] & MMCSPI_R1_IDLE) 2137 memcpy(&rspbuf[1], slot->last_ocr, MMCSPI_OCR_LEN); 2138 else { 2139 2140 /* 2141 * Some cards won't accept the MMCSPI_CRC_ON_OFF 2142 * command until initialization is complete. 2143 * 2144 * Examples: 2145 * 2146 * Super Talent 1GB SDSC card, cid: 2147 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=02.2010 2148 */ 2149 if (!slot->crc_init_done) { 2150 err = mmcspi_update_crc_setting(brdev, 2151 sc->use_crc); 2152 if (MMC_ERR_NONE != err) 2153 goto out; 2154 slot->crc_init_done = 1; 2155 } 2156 2157 for (j = 0; j <= cmd.retries; j++) { 2158 /* 2159 * Note that in this case, we pass on the R1 2160 * from READ_OCR. 2161 */ 2162 err = mmcspi_get_ocr(brdev, rspbuf); 2163 if (MMC_ERR_NONE != err) { 2164 if (MMC_ERR_BADCRC == err) 2165 continue; 2166 2167 goto out; 2168 } 2169 2170 } 2171 2172 if (MMC_ERR_NONE != err) 2173 goto out; 2174 2175 } 2176 2177 /* adjust the SPI response type to include the OCR */ 2178 cmd.rsp_type = MMCSPI_RSP_R3; 2179 } 2180 2181 err = mmcspi_translate_response(brdev, &cmd, rspbuf); 2182 if (MMC_ERR_NONE != err) 2183 goto out; 2184 2185 out: 2186 slot->last_opcode = mmc_cmd->opcode; 2187 slot->last_flags = mmc_cmd->flags; 2188 2189 mmc_cmd->error = err; 2190 2191 if (req->done) 2192 req->done(req); 2193 2194 TRACE_EXIT(brdev); 2195 2196 return (err); 2197 } 2198 2199 static int 2200 mmcspi_get_ro(device_t brdev, device_t reqdev) 2201 { 2202 2203 TRACE_ENTER(brdev); 2204 TRACE_EXIT(brdev); 2205 2206 /* XXX no support for this currently */ 2207 return (0); 2208 } 2209 2210 static int 2211 mmcspi_acquire_host(device_t brdev, device_t reqdev) 2212 { 2213 struct mmcspi_slot *slot; 2214 int err; 2215 2216 TRACE_ENTER(brdev); 2217 err = 0; 2218 2219 slot = device_get_ivars(reqdev); 2220 2221 MMCSPI_LOCK_SLOT(slot); 2222 while (slot->bus_busy) 2223 mtx_sleep(slot, &slot->mtx, 0, "mmcspiah", 0); 2224 slot->bus_busy++; 2225 MMCSPI_UNLOCK_SLOT(slot); 2226 2227 TRACE_EXIT(brdev); 2228 2229 return (err); 2230 } 2231 2232 static int 2233 mmcspi_release_host(device_t brdev, device_t reqdev) 2234 { 2235 struct mmcspi_slot *slot; 2236 2237 TRACE_ENTER(brdev); 2238 2239 slot = device_get_ivars(reqdev); 2240 2241 MMCSPI_LOCK_SLOT(slot); 2242 slot->bus_busy--; 2243 MMCSPI_UNLOCK_SLOT(slot); 2244 2245 wakeup(slot); 2246 2247 TRACE_EXIT(brdev); 2248 2249 return (0); 2250 } 2251 2252 static int 2253 mmcspi_modevent_handler(module_t mod, int what, void *arg) 2254 { 2255 2256 switch (what) { 2257 case MOD_LOAD: 2258 init_crc7tab(); 2259 init_crc16tab(); 2260 memset(onesbuf, 0xff, sizeof(onesbuf)); 2261 break; 2262 default: 2263 return (EOPNOTSUPP); 2264 } 2265 2266 return (0); 2267 } 2268 2269 static int 2270 mmcspi_switch_vccq(device_t bus, device_t child) 2271 { 2272 2273 return (0); 2274 } 2275 2276 #if defined(MMCSPI_ENABLE_DEBUG_FUNCS) 2277 static void 2278 mmcspi_dump_data(device_t dev, const char *label, uint8_t *data, 2279 unsigned int len) 2280 { 2281 unsigned int i, j; 2282 unsigned int num_lines; 2283 unsigned int residual; 2284 2285 TRACE_ENTER(dev); 2286 2287 num_lines = len / 16; 2288 residual = len - 16 * num_lines; 2289 2290 for(i = 0; i < num_lines; i++) { 2291 device_printf(dev, "%s:", label); 2292 for(j = 0; j < 16; j++) 2293 printf(" %02x", data[i * 16 + j]); 2294 printf("\n"); 2295 } 2296 2297 if (residual) { 2298 device_printf(dev, "%s:", label); 2299 for(j = 0; j < residual; j++) 2300 printf(" %02x", data[num_lines * 16 + j]); 2301 printf("\n"); 2302 } 2303 2304 TRACE_EXIT(dev); 2305 } 2306 2307 static void 2308 mmcspi_dump_spi_bus(device_t dev, unsigned int len) 2309 { 2310 unsigned int num_blocks; 2311 unsigned int residual; 2312 unsigned int i; 2313 2314 TRACE_ENTER(dev); 2315 2316 num_blocks = len / MMCSPI_DATA_BLOCK_LEN; 2317 residual = len - num_blocks * MMCSPI_DATA_BLOCK_LEN; 2318 2319 for (i = 0; i < num_blocks; i++) { 2320 if (MMC_ERR_NONE != mmcspi_do_spi_read(dev, junkbuf, 2321 MMCSPI_DATA_BLOCK_LEN)) { 2322 device_printf(dev, "spi read failed\n"); 2323 return; 2324 } 2325 2326 mmcspi_dump_data(dev, "bus_data", junkbuf, 2327 MMCSPI_DATA_BLOCK_LEN); 2328 } 2329 2330 if (residual) { 2331 if (MMC_ERR_NONE != mmcspi_do_spi_read(dev, junkbuf, 2332 residual)) { 2333 device_printf(dev, "spi read failed\n"); 2334 return; 2335 } 2336 2337 mmcspi_dump_data(dev, "bus_data", junkbuf, residual); 2338 } 2339 2340 TRACE_EXIT(dev); 2341 } 2342 #endif 2343 2344 static device_method_t mmcspi_methods[] = { 2345 /* device_if */ 2346 DEVMETHOD(device_probe, mmcspi_probe), 2347 DEVMETHOD(device_attach, mmcspi_attach), 2348 DEVMETHOD(device_detach, mmcspi_detach), 2349 DEVMETHOD(device_suspend, mmcspi_suspend), 2350 DEVMETHOD(device_resume, mmcspi_resume), 2351 2352 /* Bus interface */ 2353 DEVMETHOD(bus_read_ivar, mmcspi_read_ivar), 2354 DEVMETHOD(bus_write_ivar, mmcspi_write_ivar), 2355 2356 /* mmcbr_if */ 2357 DEVMETHOD(mmcbr_update_ios, mmcspi_update_ios), 2358 DEVMETHOD(mmcbr_request, mmcspi_request), 2359 DEVMETHOD(mmcbr_get_ro, mmcspi_get_ro), 2360 DEVMETHOD(mmcbr_acquire_host, mmcspi_acquire_host), 2361 DEVMETHOD(mmcbr_release_host, mmcspi_release_host), 2362 DEVMETHOD(mmcbr_switch_vccq, mmcspi_switch_vccq), 2363 2364 {0, 0}, 2365 }; 2366 2367 static driver_t mmcspi_driver = { 2368 "mmcspi", 2369 mmcspi_methods, 2370 sizeof(struct mmcspi_softc), 2371 }; 2372 2373 DRIVER_MODULE(mmcspi, spibus, mmcspi_driver, mmcspi_modevent_handler, NULL); 2374 MODULE_DEPEND(mmcspi, spibus, 1, 1, 1); 2375 MMC_DECLARE_BRIDGE(mmcspi); 2376 #ifdef FDT 2377 SPIBUS_FDT_PNP_INFO(compat_data); 2378 #endif 2379