1 /*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * Portions of this software may have been developed with reference to 26 * the SD Simplified Specification. The following disclaimer may apply: 27 * 28 * The following conditions apply to the release of the simplified 29 * specification ("Simplified Specification") by the SD Card Association and 30 * the SD Group. The Simplified Specification is a subset of the complete SD 31 * Specification which is owned by the SD Card Association and the SD 32 * Group. This Simplified Specification is provided on a non-confidential 33 * basis subject to the disclaimers below. Any implementation of the 34 * Simplified Specification may require a license from the SD Card 35 * Association, SD Group, SD-3C LLC or other third parties. 36 * 37 * Disclaimers: 38 * 39 * The information contained in the Simplified Specification is presented only 40 * as a standard specification for SD Cards and SD Host/Ancillary products and 41 * is provided "AS-IS" without any representations or warranties of any 42 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 43 * Card Association for any damages, any infringements of patents or other 44 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 45 * parties, which may result from its use. No license is granted by 46 * implication, estoppel or otherwise under any patent or other rights of the 47 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 48 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 49 * or the SD Card Association to disclose or distribute any technical 50 * information, know-how or other confidential information to any third party. 51 */ 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/lock.h> 61 #include <sys/module.h> 62 #include <sys/mutex.h> 63 #include <sys/bus.h> 64 #include <sys/endian.h> 65 66 #include <dev/mmc/mmcreg.h> 67 #include <dev/mmc/mmcbrvar.h> 68 #include <dev/mmc/mmcvar.h> 69 #include "mmcbr_if.h" 70 #include "mmcbus_if.h" 71 72 struct mmc_softc { 73 device_t dev; 74 struct mtx sc_mtx; 75 struct intr_config_hook config_intrhook; 76 device_t owner; 77 uint32_t last_rca; 78 }; 79 80 /* 81 * Per-card data 82 */ 83 struct mmc_ivars { 84 uint32_t raw_cid[4]; /* Raw bits of the CID */ 85 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 86 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 87 uint8_t raw_ext_csd[512]; /* Raw bits of the EXT_CSD */ 88 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 89 uint16_t rca; 90 enum mmc_card_mode mode; 91 struct mmc_cid cid; /* cid decoded */ 92 struct mmc_csd csd; /* csd decoded */ 93 struct mmc_scr scr; /* scr decoded */ 94 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 95 u_char read_only; /* True when the device is read-only */ 96 u_char bus_width; /* Bus width to use */ 97 u_char timing; /* Bus timing support */ 98 u_char high_cap; /* High Capacity card (block addressed) */ 99 uint32_t sec_count; /* Card capacity in 512byte blocks */ 100 uint32_t tran_speed; /* Max speed in normal mode */ 101 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 102 uint32_t erase_sector; /* Card native erase sector size */ 103 }; 104 105 #define CMD_RETRIES 3 106 107 /* bus entry points */ 108 static int mmc_probe(device_t dev); 109 static int mmc_attach(device_t dev); 110 static int mmc_detach(device_t dev); 111 static int mmc_suspend(device_t dev); 112 static int mmc_resume(device_t dev); 113 114 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 115 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 116 #define MMC_LOCK_INIT(_sc) \ 117 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \ 118 "mmc", MTX_DEF) 119 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 120 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 121 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 122 123 static int mmc_calculate_clock(struct mmc_softc *sc); 124 static void mmc_delayed_attach(void *); 125 static void mmc_power_down(struct mmc_softc *sc); 126 static int mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, 127 int retries); 128 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 129 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 130 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 131 static int mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width); 132 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr); 133 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 134 static int mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd); 135 static void mmc_scan(struct mmc_softc *sc); 136 static int mmc_delete_cards(struct mmc_softc *sc); 137 138 static void 139 mmc_ms_delay(int ms) 140 { 141 DELAY(1000 * ms); /* XXX BAD */ 142 } 143 144 static int 145 mmc_probe(device_t dev) 146 { 147 148 device_set_desc(dev, "MMC/SD bus"); 149 return (0); 150 } 151 152 static int 153 mmc_attach(device_t dev) 154 { 155 struct mmc_softc *sc; 156 157 sc = device_get_softc(dev); 158 sc->dev = dev; 159 MMC_LOCK_INIT(sc); 160 161 /* We'll probe and attach our children later, but before / mount */ 162 sc->config_intrhook.ich_func = mmc_delayed_attach; 163 sc->config_intrhook.ich_arg = sc; 164 if (config_intrhook_establish(&sc->config_intrhook) != 0) 165 device_printf(dev, "config_intrhook_establish failed\n"); 166 return (0); 167 } 168 169 static int 170 mmc_detach(device_t dev) 171 { 172 struct mmc_softc *sc = device_get_softc(dev); 173 int err; 174 175 if ((err = mmc_delete_cards(sc)) != 0) 176 return (err); 177 mmc_power_down(sc); 178 MMC_LOCK_DESTROY(sc); 179 180 return (0); 181 } 182 183 static int 184 mmc_suspend(device_t dev) 185 { 186 struct mmc_softc *sc = device_get_softc(dev); 187 int err; 188 189 err = bus_generic_suspend(dev); 190 if (err) 191 return (err); 192 mmc_power_down(sc); 193 return (0); 194 } 195 196 static int 197 mmc_resume(device_t dev) 198 { 199 struct mmc_softc *sc = device_get_softc(dev); 200 201 mmc_scan(sc); 202 return (bus_generic_resume(dev)); 203 } 204 205 static int 206 mmc_acquire_bus(device_t busdev, device_t dev) 207 { 208 struct mmc_softc *sc; 209 struct mmc_ivars *ivar; 210 int err; 211 int rca; 212 213 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 214 if (err) 215 return (err); 216 sc = device_get_softc(busdev); 217 MMC_LOCK(sc); 218 if (sc->owner) 219 panic("mmc: host bridge didn't seralize us."); 220 sc->owner = dev; 221 MMC_UNLOCK(sc); 222 223 if (busdev != dev) { 224 /* 225 * Keep track of the last rca that we've selected. If 226 * we're asked to do it again, don't. We never 227 * unselect unless the bus code itself wants the mmc 228 * bus, and constantly reselecting causes problems. 229 */ 230 rca = mmc_get_rca(dev); 231 if (sc->last_rca != rca) { 232 mmc_select_card(sc, rca); 233 sc->last_rca = rca; 234 /* Prepare bus width for the new card. */ 235 ivar = device_get_ivars(dev); 236 if (bootverbose) { 237 device_printf(busdev, 238 "setting bus width to %d bits\n", 239 (ivar->bus_width == bus_width_4) ? 4 : 240 (ivar->bus_width == bus_width_8) ? 8 : 1); 241 } 242 mmc_set_card_bus_width(sc, rca, ivar->bus_width); 243 mmcbr_set_bus_width(busdev, ivar->bus_width); 244 mmcbr_update_ios(busdev); 245 } 246 } else { 247 /* 248 * If there's a card selected, stand down. 249 */ 250 if (sc->last_rca != 0) { 251 mmc_select_card(sc, 0); 252 sc->last_rca = 0; 253 } 254 } 255 256 return (0); 257 } 258 259 static int 260 mmc_release_bus(device_t busdev, device_t dev) 261 { 262 struct mmc_softc *sc; 263 int err; 264 265 sc = device_get_softc(busdev); 266 267 MMC_LOCK(sc); 268 if (!sc->owner) 269 panic("mmc: releasing unowned bus."); 270 if (sc->owner != dev) 271 panic("mmc: you don't own the bus. game over."); 272 MMC_UNLOCK(sc); 273 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 274 if (err) 275 return (err); 276 MMC_LOCK(sc); 277 sc->owner = NULL; 278 MMC_UNLOCK(sc); 279 return (0); 280 } 281 282 static uint32_t 283 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 284 { 285 286 return (ocr & MMC_OCR_VOLTAGE); 287 } 288 289 static int 290 mmc_highest_voltage(uint32_t ocr) 291 { 292 int i; 293 294 for (i = 30; i >= 0; i--) 295 if (ocr & (1 << i)) 296 return (i); 297 return (-1); 298 } 299 300 static void 301 mmc_wakeup(struct mmc_request *req) 302 { 303 struct mmc_softc *sc; 304 305 sc = (struct mmc_softc *)req->done_data; 306 MMC_LOCK(sc); 307 req->flags |= MMC_REQ_DONE; 308 MMC_UNLOCK(sc); 309 wakeup(req); 310 } 311 312 static int 313 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 314 { 315 316 req->done = mmc_wakeup; 317 req->done_data = sc; 318 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 319 MMC_LOCK(sc); 320 while ((req->flags & MMC_REQ_DONE) == 0) 321 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 322 MMC_UNLOCK(sc); 323 return (0); 324 } 325 326 static int 327 mmc_wait_for_request(device_t brdev, device_t reqdev, struct mmc_request *req) 328 { 329 struct mmc_softc *sc = device_get_softc(brdev); 330 331 return (mmc_wait_for_req(sc, req)); 332 } 333 334 static int 335 mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, int retries) 336 { 337 struct mmc_request mreq; 338 339 memset(&mreq, 0, sizeof(mreq)); 340 memset(cmd->resp, 0, sizeof(cmd->resp)); 341 cmd->retries = retries; 342 mreq.cmd = cmd; 343 /* printf("CMD: %x ARG %x\n", cmd->opcode, cmd->arg); */ 344 mmc_wait_for_req(sc, &mreq); 345 return (cmd->error); 346 } 347 348 static int 349 mmc_wait_for_app_cmd(struct mmc_softc *sc, uint32_t rca, 350 struct mmc_command *cmd, int retries) 351 { 352 struct mmc_command appcmd; 353 int err = MMC_ERR_NONE, i; 354 355 for (i = 0; i <= retries; i++) { 356 appcmd.opcode = MMC_APP_CMD; 357 appcmd.arg = rca << 16; 358 appcmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 359 appcmd.data = NULL; 360 mmc_wait_for_cmd(sc, &appcmd, 0); 361 err = appcmd.error; 362 if (err != MMC_ERR_NONE) 363 continue; 364 if (!(appcmd.resp[0] & R1_APP_CMD)) 365 return MMC_ERR_FAILED; 366 mmc_wait_for_cmd(sc, cmd, 0); 367 err = cmd->error; 368 if (err == MMC_ERR_NONE) 369 break; 370 } 371 return (err); 372 } 373 374 static int 375 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 376 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 377 { 378 struct mmc_command cmd; 379 int err; 380 381 memset(&cmd, 0, sizeof(cmd)); 382 cmd.opcode = opcode; 383 cmd.arg = arg; 384 cmd.flags = flags; 385 cmd.data = NULL; 386 err = mmc_wait_for_cmd(sc, &cmd, retries); 387 if (err) 388 return (err); 389 if (cmd.error) 390 return (cmd.error); 391 if (resp) { 392 if (flags & MMC_RSP_136) 393 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 394 else 395 *resp = cmd.resp[0]; 396 } 397 return (0); 398 } 399 400 static void 401 mmc_idle_cards(struct mmc_softc *sc) 402 { 403 device_t dev; 404 struct mmc_command cmd; 405 406 dev = sc->dev; 407 mmcbr_set_chip_select(dev, cs_high); 408 mmcbr_update_ios(dev); 409 mmc_ms_delay(1); 410 411 memset(&cmd, 0, sizeof(cmd)); 412 cmd.opcode = MMC_GO_IDLE_STATE; 413 cmd.arg = 0; 414 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 415 cmd.data = NULL; 416 mmc_wait_for_cmd(sc, &cmd, 0); 417 mmc_ms_delay(1); 418 419 mmcbr_set_chip_select(dev, cs_dontcare); 420 mmcbr_update_ios(dev); 421 mmc_ms_delay(1); 422 } 423 424 static int 425 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 426 { 427 struct mmc_command cmd; 428 int err = MMC_ERR_NONE, i; 429 430 memset(&cmd, 0, sizeof(cmd)); 431 cmd.opcode = ACMD_SD_SEND_OP_COND; 432 cmd.arg = ocr; 433 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 434 cmd.data = NULL; 435 436 for (i = 0; i < 100; i++) { 437 err = mmc_wait_for_app_cmd(sc, 0, &cmd, CMD_RETRIES); 438 if (err != MMC_ERR_NONE) 439 break; 440 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 441 (ocr & MMC_OCR_VOLTAGE) == 0) 442 break; 443 err = MMC_ERR_TIMEOUT; 444 mmc_ms_delay(10); 445 } 446 if (rocr && err == MMC_ERR_NONE) 447 *rocr = cmd.resp[0]; 448 return (err); 449 } 450 451 static int 452 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 453 { 454 struct mmc_command cmd; 455 int err = MMC_ERR_NONE, i; 456 457 memset(&cmd, 0, sizeof(cmd)); 458 cmd.opcode = MMC_SEND_OP_COND; 459 cmd.arg = ocr; 460 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 461 cmd.data = NULL; 462 463 for (i = 0; i < 100; i++) { 464 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 465 if (err != MMC_ERR_NONE) 466 break; 467 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 468 (ocr & MMC_OCR_VOLTAGE) == 0) 469 break; 470 err = MMC_ERR_TIMEOUT; 471 mmc_ms_delay(10); 472 } 473 if (rocr && err == MMC_ERR_NONE) 474 *rocr = cmd.resp[0]; 475 return (err); 476 } 477 478 static int 479 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 480 { 481 struct mmc_command cmd; 482 int err; 483 484 memset(&cmd, 0, sizeof(cmd)); 485 cmd.opcode = SD_SEND_IF_COND; 486 cmd.arg = (vhs << 8) + 0xAA; 487 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 488 cmd.data = NULL; 489 490 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 491 return (err); 492 } 493 494 static void 495 mmc_power_up(struct mmc_softc *sc) 496 { 497 device_t dev; 498 499 dev = sc->dev; 500 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 501 mmcbr_set_bus_mode(dev, opendrain); 502 mmcbr_set_chip_select(dev, cs_dontcare); 503 mmcbr_set_bus_width(dev, bus_width_1); 504 mmcbr_set_power_mode(dev, power_up); 505 mmcbr_set_clock(dev, 0); 506 mmcbr_update_ios(dev); 507 mmc_ms_delay(1); 508 509 mmcbr_set_clock(dev, mmcbr_get_f_min(sc->dev)); 510 mmcbr_set_timing(dev, bus_timing_normal); 511 mmcbr_set_power_mode(dev, power_on); 512 mmcbr_update_ios(dev); 513 mmc_ms_delay(2); 514 } 515 516 static void 517 mmc_power_down(struct mmc_softc *sc) 518 { 519 device_t dev = sc->dev; 520 521 mmcbr_set_bus_mode(dev, opendrain); 522 mmcbr_set_chip_select(dev, cs_dontcare); 523 mmcbr_set_bus_width(dev, bus_width_1); 524 mmcbr_set_power_mode(dev, power_off); 525 mmcbr_set_clock(dev, 0); 526 mmcbr_set_timing(dev, bus_timing_normal); 527 mmcbr_update_ios(dev); 528 } 529 530 static int 531 mmc_select_card(struct mmc_softc *sc, uint16_t rca) 532 { 533 int flags; 534 535 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 536 return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 537 flags, NULL, CMD_RETRIES)); 538 } 539 540 static int 541 mmc_switch(struct mmc_softc *sc, uint8_t set, uint8_t index, uint8_t value) 542 { 543 struct mmc_command cmd; 544 int err; 545 546 cmd.opcode = MMC_SWITCH_FUNC; 547 cmd.arg = (MMC_SWITCH_FUNC_WR << 24) | 548 (index << 16) | 549 (value << 8) | 550 set; 551 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC; 552 cmd.data = NULL; 553 err = mmc_wait_for_cmd(sc, &cmd, 0); 554 return (err); 555 } 556 557 static int 558 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, uint8_t *res) 559 { 560 int err; 561 struct mmc_command cmd; 562 struct mmc_data data; 563 564 memset(&cmd, 0, sizeof(struct mmc_command)); 565 memset(&data, 0, sizeof(struct mmc_data)); 566 567 memset(res, 0, 64); 568 cmd.opcode = SD_SWITCH_FUNC; 569 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 570 cmd.arg = mode << 31; 571 cmd.arg |= 0x00FFFFFF; 572 cmd.arg &= ~(0xF << (grp * 4)); 573 cmd.arg |= value << (grp * 4); 574 cmd.data = &data; 575 576 data.data = res; 577 data.len = 64; 578 data.flags = MMC_DATA_READ; 579 580 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 581 return (err); 582 } 583 584 static int 585 mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width) 586 { 587 int err; 588 589 if (mmcbr_get_mode(sc->dev) == mode_sd) { 590 struct mmc_command cmd; 591 592 memset(&cmd, 0, sizeof(struct mmc_command)); 593 cmd.opcode = ACMD_SET_BUS_WIDTH; 594 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 595 switch (width) { 596 case bus_width_1: 597 cmd.arg = SD_BUS_WIDTH_1; 598 break; 599 case bus_width_4: 600 cmd.arg = SD_BUS_WIDTH_4; 601 break; 602 default: 603 return (MMC_ERR_INVALID); 604 } 605 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES); 606 } else { 607 uint8_t value; 608 609 switch (width) { 610 case bus_width_1: 611 value = EXT_CSD_BUS_WIDTH_1; 612 break; 613 case bus_width_4: 614 value = EXT_CSD_BUS_WIDTH_4; 615 break; 616 case bus_width_8: 617 value = EXT_CSD_BUS_WIDTH_8; 618 break; 619 default: 620 return (MMC_ERR_INVALID); 621 } 622 err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value); 623 } 624 return (err); 625 } 626 627 static int 628 mmc_set_timing(struct mmc_softc *sc, int timing) 629 { 630 int err; 631 uint8_t value; 632 633 switch (timing) { 634 case bus_timing_normal: 635 value = 0; 636 break; 637 case bus_timing_hs: 638 value = 1; 639 break; 640 default: 641 return (MMC_ERR_INVALID); 642 } 643 if (mmcbr_get_mode(sc->dev) == mode_sd) { 644 u_char switch_res[64]; 645 646 err = mmc_sd_switch(sc, 1, 0, value, switch_res); 647 } else { 648 err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, 649 EXT_CSD_HS_TIMING, value); 650 } 651 return (err); 652 } 653 654 static int 655 mmc_test_bus_width(struct mmc_softc *sc) 656 { 657 struct mmc_command cmd; 658 struct mmc_data data; 659 int err; 660 uint8_t buf[8]; 661 uint8_t p8[8] = { 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 662 uint8_t p8ok[8] = { 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 663 uint8_t p4[4] = { 0x5A, 0x00, 0x00, 0x00, }; 664 uint8_t p4ok[4] = { 0xA5, 0x00, 0x00, 0x00, }; 665 666 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 667 mmcbr_set_bus_width(sc->dev, bus_width_8); 668 mmcbr_update_ios(sc->dev); 669 670 cmd.opcode = MMC_BUSTEST_W; 671 cmd.arg = 0; 672 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 673 cmd.data = &data; 674 675 data.data = p8; 676 data.len = 8; 677 data.flags = MMC_DATA_WRITE; 678 mmc_wait_for_cmd(sc, &cmd, 0); 679 680 cmd.opcode = MMC_BUSTEST_R; 681 cmd.arg = 0; 682 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 683 cmd.data = &data; 684 685 data.data = buf; 686 data.len = 8; 687 data.flags = MMC_DATA_READ; 688 err = mmc_wait_for_cmd(sc, &cmd, 0); 689 690 mmcbr_set_bus_width(sc->dev, bus_width_1); 691 mmcbr_update_ios(sc->dev); 692 693 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 694 return (bus_width_8); 695 } 696 697 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 698 mmcbr_set_bus_width(sc->dev, bus_width_4); 699 mmcbr_update_ios(sc->dev); 700 701 cmd.opcode = MMC_BUSTEST_W; 702 cmd.arg = 0; 703 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 704 cmd.data = &data; 705 706 data.data = p4; 707 data.len = 4; 708 data.flags = MMC_DATA_WRITE; 709 mmc_wait_for_cmd(sc, &cmd, 0); 710 711 cmd.opcode = MMC_BUSTEST_R; 712 cmd.arg = 0; 713 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 714 cmd.data = &data; 715 716 data.data = buf; 717 data.len = 4; 718 data.flags = MMC_DATA_READ; 719 err = mmc_wait_for_cmd(sc, &cmd, 0); 720 721 mmcbr_set_bus_width(sc->dev, bus_width_1); 722 mmcbr_update_ios(sc->dev); 723 724 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 725 return (bus_width_4); 726 } 727 return (bus_width_1); 728 } 729 730 static uint32_t 731 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 732 { 733 const int i = (bit_len / 32) - (start / 32) - 1; 734 const int shift = start & 31; 735 uint32_t retval = bits[i] >> shift; 736 if (size + shift > 32) 737 retval |= bits[i - 1] << (32 - shift); 738 return (retval & ((1 << size) - 1)); 739 } 740 741 static void 742 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 743 { 744 int i; 745 746 /* There's no version info, so we take it on faith */ 747 memset(cid, 0, sizeof(*cid)); 748 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 749 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 750 for (i = 0; i < 5; i++) 751 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 752 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 753 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 754 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2001; 755 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 756 } 757 758 static void 759 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 760 { 761 int i; 762 763 /* There's no version info, so we take it on faith */ 764 memset(cid, 0, sizeof(*cid)); 765 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 766 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 767 for (i = 0; i < 6; i++) 768 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 769 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 770 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 771 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 772 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 773 } 774 775 static const int exp[8] = { 776 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 777 }; 778 static const int mant[16] = { 779 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 780 }; 781 static const int cur_min[8] = { 782 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 783 }; 784 static const int cur_max[8] = { 785 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 786 }; 787 788 static void 789 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 790 { 791 int v; 792 int m; 793 int e; 794 795 memset(csd, 0, sizeof(*csd)); 796 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 797 if (v == 0) { 798 m = mmc_get_bits(raw_csd, 128, 115, 4); 799 e = mmc_get_bits(raw_csd, 128, 112, 3); 800 csd->tacc = exp[e] * mant[m] + 9 / 10; 801 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 802 m = mmc_get_bits(raw_csd, 128, 99, 4); 803 e = mmc_get_bits(raw_csd, 128, 96, 3); 804 csd->tran_speed = exp[e] * 10000 * mant[m]; 805 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 806 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 807 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 808 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 809 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 810 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 811 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 812 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 813 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 814 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 815 m = mmc_get_bits(raw_csd, 128, 62, 12); 816 e = mmc_get_bits(raw_csd, 128, 47, 3); 817 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 818 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 819 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 820 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 821 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 822 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 823 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 824 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 825 } else if (v == 1) { 826 m = mmc_get_bits(raw_csd, 128, 115, 4); 827 e = mmc_get_bits(raw_csd, 128, 112, 3); 828 csd->tacc = exp[e] * mant[m] + 9 / 10; 829 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 830 m = mmc_get_bits(raw_csd, 128, 99, 4); 831 e = mmc_get_bits(raw_csd, 128, 96, 3); 832 csd->tran_speed = exp[e] * 10000 * mant[m]; 833 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 834 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 835 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 836 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 837 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 838 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 839 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 840 512 * 1024; 841 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 842 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 843 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 844 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 845 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 846 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 847 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 848 } else 849 panic("unknown SD CSD version"); 850 } 851 852 static void 853 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 854 { 855 int m; 856 int e; 857 858 memset(csd, 0, sizeof(*csd)); 859 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 860 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 861 m = mmc_get_bits(raw_csd, 128, 115, 4); 862 e = mmc_get_bits(raw_csd, 128, 112, 3); 863 csd->tacc = exp[e] * mant[m] + 9 / 10; 864 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 865 m = mmc_get_bits(raw_csd, 128, 99, 4); 866 e = mmc_get_bits(raw_csd, 128, 96, 3); 867 csd->tran_speed = exp[e] * 10000 * mant[m]; 868 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 869 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 870 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 871 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 872 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 873 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 874 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 875 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 876 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 877 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 878 m = mmc_get_bits(raw_csd, 128, 62, 12); 879 e = mmc_get_bits(raw_csd, 128, 47, 3); 880 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 881 csd->erase_blk_en = 0; 882 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 883 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 884 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 885 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 886 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 887 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 888 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 889 } 890 891 static void 892 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 893 { 894 unsigned int scr_struct; 895 896 memset(scr, 0, sizeof(*scr)); 897 898 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 899 if (scr_struct != 0) { 900 printf("Unrecognised SCR structure version %d\n", 901 scr_struct); 902 return; 903 } 904 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 905 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 906 } 907 908 static void 909 mmc_app_decode_sd_status(uint32_t *raw_sd_status, 910 struct mmc_sd_status *sd_status) 911 { 912 913 memset(sd_status, 0, sizeof(*sd_status)); 914 915 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 916 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 917 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 918 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 919 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 920 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 921 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 922 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 923 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 924 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 925 } 926 927 static int 928 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 929 { 930 struct mmc_command cmd; 931 int err; 932 933 cmd.opcode = MMC_ALL_SEND_CID; 934 cmd.arg = 0; 935 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 936 cmd.data = NULL; 937 err = mmc_wait_for_cmd(sc, &cmd, 0); 938 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 939 return (err); 940 } 941 942 static int 943 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcid) 944 { 945 struct mmc_command cmd; 946 int err; 947 948 cmd.opcode = MMC_SEND_CSD; 949 cmd.arg = rca << 16; 950 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 951 cmd.data = NULL; 952 err = mmc_wait_for_cmd(sc, &cmd, 0); 953 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 954 return (err); 955 } 956 957 static int 958 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 959 { 960 int err; 961 struct mmc_command cmd; 962 struct mmc_data data; 963 964 memset(&cmd, 0, sizeof(struct mmc_command)); 965 memset(&data, 0, sizeof(struct mmc_data)); 966 967 memset(rawscr, 0, 8); 968 cmd.opcode = ACMD_SEND_SCR; 969 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 970 cmd.arg = 0; 971 cmd.data = &data; 972 973 data.data = rawscr; 974 data.len = 8; 975 data.flags = MMC_DATA_READ; 976 977 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES); 978 rawscr[0] = be32toh(rawscr[0]); 979 rawscr[1] = be32toh(rawscr[1]); 980 return (err); 981 } 982 983 static int 984 mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd) 985 { 986 int err; 987 struct mmc_command cmd; 988 struct mmc_data data; 989 990 memset(&cmd, 0, sizeof(struct mmc_command)); 991 memset(&data, 0, sizeof(struct mmc_data)); 992 993 memset(rawextcsd, 0, 512); 994 cmd.opcode = MMC_SEND_EXT_CSD; 995 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 996 cmd.arg = 0; 997 cmd.data = &data; 998 999 data.data = rawextcsd; 1000 data.len = 512; 1001 data.flags = MMC_DATA_READ; 1002 1003 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 1004 return (err); 1005 } 1006 1007 static int 1008 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1009 { 1010 int err, i; 1011 struct mmc_command cmd; 1012 struct mmc_data data; 1013 1014 memset(&cmd, 0, sizeof(struct mmc_command)); 1015 memset(&data, 0, sizeof(struct mmc_data)); 1016 1017 memset(rawsdstatus, 0, 64); 1018 cmd.opcode = ACMD_SD_STATUS; 1019 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1020 cmd.arg = 0; 1021 cmd.data = &data; 1022 1023 data.data = rawsdstatus; 1024 data.len = 64; 1025 data.flags = MMC_DATA_READ; 1026 1027 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES); 1028 for (i = 0; i < 16; i++) 1029 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1030 return (err); 1031 } 1032 1033 static int 1034 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1035 { 1036 struct mmc_command cmd; 1037 int err; 1038 1039 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1040 cmd.arg = resp << 16; 1041 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1042 cmd.data = NULL; 1043 err = mmc_wait_for_cmd(sc, &cmd, 0); 1044 return (err); 1045 } 1046 1047 static int 1048 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1049 { 1050 struct mmc_command cmd; 1051 int err; 1052 1053 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1054 cmd.arg = 0; 1055 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1056 cmd.data = NULL; 1057 err = mmc_wait_for_cmd(sc, &cmd, 0); 1058 *resp = cmd.resp[0]; 1059 return (err); 1060 } 1061 1062 static void 1063 mmc_discover_cards(struct mmc_softc *sc) 1064 { 1065 struct mmc_ivars *ivar = NULL; 1066 device_t *devlist; 1067 int err, i, devcount, newcard; 1068 uint32_t raw_cid[4]; 1069 uint32_t resp, sec_count; 1070 device_t child; 1071 uint16_t rca = 2; 1072 u_char switch_res[64]; 1073 1074 while (1) { 1075 err = mmc_all_send_cid(sc, raw_cid); 1076 if (err == MMC_ERR_TIMEOUT) 1077 break; 1078 if (err != MMC_ERR_NONE) { 1079 device_printf(sc->dev, "Error reading CID %d\n", err); 1080 break; 1081 } 1082 newcard = 1; 1083 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1084 return; 1085 for (i = 0; i < devcount; i++) { 1086 ivar = device_get_ivars(devlist[i]); 1087 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 0) { 1088 newcard = 0; 1089 break; 1090 } 1091 } 1092 free(devlist, M_TEMP); 1093 if (newcard) { 1094 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1095 M_WAITOK | M_ZERO); 1096 if (!ivar) 1097 return; 1098 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1099 } 1100 if (mmcbr_get_ro(sc->dev)) 1101 ivar->read_only = 1; 1102 ivar->bus_width = bus_width_1; 1103 ivar->mode = mmcbr_get_mode(sc->dev); 1104 if (ivar->mode == mode_sd) { 1105 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1106 mmc_send_relative_addr(sc, &resp); 1107 ivar->rca = resp >> 16; 1108 /* Get card CSD. */ 1109 mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1110 mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1111 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1112 if (ivar->csd.csd_structure > 0) 1113 ivar->high_cap = 1; 1114 ivar->tran_speed = ivar->csd.tran_speed; 1115 ivar->erase_sector = ivar->csd.erase_sector * 1116 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1117 /* Get card SCR. Card must be selected to fetch it. */ 1118 mmc_select_card(sc, ivar->rca); 1119 mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1120 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1121 /* Get card switch capabilities. */ 1122 if ((ivar->scr.sda_vsn >= 1) && 1123 (ivar->csd.ccc & (1<<10))) { 1124 mmc_sd_switch(sc, 0, 0, 0xF, switch_res); 1125 if (switch_res[13] & 2) { 1126 ivar->timing = bus_timing_hs; 1127 ivar->hs_tran_speed = 50000000; 1128 } 1129 } 1130 mmc_app_sd_status(sc, ivar->rca, ivar->raw_sd_status); 1131 mmc_app_decode_sd_status(ivar->raw_sd_status, 1132 &ivar->sd_status); 1133 if (ivar->sd_status.au_size != 0) { 1134 ivar->erase_sector = 1135 16 << ivar->sd_status.au_size; 1136 } 1137 mmc_select_card(sc, 0); 1138 /* Find max supported bus width. */ 1139 if ((mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) && 1140 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1141 ivar->bus_width = bus_width_4; 1142 if (newcard) { 1143 /* Add device. */ 1144 child = device_add_child(sc->dev, NULL, -1); 1145 device_set_ivars(child, ivar); 1146 } 1147 return; 1148 } 1149 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid); 1150 ivar->rca = rca++; 1151 mmc_set_relative_addr(sc, ivar->rca); 1152 /* Get card CSD. */ 1153 mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1154 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1155 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1156 ivar->tran_speed = ivar->csd.tran_speed; 1157 ivar->erase_sector = ivar->csd.erase_sector * 1158 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1159 /* Only MMC >= 4.x cards support EXT_CSD. */ 1160 if (ivar->csd.spec_vers >= 4) { 1161 /* Card must be selected to fetch EXT_CSD. */ 1162 mmc_select_card(sc, ivar->rca); 1163 mmc_send_ext_csd(sc, ivar->raw_ext_csd); 1164 /* Handle extended capacity from EXT_CSD */ 1165 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] + 1166 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1167 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1168 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1169 if (sec_count != 0) { 1170 ivar->sec_count = sec_count; 1171 ivar->high_cap = 1; 1172 } 1173 /* Get card speed in high speed mode. */ 1174 ivar->timing = bus_timing_hs; 1175 if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] 1176 & EXT_CSD_CARD_TYPE_52) 1177 ivar->hs_tran_speed = 52000000; 1178 else if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] 1179 & EXT_CSD_CARD_TYPE_26) 1180 ivar->hs_tran_speed = 26000000; 1181 else 1182 ivar->hs_tran_speed = ivar->tran_speed; 1183 /* Find max supported bus width. */ 1184 ivar->bus_width = mmc_test_bus_width(sc); 1185 mmc_select_card(sc, 0); 1186 /* Handle HC erase sector size. */ 1187 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1188 ivar->erase_sector = 1024 * 1189 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1190 mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, 1191 EXT_CSD_ERASE_GRP_DEF, 1); 1192 } 1193 } else { 1194 ivar->bus_width = bus_width_1; 1195 ivar->timing = bus_timing_normal; 1196 } 1197 if (newcard) { 1198 /* Add device. */ 1199 child = device_add_child(sc->dev, NULL, -1); 1200 device_set_ivars(child, ivar); 1201 } 1202 } 1203 } 1204 1205 static void 1206 mmc_rescan_cards(struct mmc_softc *sc) 1207 { 1208 struct mmc_ivars *ivar = NULL; 1209 device_t *devlist; 1210 int err, i, devcount; 1211 1212 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1213 return; 1214 for (i = 0; i < devcount; i++) { 1215 ivar = device_get_ivars(devlist[i]); 1216 if (mmc_select_card(sc, ivar->rca)) { 1217 device_delete_child(sc->dev, devlist[i]); 1218 free(ivar, M_DEVBUF); 1219 } 1220 } 1221 free(devlist, M_TEMP); 1222 mmc_select_card(sc, 0); 1223 } 1224 1225 static int 1226 mmc_delete_cards(struct mmc_softc *sc) 1227 { 1228 struct mmc_ivars *ivar; 1229 device_t *devlist; 1230 int err, i, devcount; 1231 1232 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) 1233 return (err); 1234 for (i = 0; i < devcount; i++) { 1235 ivar = device_get_ivars(devlist[i]); 1236 device_delete_child(sc->dev, devlist[i]); 1237 free(ivar, M_DEVBUF); 1238 } 1239 free(devlist, M_TEMP); 1240 return (0); 1241 } 1242 1243 static void 1244 mmc_go_discovery(struct mmc_softc *sc) 1245 { 1246 uint32_t ocr; 1247 device_t dev; 1248 int err; 1249 1250 dev = sc->dev; 1251 if (mmcbr_get_power_mode(dev) != power_on) { 1252 /* 1253 * First, try SD modes 1254 */ 1255 mmcbr_set_mode(dev, mode_sd); 1256 mmc_power_up(sc); 1257 mmcbr_set_bus_mode(dev, pushpull); 1258 mmc_idle_cards(sc); 1259 err = mmc_send_if_cond(sc, 1); 1260 if (mmc_send_app_op_cond(sc, err ? 0 : MMC_OCR_CCS, &ocr) != 1261 MMC_ERR_NONE) { 1262 /* 1263 * Failed, try MMC 1264 */ 1265 mmcbr_set_mode(dev, mode_mmc); 1266 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) 1267 ocr = 0; /* Failed both, powerdown. */ 1268 } 1269 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 1270 if (mmcbr_get_ocr(dev) != 0) 1271 mmc_idle_cards(sc); 1272 } else { 1273 mmcbr_set_bus_mode(dev, opendrain); 1274 mmcbr_set_clock(dev, mmcbr_get_f_min(dev)); 1275 mmcbr_update_ios(dev); 1276 /* XXX recompute vdd based on new cards? */ 1277 } 1278 /* 1279 * Make sure that we have a mutually agreeable voltage to at least 1280 * one card on the bus. 1281 */ 1282 if (mmcbr_get_ocr(dev) == 0) { 1283 mmc_delete_cards(sc); 1284 mmc_power_down(sc); 1285 return; 1286 } 1287 /* 1288 * Reselect the cards after we've idled them above. 1289 */ 1290 if (mmcbr_get_mode(dev) == mode_sd) { 1291 err = mmc_send_if_cond(sc, 1); 1292 mmc_send_app_op_cond(sc, 1293 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 1294 } else 1295 mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); 1296 mmc_discover_cards(sc); 1297 mmc_rescan_cards(sc); 1298 1299 mmcbr_set_bus_mode(dev, pushpull); 1300 mmcbr_update_ios(dev); 1301 mmc_calculate_clock(sc); 1302 bus_generic_attach(dev); 1303 /* mmc_update_children_sysctl(dev);*/ 1304 } 1305 1306 static int 1307 mmc_calculate_clock(struct mmc_softc *sc) 1308 { 1309 int max_dtr, max_hs_dtr, max_timing; 1310 int nkid, i, f_min, f_max; 1311 device_t *kids; 1312 struct mmc_ivars *ivar; 1313 1314 f_min = mmcbr_get_f_min(sc->dev); 1315 f_max = mmcbr_get_f_max(sc->dev); 1316 max_dtr = max_hs_dtr = f_max; 1317 if ((mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED)) 1318 max_timing = bus_timing_hs; 1319 else 1320 max_timing = bus_timing_normal; 1321 if (device_get_children(sc->dev, &kids, &nkid) != 0) 1322 panic("can't get children"); 1323 for (i = 0; i < nkid; i++) { 1324 ivar = device_get_ivars(kids[i]); 1325 if (ivar->timing < max_timing) 1326 max_timing = ivar->timing; 1327 if (ivar->tran_speed < max_dtr) 1328 max_dtr = ivar->tran_speed; 1329 if (ivar->hs_tran_speed < max_dtr) 1330 max_hs_dtr = ivar->hs_tran_speed; 1331 } 1332 for (i = 0; i < nkid; i++) { 1333 ivar = device_get_ivars(kids[i]); 1334 if (ivar->timing == bus_timing_normal) 1335 continue; 1336 mmc_select_card(sc, ivar->rca); 1337 mmc_set_timing(sc, max_timing); 1338 } 1339 mmc_select_card(sc, 0); 1340 free(kids, M_TEMP); 1341 if (max_timing == bus_timing_hs) 1342 max_dtr = max_hs_dtr; 1343 if (bootverbose) { 1344 device_printf(sc->dev, 1345 "setting transfer rate to %d.%03dMHz%s\n", 1346 max_dtr / 1000000, (max_dtr / 1000) % 1000, 1347 max_timing == bus_timing_hs ? " (high speed timing)" : ""); 1348 } 1349 mmcbr_set_timing(sc->dev, max_timing); 1350 mmcbr_set_clock(sc->dev, max_dtr); 1351 mmcbr_update_ios(sc->dev); 1352 return max_dtr; 1353 } 1354 1355 static void 1356 mmc_scan(struct mmc_softc *sc) 1357 { 1358 device_t dev = sc->dev; 1359 1360 mmc_acquire_bus(dev, dev); 1361 mmc_go_discovery(sc); 1362 mmc_release_bus(dev, dev); 1363 } 1364 1365 static int 1366 mmc_read_ivar(device_t bus, device_t child, int which, u_char *result) 1367 { 1368 struct mmc_ivars *ivar = device_get_ivars(child); 1369 1370 switch (which) { 1371 default: 1372 return (EINVAL); 1373 case MMC_IVAR_DSR_IMP: 1374 *(int *)result = ivar->csd.dsr_imp; 1375 break; 1376 case MMC_IVAR_MEDIA_SIZE: 1377 *(off_t *)result = ivar->sec_count; 1378 break; 1379 case MMC_IVAR_RCA: 1380 *(int *)result = ivar->rca; 1381 break; 1382 case MMC_IVAR_SECTOR_SIZE: 1383 *(int *)result = MMC_SECTOR_SIZE; 1384 break; 1385 case MMC_IVAR_TRAN_SPEED: 1386 *(int *)result = mmcbr_get_clock(bus); 1387 break; 1388 case MMC_IVAR_READ_ONLY: 1389 *(int *)result = ivar->read_only; 1390 break; 1391 case MMC_IVAR_HIGH_CAP: 1392 *(int *)result = ivar->high_cap; 1393 break; 1394 case MMC_IVAR_CARD_TYPE: 1395 *(int *)result = ivar->mode; 1396 break; 1397 case MMC_IVAR_BUS_WIDTH: 1398 *(int *)result = ivar->bus_width; 1399 break; 1400 case MMC_IVAR_ERASE_SECTOR: 1401 *(int *)result = ivar->erase_sector; 1402 break; 1403 case MMC_IVAR_MAX_DATA: 1404 *(int *)result = mmcbr_get_max_data(bus); 1405 break; 1406 } 1407 return (0); 1408 } 1409 1410 static int 1411 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 1412 { 1413 /* 1414 * None are writable ATM 1415 */ 1416 return (EINVAL); 1417 } 1418 1419 1420 static void 1421 mmc_delayed_attach(void *xsc) 1422 { 1423 struct mmc_softc *sc = xsc; 1424 1425 mmc_scan(sc); 1426 config_intrhook_disestablish(&sc->config_intrhook); 1427 } 1428 1429 static device_method_t mmc_methods[] = { 1430 /* device_if */ 1431 DEVMETHOD(device_probe, mmc_probe), 1432 DEVMETHOD(device_attach, mmc_attach), 1433 DEVMETHOD(device_detach, mmc_detach), 1434 DEVMETHOD(device_suspend, mmc_suspend), 1435 DEVMETHOD(device_resume, mmc_resume), 1436 1437 /* Bus interface */ 1438 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 1439 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 1440 1441 /* MMC Bus interface */ 1442 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 1443 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 1444 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 1445 1446 {0, 0}, 1447 }; 1448 1449 static driver_t mmc_driver = { 1450 "mmc", 1451 mmc_methods, 1452 sizeof(struct mmc_softc), 1453 }; 1454 static devclass_t mmc_devclass; 1455 1456 1457 DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, 0, 0); 1458 DRIVER_MODULE(mmc, sdhci, mmc_driver, mmc_devclass, 0, 0); 1459