1 /*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * Portions of this software may have been developed with reference to 26 * the SD Simplified Specification. The following disclaimer may apply: 27 * 28 * The following conditions apply to the release of the simplified 29 * specification ("Simplified Specification") by the SD Card Association and 30 * the SD Group. The Simplified Specification is a subset of the complete SD 31 * Specification which is owned by the SD Card Association and the SD 32 * Group. This Simplified Specification is provided on a non-confidential 33 * basis subject to the disclaimers below. Any implementation of the 34 * Simplified Specification may require a license from the SD Card 35 * Association, SD Group, SD-3C LLC or other third parties. 36 * 37 * Disclaimers: 38 * 39 * The information contained in the Simplified Specification is presented only 40 * as a standard specification for SD Cards and SD Host/Ancillary products and 41 * is provided "AS-IS" without any representations or warranties of any 42 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 43 * Card Association for any damages, any infringements of patents or other 44 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 45 * parties, which may result from its use. No license is granted by 46 * implication, estoppel or otherwise under any patent or other rights of the 47 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 48 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 49 * or the SD Card Association to disclose or distribute any technical 50 * information, know-how or other confidential information to any third party. 51 */ 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/lock.h> 61 #include <sys/module.h> 62 #include <sys/mutex.h> 63 #include <sys/bus.h> 64 #include <sys/endian.h> 65 66 #include <dev/mmc/mmcreg.h> 67 #include <dev/mmc/mmcbrvar.h> 68 #include <dev/mmc/mmcvar.h> 69 #include "mmcbr_if.h" 70 #include "mmcbus_if.h" 71 72 struct mmc_softc { 73 device_t dev; 74 struct mtx sc_mtx; 75 struct intr_config_hook config_intrhook; 76 device_t owner; 77 uint32_t last_rca; 78 }; 79 80 /* 81 * Per-card data 82 */ 83 struct mmc_ivars { 84 uint32_t raw_cid[4]; /* Raw bits of the CID */ 85 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 86 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 87 uint8_t raw_ext_csd[512]; /* Raw bits of the EXT_CSD */ 88 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 89 uint16_t rca; 90 enum mmc_card_mode mode; 91 struct mmc_cid cid; /* cid decoded */ 92 struct mmc_csd csd; /* csd decoded */ 93 struct mmc_scr scr; /* scr decoded */ 94 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 95 u_char read_only; /* True when the device is read-only */ 96 u_char bus_width; /* Bus width to use */ 97 u_char timing; /* Bus timing support */ 98 u_char high_cap; /* High Capacity card (block addressed) */ 99 uint32_t sec_count; /* Card capacity in 512byte blocks */ 100 uint32_t tran_speed; /* Max speed in normal mode */ 101 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 102 uint32_t erase_sector; /* Card native erase sector size */ 103 }; 104 105 #define CMD_RETRIES 3 106 107 /* bus entry points */ 108 static int mmc_probe(device_t dev); 109 static int mmc_attach(device_t dev); 110 static int mmc_detach(device_t dev); 111 112 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 113 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 114 #define MMC_LOCK_INIT(_sc) \ 115 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \ 116 "mmc", MTX_DEF) 117 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 118 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 119 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 120 121 static int mmc_calculate_clock(struct mmc_softc *sc); 122 static void mmc_delayed_attach(void *); 123 static void mmc_power_down(struct mmc_softc *sc); 124 static int mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, 125 int retries); 126 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 127 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 128 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 129 static int mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width); 130 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr); 131 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 132 static int mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd); 133 134 static void 135 mmc_ms_delay(int ms) 136 { 137 DELAY(1000 * ms); /* XXX BAD */ 138 } 139 140 static int 141 mmc_probe(device_t dev) 142 { 143 144 device_set_desc(dev, "MMC/SD bus"); 145 return (0); 146 } 147 148 static int 149 mmc_attach(device_t dev) 150 { 151 struct mmc_softc *sc; 152 153 sc = device_get_softc(dev); 154 sc->dev = dev; 155 MMC_LOCK_INIT(sc); 156 157 /* We'll probe and attach our children later, but before / mount */ 158 sc->config_intrhook.ich_func = mmc_delayed_attach; 159 sc->config_intrhook.ich_arg = sc; 160 if (config_intrhook_establish(&sc->config_intrhook) != 0) 161 device_printf(dev, "config_intrhook_establish failed\n"); 162 return (0); 163 } 164 165 static int 166 mmc_detach(device_t dev) 167 { 168 struct mmc_softc *sc = device_get_softc(dev); 169 device_t *kids; 170 int i, nkid; 171 172 /* kill children [ph33r]. -sorbo */ 173 if (device_get_children(sc->dev, &kids, &nkid) != 0) 174 return (0); 175 for (i = 0; i < nkid; i++) { 176 device_t kid = kids[i]; 177 void *ivar = device_get_ivars(kid); 178 179 device_detach(kid); 180 device_delete_child(sc->dev, kid); 181 free(ivar, M_DEVBUF); 182 } 183 free(kids, M_TEMP); 184 mmc_power_down(sc); 185 186 MMC_LOCK_DESTROY(sc); 187 188 return (0); 189 } 190 191 static int 192 mmc_acquire_bus(device_t busdev, device_t dev) 193 { 194 struct mmc_softc *sc; 195 struct mmc_ivars *ivar; 196 int err; 197 int rca; 198 199 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 200 if (err) 201 return (err); 202 sc = device_get_softc(busdev); 203 MMC_LOCK(sc); 204 if (sc->owner) 205 panic("mmc: host bridge didn't seralize us."); 206 sc->owner = dev; 207 MMC_UNLOCK(sc); 208 209 if (busdev != dev) { 210 /* 211 * Keep track of the last rca that we've selected. If 212 * we're asked to do it again, don't. We never 213 * unselect unless the bus code itself wants the mmc 214 * bus, and constantly reselecting causes problems. 215 */ 216 rca = mmc_get_rca(dev); 217 if (sc->last_rca != rca) { 218 mmc_select_card(sc, rca); 219 sc->last_rca = rca; 220 /* Prepare bus width for the new card. */ 221 ivar = device_get_ivars(dev); 222 if (bootverbose) { 223 device_printf(busdev, 224 "setting bus width to %d bits\n", 225 (ivar->bus_width == bus_width_4) ? 4 : 226 (ivar->bus_width == bus_width_8) ? 8 : 1); 227 } 228 mmc_set_card_bus_width(sc, rca, ivar->bus_width); 229 mmcbr_set_bus_width(busdev, ivar->bus_width); 230 mmcbr_update_ios(busdev); 231 } 232 } else { 233 /* 234 * If there's a card selected, stand down. 235 */ 236 if (sc->last_rca != 0) { 237 mmc_select_card(sc, 0); 238 sc->last_rca = 0; 239 } 240 } 241 242 return (0); 243 } 244 245 static int 246 mmc_release_bus(device_t busdev, device_t dev) 247 { 248 struct mmc_softc *sc; 249 int err; 250 251 sc = device_get_softc(busdev); 252 253 MMC_LOCK(sc); 254 if (!sc->owner) 255 panic("mmc: releasing unowned bus."); 256 if (sc->owner != dev) 257 panic("mmc: you don't own the bus. game over."); 258 MMC_UNLOCK(sc); 259 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 260 if (err) 261 return (err); 262 MMC_LOCK(sc); 263 sc->owner = NULL; 264 MMC_UNLOCK(sc); 265 return (0); 266 } 267 268 static void 269 mmc_rescan_cards(struct mmc_softc *sc) 270 { 271 /* XXX: Look at the children and see if they respond to status */ 272 } 273 274 static uint32_t 275 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 276 { 277 278 return (ocr & MMC_OCR_VOLTAGE); 279 } 280 281 static int 282 mmc_highest_voltage(uint32_t ocr) 283 { 284 int i; 285 286 for (i = 30; i >= 0; i--) 287 if (ocr & (1 << i)) 288 return (i); 289 return (-1); 290 } 291 292 static void 293 mmc_wakeup(struct mmc_request *req) 294 { 295 struct mmc_softc *sc; 296 297 /* printf("Wakeup for req %p done_data %p\n", req, req->done_data); */ 298 sc = (struct mmc_softc *)req->done_data; 299 MMC_LOCK(sc); 300 req->flags |= MMC_REQ_DONE; 301 wakeup(req); 302 MMC_UNLOCK(sc); 303 } 304 305 static int 306 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 307 { 308 int err; 309 310 req->done = mmc_wakeup; 311 req->done_data = sc; 312 /* printf("Submitting request %p sc %p\n", req, sc); */ 313 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 314 MMC_LOCK(sc); 315 do { 316 err = msleep(req, &sc->sc_mtx, PZERO | PCATCH, "mmcreq", 317 hz / 10); 318 } while (!(req->flags & MMC_REQ_DONE) && err == EAGAIN); 319 /* printf("Request %p done with error %d\n", req, err); */ 320 MMC_UNLOCK(sc); 321 return (err); 322 } 323 324 static int 325 mmc_wait_for_request(device_t brdev, device_t reqdev, struct mmc_request *req) 326 { 327 struct mmc_softc *sc = device_get_softc(brdev); 328 329 return (mmc_wait_for_req(sc, req)); 330 } 331 332 static int 333 mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, int retries) 334 { 335 struct mmc_request mreq; 336 337 memset(&mreq, 0, sizeof(mreq)); 338 memset(cmd->resp, 0, sizeof(cmd->resp)); 339 cmd->retries = retries; 340 mreq.cmd = cmd; 341 /* printf("CMD: %x ARG %x\n", cmd->opcode, cmd->arg); */ 342 mmc_wait_for_req(sc, &mreq); 343 return (cmd->error); 344 } 345 346 static int 347 mmc_wait_for_app_cmd(struct mmc_softc *sc, uint32_t rca, 348 struct mmc_command *cmd, int retries) 349 { 350 struct mmc_command appcmd; 351 int err = MMC_ERR_NONE, i; 352 353 for (i = 0; i <= retries; i++) { 354 appcmd.opcode = MMC_APP_CMD; 355 appcmd.arg = rca << 16; 356 appcmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 357 appcmd.data = NULL; 358 mmc_wait_for_cmd(sc, &appcmd, 0); 359 err = appcmd.error; 360 if (err != MMC_ERR_NONE) 361 continue; 362 if (!(appcmd.resp[0] & R1_APP_CMD)) 363 return MMC_ERR_FAILED; 364 mmc_wait_for_cmd(sc, cmd, 0); 365 err = cmd->error; 366 if (err == MMC_ERR_NONE) 367 break; 368 } 369 return (err); 370 } 371 372 static int 373 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 374 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 375 { 376 struct mmc_command cmd; 377 int err; 378 379 memset(&cmd, 0, sizeof(cmd)); 380 cmd.opcode = opcode; 381 cmd.arg = arg; 382 cmd.flags = flags; 383 cmd.data = NULL; 384 err = mmc_wait_for_cmd(sc, &cmd, retries); 385 if (err) 386 return (err); 387 if (cmd.error) 388 return (cmd.error); 389 if (resp) { 390 if (flags & MMC_RSP_136) 391 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 392 else 393 *resp = cmd.resp[0]; 394 } 395 return (0); 396 } 397 398 static void 399 mmc_idle_cards(struct mmc_softc *sc) 400 { 401 device_t dev; 402 struct mmc_command cmd; 403 404 dev = sc->dev; 405 mmcbr_set_chip_select(dev, cs_high); 406 mmcbr_update_ios(dev); 407 mmc_ms_delay(1); 408 409 memset(&cmd, 0, sizeof(cmd)); 410 cmd.opcode = MMC_GO_IDLE_STATE; 411 cmd.arg = 0; 412 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 413 cmd.data = NULL; 414 mmc_wait_for_cmd(sc, &cmd, 0); 415 mmc_ms_delay(1); 416 417 mmcbr_set_chip_select(dev, cs_dontcare); 418 mmcbr_update_ios(dev); 419 mmc_ms_delay(1); 420 } 421 422 static int 423 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 424 { 425 struct mmc_command cmd; 426 int err = MMC_ERR_NONE, i; 427 428 memset(&cmd, 0, sizeof(cmd)); 429 cmd.opcode = ACMD_SD_SEND_OP_COND; 430 cmd.arg = ocr; 431 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 432 cmd.data = NULL; 433 434 for (i = 0; i < 100; i++) { 435 err = mmc_wait_for_app_cmd(sc, 0, &cmd, CMD_RETRIES); 436 if (err != MMC_ERR_NONE) 437 break; 438 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 439 (ocr & MMC_OCR_VOLTAGE) == 0) 440 break; 441 err = MMC_ERR_TIMEOUT; 442 mmc_ms_delay(10); 443 } 444 if (rocr && err == MMC_ERR_NONE) 445 *rocr = cmd.resp[0]; 446 return (err); 447 } 448 449 static int 450 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 451 { 452 struct mmc_command cmd; 453 int err = MMC_ERR_NONE, i; 454 455 memset(&cmd, 0, sizeof(cmd)); 456 cmd.opcode = MMC_SEND_OP_COND; 457 cmd.arg = ocr; 458 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 459 cmd.data = NULL; 460 461 for (i = 0; i < 100; i++) { 462 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 463 if (err != MMC_ERR_NONE) 464 break; 465 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 466 (ocr & MMC_OCR_VOLTAGE) == 0) 467 break; 468 err = MMC_ERR_TIMEOUT; 469 mmc_ms_delay(10); 470 } 471 if (rocr && err == MMC_ERR_NONE) 472 *rocr = cmd.resp[0]; 473 return (err); 474 } 475 476 static int 477 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 478 { 479 struct mmc_command cmd; 480 int err; 481 482 memset(&cmd, 0, sizeof(cmd)); 483 cmd.opcode = SD_SEND_IF_COND; 484 cmd.arg = (vhs << 8) + 0xAA; 485 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 486 cmd.data = NULL; 487 488 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 489 return (err); 490 } 491 492 static void 493 mmc_power_up(struct mmc_softc *sc) 494 { 495 device_t dev; 496 497 dev = sc->dev; 498 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 499 mmcbr_set_bus_mode(dev, opendrain); 500 mmcbr_set_chip_select(dev, cs_dontcare); 501 mmcbr_set_bus_width(dev, bus_width_1); 502 mmcbr_set_power_mode(dev, power_up); 503 mmcbr_set_clock(dev, 0); 504 mmcbr_update_ios(dev); 505 mmc_ms_delay(1); 506 507 mmcbr_set_clock(dev, mmcbr_get_f_min(sc->dev)); 508 mmcbr_set_timing(dev, bus_timing_normal); 509 mmcbr_set_power_mode(dev, power_on); 510 mmcbr_update_ios(dev); 511 mmc_ms_delay(2); 512 } 513 514 static void 515 mmc_power_down(struct mmc_softc *sc) 516 { 517 device_t dev = sc->dev; 518 519 mmcbr_set_bus_mode(dev, opendrain); 520 mmcbr_set_chip_select(dev, cs_dontcare); 521 mmcbr_set_bus_width(dev, bus_width_1); 522 mmcbr_set_power_mode(dev, power_off); 523 mmcbr_set_clock(dev, 0); 524 mmcbr_set_timing(dev, bus_timing_normal); 525 mmcbr_update_ios(dev); 526 } 527 528 static int 529 mmc_select_card(struct mmc_softc *sc, uint16_t rca) 530 { 531 int flags; 532 533 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 534 return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 535 flags, NULL, CMD_RETRIES)); 536 } 537 538 static int 539 mmc_switch(struct mmc_softc *sc, uint8_t set, uint8_t index, uint8_t value) 540 { 541 struct mmc_command cmd; 542 int err; 543 544 cmd.opcode = MMC_SWITCH_FUNC; 545 cmd.arg = (MMC_SWITCH_FUNC_WR << 24) | 546 (index << 16) | 547 (value << 8) | 548 set; 549 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC; 550 cmd.data = NULL; 551 err = mmc_wait_for_cmd(sc, &cmd, 0); 552 return (err); 553 } 554 555 static int 556 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, uint8_t *res) 557 { 558 int err; 559 struct mmc_command cmd; 560 struct mmc_data data; 561 562 memset(&cmd, 0, sizeof(struct mmc_command)); 563 memset(&data, 0, sizeof(struct mmc_data)); 564 565 memset(res, 0, 64); 566 cmd.opcode = SD_SWITCH_FUNC; 567 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 568 cmd.arg = mode << 31; 569 cmd.arg |= 0x00FFFFFF; 570 cmd.arg &= ~(0xF << (grp * 4)); 571 cmd.arg |= value << (grp * 4); 572 cmd.data = &data; 573 574 data.data = res; 575 data.len = 64; 576 data.flags = MMC_DATA_READ; 577 578 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 579 return (err); 580 } 581 582 static int 583 mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width) 584 { 585 int err; 586 587 if (mmcbr_get_mode(sc->dev) == mode_sd) { 588 struct mmc_command cmd; 589 590 memset(&cmd, 0, sizeof(struct mmc_command)); 591 cmd.opcode = ACMD_SET_BUS_WIDTH; 592 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 593 switch (width) { 594 case bus_width_1: 595 cmd.arg = SD_BUS_WIDTH_1; 596 break; 597 case bus_width_4: 598 cmd.arg = SD_BUS_WIDTH_4; 599 break; 600 default: 601 return (MMC_ERR_INVALID); 602 } 603 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES); 604 } else { 605 uint8_t value; 606 607 switch (width) { 608 case bus_width_1: 609 value = EXT_CSD_BUS_WIDTH_1; 610 break; 611 case bus_width_4: 612 value = EXT_CSD_BUS_WIDTH_4; 613 break; 614 case bus_width_8: 615 value = EXT_CSD_BUS_WIDTH_8; 616 break; 617 default: 618 return (MMC_ERR_INVALID); 619 } 620 err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value); 621 } 622 return (err); 623 } 624 625 static int 626 mmc_set_timing(struct mmc_softc *sc, int timing) 627 { 628 int err; 629 uint8_t value; 630 631 switch (timing) { 632 case bus_timing_normal: 633 value = 0; 634 break; 635 case bus_timing_hs: 636 value = 1; 637 break; 638 default: 639 return (MMC_ERR_INVALID); 640 } 641 if (mmcbr_get_mode(sc->dev) == mode_sd) { 642 u_char switch_res[64]; 643 644 err = mmc_sd_switch(sc, 1, 0, value, switch_res); 645 } else { 646 err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, 647 EXT_CSD_HS_TIMING, value); 648 } 649 return (err); 650 } 651 652 static int 653 mmc_test_bus_width(struct mmc_softc *sc) 654 { 655 struct mmc_command cmd; 656 struct mmc_data data; 657 int err; 658 uint8_t buf[8]; 659 uint8_t p8[8] = { 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 660 uint8_t p8ok[8] = { 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 661 uint8_t p4[4] = { 0x5A, 0x00, 0x00, 0x00, }; 662 uint8_t p4ok[4] = { 0xA5, 0x00, 0x00, 0x00, }; 663 664 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 665 mmcbr_set_bus_width(sc->dev, bus_width_8); 666 mmcbr_update_ios(sc->dev); 667 668 cmd.opcode = MMC_BUSTEST_W; 669 cmd.arg = 0; 670 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 671 cmd.data = &data; 672 673 data.data = p8; 674 data.len = 8; 675 data.flags = MMC_DATA_WRITE; 676 mmc_wait_for_cmd(sc, &cmd, 0); 677 678 cmd.opcode = MMC_BUSTEST_R; 679 cmd.arg = 0; 680 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 681 cmd.data = &data; 682 683 data.data = buf; 684 data.len = 8; 685 data.flags = MMC_DATA_READ; 686 err = mmc_wait_for_cmd(sc, &cmd, 0); 687 688 mmcbr_set_bus_width(sc->dev, bus_width_1); 689 mmcbr_update_ios(sc->dev); 690 691 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 692 return (bus_width_8); 693 } 694 695 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 696 mmcbr_set_bus_width(sc->dev, bus_width_4); 697 mmcbr_update_ios(sc->dev); 698 699 cmd.opcode = MMC_BUSTEST_W; 700 cmd.arg = 0; 701 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 702 cmd.data = &data; 703 704 data.data = p4; 705 data.len = 4; 706 data.flags = MMC_DATA_WRITE; 707 mmc_wait_for_cmd(sc, &cmd, 0); 708 709 cmd.opcode = MMC_BUSTEST_R; 710 cmd.arg = 0; 711 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 712 cmd.data = &data; 713 714 data.data = buf; 715 data.len = 4; 716 data.flags = MMC_DATA_READ; 717 err = mmc_wait_for_cmd(sc, &cmd, 0); 718 719 mmcbr_set_bus_width(sc->dev, bus_width_1); 720 mmcbr_update_ios(sc->dev); 721 722 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 723 return (bus_width_4); 724 } 725 return (bus_width_1); 726 } 727 728 static uint32_t 729 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 730 { 731 const int i = (bit_len / 32) - (start / 32) - 1; 732 const int shift = start & 31; 733 uint32_t retval = bits[i] >> shift; 734 if (size + shift > 32) 735 retval |= bits[i - 1] << (32 - shift); 736 return (retval & ((1 << size) - 1)); 737 } 738 739 static void 740 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 741 { 742 int i; 743 744 /* There's no version info, so we take it on faith */ 745 memset(cid, 0, sizeof(*cid)); 746 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 747 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 748 for (i = 0; i < 5; i++) 749 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 750 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 751 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 752 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2001; 753 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 754 } 755 756 static void 757 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 758 { 759 int i; 760 761 /* There's no version info, so we take it on faith */ 762 memset(cid, 0, sizeof(*cid)); 763 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 764 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 765 for (i = 0; i < 6; i++) 766 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 767 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 768 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 769 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 770 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 771 } 772 773 static const int exp[8] = { 774 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 775 }; 776 static const int mant[16] = { 777 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 778 }; 779 static const int cur_min[8] = { 780 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 781 }; 782 static const int cur_max[8] = { 783 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 784 }; 785 786 static void 787 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 788 { 789 int v; 790 int m; 791 int e; 792 793 memset(csd, 0, sizeof(*csd)); 794 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 795 if (v == 0) { 796 m = mmc_get_bits(raw_csd, 128, 115, 4); 797 e = mmc_get_bits(raw_csd, 128, 112, 3); 798 csd->tacc = exp[e] * mant[m] + 9 / 10; 799 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 800 m = mmc_get_bits(raw_csd, 128, 99, 4); 801 e = mmc_get_bits(raw_csd, 128, 96, 3); 802 csd->tran_speed = exp[e] * 10000 * mant[m]; 803 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 804 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 805 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 806 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 807 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 808 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 809 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 810 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 811 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 812 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 813 m = mmc_get_bits(raw_csd, 128, 62, 12); 814 e = mmc_get_bits(raw_csd, 128, 47, 3); 815 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 816 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 817 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 818 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 819 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 820 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 821 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 822 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 823 } else if (v == 1) { 824 m = mmc_get_bits(raw_csd, 128, 115, 4); 825 e = mmc_get_bits(raw_csd, 128, 112, 3); 826 csd->tacc = exp[e] * mant[m] + 9 / 10; 827 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 828 m = mmc_get_bits(raw_csd, 128, 99, 4); 829 e = mmc_get_bits(raw_csd, 128, 96, 3); 830 csd->tran_speed = exp[e] * 10000 * mant[m]; 831 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 832 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 833 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 834 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 835 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 836 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 837 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 838 512 * 1024; 839 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 840 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 841 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 842 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 843 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 844 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 845 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 846 } else 847 panic("unknown SD CSD version"); 848 } 849 850 static void 851 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 852 { 853 int m; 854 int e; 855 856 memset(csd, 0, sizeof(*csd)); 857 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 858 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 859 m = mmc_get_bits(raw_csd, 128, 115, 4); 860 e = mmc_get_bits(raw_csd, 128, 112, 3); 861 csd->tacc = exp[e] * mant[m] + 9 / 10; 862 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 863 m = mmc_get_bits(raw_csd, 128, 99, 4); 864 e = mmc_get_bits(raw_csd, 128, 96, 3); 865 csd->tran_speed = exp[e] * 10000 * mant[m]; 866 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 867 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 868 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 869 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 870 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 871 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 872 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 873 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 874 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 875 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 876 m = mmc_get_bits(raw_csd, 128, 62, 12); 877 e = mmc_get_bits(raw_csd, 128, 47, 3); 878 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 879 csd->erase_blk_en = 0; 880 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 881 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 882 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 883 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 884 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 885 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 886 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 887 } 888 889 static void 890 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 891 { 892 unsigned int scr_struct; 893 894 memset(scr, 0, sizeof(*scr)); 895 896 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 897 if (scr_struct != 0) { 898 printf("Unrecognised SCR structure version %d\n", 899 scr_struct); 900 return; 901 } 902 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 903 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 904 } 905 906 static void 907 mmc_app_decode_sd_status(uint32_t *raw_sd_status, 908 struct mmc_sd_status *sd_status) 909 { 910 911 memset(sd_status, 0, sizeof(*sd_status)); 912 913 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 914 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 915 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 916 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 917 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 918 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 919 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 920 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 921 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 922 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 923 } 924 925 static int 926 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 927 { 928 struct mmc_command cmd; 929 int err; 930 931 cmd.opcode = MMC_ALL_SEND_CID; 932 cmd.arg = 0; 933 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 934 cmd.data = NULL; 935 err = mmc_wait_for_cmd(sc, &cmd, 0); 936 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 937 return (err); 938 } 939 940 static int 941 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcid) 942 { 943 struct mmc_command cmd; 944 int err; 945 946 cmd.opcode = MMC_SEND_CSD; 947 cmd.arg = rca << 16; 948 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 949 cmd.data = NULL; 950 err = mmc_wait_for_cmd(sc, &cmd, 0); 951 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 952 return (err); 953 } 954 955 static int 956 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 957 { 958 int err; 959 struct mmc_command cmd; 960 struct mmc_data data; 961 962 memset(&cmd, 0, sizeof(struct mmc_command)); 963 memset(&data, 0, sizeof(struct mmc_data)); 964 965 memset(rawscr, 0, 8); 966 cmd.opcode = ACMD_SEND_SCR; 967 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 968 cmd.arg = 0; 969 cmd.data = &data; 970 971 data.data = rawscr; 972 data.len = 8; 973 data.flags = MMC_DATA_READ; 974 975 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES); 976 rawscr[0] = be32toh(rawscr[0]); 977 rawscr[1] = be32toh(rawscr[1]); 978 return (err); 979 } 980 981 static int 982 mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd) 983 { 984 int err; 985 struct mmc_command cmd; 986 struct mmc_data data; 987 988 memset(&cmd, 0, sizeof(struct mmc_command)); 989 memset(&data, 0, sizeof(struct mmc_data)); 990 991 memset(rawextcsd, 0, 512); 992 cmd.opcode = MMC_SEND_EXT_CSD; 993 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 994 cmd.arg = 0; 995 cmd.data = &data; 996 997 data.data = rawextcsd; 998 data.len = 512; 999 data.flags = MMC_DATA_READ; 1000 1001 err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); 1002 return (err); 1003 } 1004 1005 static int 1006 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1007 { 1008 int err, i; 1009 struct mmc_command cmd; 1010 struct mmc_data data; 1011 1012 memset(&cmd, 0, sizeof(struct mmc_command)); 1013 memset(&data, 0, sizeof(struct mmc_data)); 1014 1015 memset(rawsdstatus, 0, 64); 1016 cmd.opcode = ACMD_SD_STATUS; 1017 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1018 cmd.arg = 0; 1019 cmd.data = &data; 1020 1021 data.data = rawsdstatus; 1022 data.len = 64; 1023 data.flags = MMC_DATA_READ; 1024 1025 err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES); 1026 for (i = 0; i < 16; i++) 1027 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1028 return (err); 1029 } 1030 1031 static int 1032 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1033 { 1034 struct mmc_command cmd; 1035 int err; 1036 1037 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1038 cmd.arg = resp << 16; 1039 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1040 cmd.data = NULL; 1041 err = mmc_wait_for_cmd(sc, &cmd, 0); 1042 return (err); 1043 } 1044 1045 static int 1046 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1047 { 1048 struct mmc_command cmd; 1049 int err; 1050 1051 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1052 cmd.arg = 0; 1053 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1054 cmd.data = NULL; 1055 err = mmc_wait_for_cmd(sc, &cmd, 0); 1056 *resp = cmd.resp[0]; 1057 return (err); 1058 } 1059 1060 static void 1061 mmc_discover_cards(struct mmc_softc *sc) 1062 { 1063 struct mmc_ivars *ivar; 1064 int err; 1065 uint32_t resp, sec_count; 1066 device_t child; 1067 uint16_t rca = 2; 1068 u_char switch_res[64]; 1069 1070 while (1) { 1071 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1072 M_WAITOK | M_ZERO); 1073 if (!ivar) 1074 return; 1075 err = mmc_all_send_cid(sc, ivar->raw_cid); 1076 if (err == MMC_ERR_TIMEOUT) 1077 break; 1078 if (err != MMC_ERR_NONE) { 1079 device_printf(sc->dev, "Error reading CID %d\n", err); 1080 break; 1081 } 1082 if (mmcbr_get_ro(sc->dev)) 1083 ivar->read_only = 1; 1084 ivar->bus_width = bus_width_1; 1085 ivar->mode = mmcbr_get_mode(sc->dev); 1086 if (ivar->mode == mode_sd) { 1087 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1088 mmc_send_relative_addr(sc, &resp); 1089 ivar->rca = resp >> 16; 1090 /* Get card CSD. */ 1091 mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1092 mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1093 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1094 if (ivar->csd.csd_structure > 0) 1095 ivar->high_cap = 1; 1096 ivar->tran_speed = ivar->csd.tran_speed; 1097 ivar->erase_sector = ivar->csd.erase_sector * 1098 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1099 /* Get card SCR. Card must be selected to fetch it. */ 1100 mmc_select_card(sc, ivar->rca); 1101 mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1102 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1103 /* Get card switch capabilities. */ 1104 if ((ivar->scr.sda_vsn >= 1) && 1105 (ivar->csd.ccc & (1<<10))) { 1106 mmc_sd_switch(sc, 0, 0, 0xF, switch_res); 1107 if (switch_res[13] & 2) { 1108 ivar->timing = bus_timing_hs; 1109 ivar->hs_tran_speed = 50000000; 1110 } 1111 } 1112 mmc_app_sd_status(sc, ivar->rca, ivar->raw_sd_status); 1113 mmc_app_decode_sd_status(ivar->raw_sd_status, 1114 &ivar->sd_status); 1115 if (ivar->sd_status.au_size != 0) { 1116 ivar->erase_sector = 1117 16 << ivar->sd_status.au_size; 1118 } 1119 mmc_select_card(sc, 0); 1120 /* Find max supported bus width. */ 1121 if ((mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) && 1122 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1123 ivar->bus_width = bus_width_4; 1124 /* Add device. */ 1125 child = device_add_child(sc->dev, NULL, -1); 1126 device_set_ivars(child, ivar); 1127 return; 1128 } 1129 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid); 1130 ivar->rca = rca++; 1131 mmc_set_relative_addr(sc, ivar->rca); 1132 /* Get card CSD. */ 1133 mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1134 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1135 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1136 ivar->tran_speed = ivar->csd.tran_speed; 1137 ivar->erase_sector = ivar->csd.erase_sector * 1138 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1139 /* Only MMC >= 4.x cards support EXT_CSD. */ 1140 if (ivar->csd.spec_vers >= 4) { 1141 /* Card must be selected to fetch EXT_CSD. */ 1142 mmc_select_card(sc, ivar->rca); 1143 mmc_send_ext_csd(sc, ivar->raw_ext_csd); 1144 /* Handle extended capacity from EXT_CSD */ 1145 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] + 1146 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1147 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1148 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1149 if (sec_count != 0) { 1150 ivar->sec_count = sec_count; 1151 ivar->high_cap = 1; 1152 } 1153 /* Get card speed in high speed mode. */ 1154 ivar->timing = bus_timing_hs; 1155 if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] 1156 & EXT_CSD_CARD_TYPE_52) 1157 ivar->hs_tran_speed = 52000000; 1158 else if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] 1159 & EXT_CSD_CARD_TYPE_26) 1160 ivar->hs_tran_speed = 26000000; 1161 else 1162 ivar->hs_tran_speed = ivar->tran_speed; 1163 /* Find max supported bus width. */ 1164 ivar->bus_width = mmc_test_bus_width(sc); 1165 mmc_select_card(sc, 0); 1166 /* Handle HC erase sector size. */ 1167 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1168 ivar->erase_sector = 1024 * 1169 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1170 mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, 1171 EXT_CSD_ERASE_GRP_DEF, 1); 1172 } 1173 } else { 1174 ivar->bus_width = bus_width_1; 1175 ivar->timing = bus_timing_normal; 1176 } 1177 /* Add device. */ 1178 child = device_add_child(sc->dev, NULL, -1); 1179 device_set_ivars(child, ivar); 1180 } 1181 free(ivar, M_DEVBUF); 1182 } 1183 1184 static void 1185 mmc_go_discovery(struct mmc_softc *sc) 1186 { 1187 uint32_t ocr; 1188 device_t dev; 1189 int err; 1190 1191 dev = sc->dev; 1192 if (mmcbr_get_power_mode(dev) != power_on) { 1193 /* 1194 * First, try SD modes 1195 */ 1196 mmcbr_set_mode(dev, mode_sd); 1197 mmc_power_up(sc); 1198 mmcbr_set_bus_mode(dev, pushpull); 1199 mmc_idle_cards(sc); 1200 err = mmc_send_if_cond(sc, 1); 1201 if (mmc_send_app_op_cond(sc, err ? 0 : MMC_OCR_CCS, &ocr) != 1202 MMC_ERR_NONE) { 1203 /* 1204 * Failed, try MMC 1205 */ 1206 mmcbr_set_mode(dev, mode_mmc); 1207 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) 1208 return; /* Failed both, punt! XXX powerdown? */ 1209 } 1210 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 1211 if (mmcbr_get_ocr(dev) != 0) 1212 mmc_idle_cards(sc); 1213 } else { 1214 mmcbr_set_bus_mode(dev, opendrain); 1215 mmcbr_set_clock(dev, mmcbr_get_f_min(dev)); 1216 mmcbr_update_ios(dev); 1217 /* XXX recompute vdd based on new cards? */ 1218 } 1219 /* 1220 * Make sure that we have a mutually agreeable voltage to at least 1221 * one card on the bus. 1222 */ 1223 if (mmcbr_get_ocr(dev) == 0) 1224 return; 1225 /* 1226 * Reselect the cards after we've idled them above. 1227 */ 1228 if (mmcbr_get_mode(dev) == mode_sd) { 1229 err = mmc_send_if_cond(sc, 1); 1230 mmc_send_app_op_cond(sc, 1231 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 1232 } else 1233 mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); 1234 mmc_discover_cards(sc); 1235 1236 mmcbr_set_bus_mode(dev, pushpull); 1237 mmcbr_update_ios(dev); 1238 mmc_calculate_clock(sc); 1239 bus_generic_attach(dev); 1240 /* mmc_update_children_sysctl(dev);*/ 1241 } 1242 1243 static int 1244 mmc_calculate_clock(struct mmc_softc *sc) 1245 { 1246 int max_dtr, max_hs_dtr, max_timing; 1247 int nkid, i, f_min, f_max; 1248 device_t *kids; 1249 struct mmc_ivars *ivar; 1250 1251 f_min = mmcbr_get_f_min(sc->dev); 1252 f_max = mmcbr_get_f_max(sc->dev); 1253 max_dtr = max_hs_dtr = f_max; 1254 if ((mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED)) 1255 max_timing = bus_timing_hs; 1256 else 1257 max_timing = bus_timing_normal; 1258 if (device_get_children(sc->dev, &kids, &nkid) != 0) 1259 panic("can't get children"); 1260 for (i = 0; i < nkid; i++) { 1261 ivar = device_get_ivars(kids[i]); 1262 if (ivar->timing < max_timing) 1263 max_timing = ivar->timing; 1264 if (ivar->tran_speed < max_dtr) 1265 max_dtr = ivar->tran_speed; 1266 if (ivar->hs_tran_speed < max_dtr) 1267 max_hs_dtr = ivar->hs_tran_speed; 1268 } 1269 for (i = 0; i < nkid; i++) { 1270 ivar = device_get_ivars(kids[i]); 1271 if (ivar->timing == bus_timing_normal) 1272 continue; 1273 mmc_select_card(sc, ivar->rca); 1274 mmc_set_timing(sc, max_timing); 1275 } 1276 mmc_select_card(sc, 0); 1277 free(kids, M_TEMP); 1278 if (max_timing == bus_timing_hs) 1279 max_dtr = max_hs_dtr; 1280 if (bootverbose) { 1281 device_printf(sc->dev, 1282 "setting transfer rate to %d.%03dMHz%s\n", 1283 max_dtr / 1000000, (max_dtr / 1000) % 1000, 1284 max_timing == bus_timing_hs ? " (high speed timing)" : ""); 1285 } 1286 mmcbr_set_timing(sc->dev, max_timing); 1287 mmcbr_set_clock(sc->dev, max_dtr); 1288 mmcbr_update_ios(sc->dev); 1289 return max_dtr; 1290 } 1291 1292 static void 1293 mmc_scan(struct mmc_softc *sc) 1294 { 1295 device_t dev; 1296 1297 dev = sc->dev; 1298 mmc_acquire_bus(dev, dev); 1299 1300 if (mmcbr_get_power_mode(dev) == power_on) 1301 mmc_rescan_cards(sc); 1302 mmc_go_discovery(sc); 1303 1304 mmc_release_bus(dev, dev); 1305 /* XXX probe/attach/detach children? */ 1306 } 1307 1308 static int 1309 mmc_read_ivar(device_t bus, device_t child, int which, u_char *result) 1310 { 1311 struct mmc_ivars *ivar = device_get_ivars(child); 1312 1313 switch (which) { 1314 default: 1315 return (EINVAL); 1316 case MMC_IVAR_DSR_IMP: 1317 *(int *)result = ivar->csd.dsr_imp; 1318 break; 1319 case MMC_IVAR_MEDIA_SIZE: 1320 *(off_t *)result = ivar->sec_count; 1321 break; 1322 case MMC_IVAR_RCA: 1323 *(int *)result = ivar->rca; 1324 break; 1325 case MMC_IVAR_SECTOR_SIZE: 1326 *(int *)result = MMC_SECTOR_SIZE; 1327 break; 1328 case MMC_IVAR_TRAN_SPEED: 1329 *(int *)result = mmcbr_get_clock(bus); 1330 break; 1331 case MMC_IVAR_READ_ONLY: 1332 *(int *)result = ivar->read_only; 1333 break; 1334 case MMC_IVAR_HIGH_CAP: 1335 *(int *)result = ivar->high_cap; 1336 break; 1337 case MMC_IVAR_CARD_TYPE: 1338 *(int *)result = ivar->mode; 1339 break; 1340 case MMC_IVAR_BUS_WIDTH: 1341 *(int *)result = ivar->bus_width; 1342 break; 1343 case MMC_IVAR_ERASE_SECTOR: 1344 *(int *)result = ivar->erase_sector; 1345 break; 1346 case MMC_IVAR_MAX_DATA: 1347 *(int *)result = mmcbr_get_max_data(bus); 1348 break; 1349 } 1350 return (0); 1351 } 1352 1353 static int 1354 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 1355 { 1356 /* 1357 * None are writable ATM 1358 */ 1359 return (EINVAL); 1360 } 1361 1362 1363 static void 1364 mmc_delayed_attach(void *xsc) 1365 { 1366 struct mmc_softc *sc = xsc; 1367 1368 mmc_scan(sc); 1369 config_intrhook_disestablish(&sc->config_intrhook); 1370 } 1371 1372 static device_method_t mmc_methods[] = { 1373 /* device_if */ 1374 DEVMETHOD(device_probe, mmc_probe), 1375 DEVMETHOD(device_attach, mmc_attach), 1376 DEVMETHOD(device_detach, mmc_detach), 1377 1378 /* Bus interface */ 1379 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 1380 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 1381 1382 /* MMC Bus interface */ 1383 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 1384 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 1385 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 1386 1387 {0, 0}, 1388 }; 1389 1390 static driver_t mmc_driver = { 1391 "mmc", 1392 mmc_methods, 1393 sizeof(struct mmc_softc), 1394 }; 1395 static devclass_t mmc_devclass; 1396 1397 1398 DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, 0, 0); 1399 DRIVER_MODULE(mmc, sdhci, mmc_driver, mmc_devclass, 0, 0); 1400