xref: /freebsd/sys/dev/mmc/mmc.c (revision 4a5216a6dc0c3ce4cf5f2d3ee8af0c3ff3402c4f)
1 /*-
2  * Copyright (c) 2006 Bernd Walter.  All rights reserved.
3  * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  *
25  * Portions of this software may have been developed with reference to
26  * the SD Simplified Specification.  The following disclaimer may apply:
27  *
28  * The following conditions apply to the release of the simplified
29  * specification ("Simplified Specification") by the SD Card Association and
30  * the SD Group. The Simplified Specification is a subset of the complete SD
31  * Specification which is owned by the SD Card Association and the SD
32  * Group. This Simplified Specification is provided on a non-confidential
33  * basis subject to the disclaimers below. Any implementation of the
34  * Simplified Specification may require a license from the SD Card
35  * Association, SD Group, SD-3C LLC or other third parties.
36  *
37  * Disclaimers:
38  *
39  * The information contained in the Simplified Specification is presented only
40  * as a standard specification for SD Cards and SD Host/Ancillary products and
41  * is provided "AS-IS" without any representations or warranties of any
42  * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
43  * Card Association for any damages, any infringements of patents or other
44  * right of the SD Group, SD-3C LLC, the SD Card Association or any third
45  * parties, which may result from its use. No license is granted by
46  * implication, estoppel or otherwise under any patent or other rights of the
47  * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
48  * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
49  * or the SD Card Association to disclose or distribute any technical
50  * information, know-how or other confidential information to any third party.
51  */
52 
53 #include <sys/cdefs.h>
54 __FBSDID("$FreeBSD$");
55 
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/kernel.h>
59 #include <sys/malloc.h>
60 #include <sys/lock.h>
61 #include <sys/module.h>
62 #include <sys/mutex.h>
63 #include <sys/bus.h>
64 #include <sys/endian.h>
65 
66 #include <dev/mmc/mmcreg.h>
67 #include <dev/mmc/mmcbrvar.h>
68 #include <dev/mmc/mmcvar.h>
69 #include "mmcbr_if.h"
70 #include "mmcbus_if.h"
71 
72 struct mmc_softc {
73 	device_t dev;
74 	struct mtx sc_mtx;
75 	struct intr_config_hook config_intrhook;
76 	device_t owner;
77 	uint32_t last_rca;
78 };
79 
80 /*
81  * Per-card data
82  */
83 struct mmc_ivars {
84 	uint32_t raw_cid[4];	/* Raw bits of the CID */
85 	uint32_t raw_csd[4];	/* Raw bits of the CSD */
86 	uint32_t raw_scr[2];	/* Raw bits of the SCR */
87 	uint8_t raw_ext_csd[512];	/* Raw bits of the EXT_CSD */
88 	uint16_t rca;
89 	enum mmc_card_mode mode;
90 	struct mmc_cid cid;	/* cid decoded */
91 	struct mmc_csd csd;	/* csd decoded */
92 	struct mmc_scr scr;	/* scr decoded */
93 	u_char read_only;	/* True when the device is read-only */
94 	u_char bus_width;	/* Bus width to use */
95 	u_char timing;		/* Bus timing support */
96 	u_char high_cap;	/* High Capacity card (block addressed) */
97 	uint32_t sec_count;	/* Card capacity in 512byte blocks */
98 	uint32_t tran_speed;	/* Max speed in normal mode */
99 	uint32_t hs_tran_speed;	/* Max speed in high speed mode */
100 };
101 
102 #define CMD_RETRIES	3
103 
104 /* bus entry points */
105 static int mmc_probe(device_t dev);
106 static int mmc_attach(device_t dev);
107 static int mmc_detach(device_t dev);
108 
109 #define MMC_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
110 #define	MMC_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
111 #define MMC_LOCK_INIT(_sc)					\
112 	mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev),	\
113 	    "mmc", MTX_DEF)
114 #define MMC_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
115 #define MMC_ASSERT_LOCKED(_sc)	mtx_assert(&_sc->sc_mtx, MA_OWNED);
116 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
117 
118 static int mmc_calculate_clock(struct mmc_softc *sc);
119 static void mmc_delayed_attach(void *);
120 static void mmc_power_down(struct mmc_softc *sc);
121 static int mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd,
122     int retries);
123 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
124     uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
125 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
126 static int mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width);
127 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr);
128 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
129 static int mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd);
130 
131 static void
132 mmc_ms_delay(int ms)
133 {
134 	DELAY(1000 * ms);	/* XXX BAD */
135 }
136 
137 static int
138 mmc_probe(device_t dev)
139 {
140 
141 	device_set_desc(dev, "MMC/SD bus");
142 	return (0);
143 }
144 
145 static int
146 mmc_attach(device_t dev)
147 {
148 	struct mmc_softc *sc;
149 
150 	sc = device_get_softc(dev);
151 	sc->dev = dev;
152 	MMC_LOCK_INIT(sc);
153 
154 	/* We'll probe and attach our children later, but before / mount */
155 	sc->config_intrhook.ich_func = mmc_delayed_attach;
156 	sc->config_intrhook.ich_arg = sc;
157 	if (config_intrhook_establish(&sc->config_intrhook) != 0)
158 		device_printf(dev, "config_intrhook_establish failed\n");
159 	return (0);
160 }
161 
162 static int
163 mmc_detach(device_t dev)
164 {
165 	struct mmc_softc *sc = device_get_softc(dev);
166 	device_t *kids;
167 	int i, nkid;
168 
169 	/* kill children [ph33r].  -sorbo */
170 	if (device_get_children(sc->dev, &kids, &nkid) != 0)
171 		return (0);
172 	for (i = 0; i < nkid; i++) {
173 		device_t kid = kids[i];
174 		void *ivar = device_get_ivars(kid);
175 
176 		device_detach(kid);
177 		device_delete_child(sc->dev, kid);
178 		free(ivar, M_DEVBUF);
179 	}
180 	free(kids, M_TEMP);
181 	mmc_power_down(sc);
182 
183 	MMC_LOCK_DESTROY(sc);
184 
185 	return (0);
186 }
187 
188 static int
189 mmc_acquire_bus(device_t busdev, device_t dev)
190 {
191 	struct mmc_softc *sc;
192 	struct mmc_ivars *ivar;
193 	int err;
194 	int rca;
195 
196 	err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
197 	if (err)
198 		return (err);
199 	sc = device_get_softc(busdev);
200 	MMC_LOCK(sc);
201 	if (sc->owner)
202 		panic("mmc: host bridge didn't seralize us.");
203 	sc->owner = dev;
204 	MMC_UNLOCK(sc);
205 
206 	if (busdev != dev) {
207 		/*
208 		 * Keep track of the last rca that we've selected.  If
209 		 * we're asked to do it again, don't.  We never
210 		 * unselect unless the bus code itself wants the mmc
211 		 * bus, and constantly reselecting causes problems.
212 		 */
213 		rca = mmc_get_rca(dev);
214 		if (sc->last_rca != rca) {
215 			mmc_select_card(sc, rca);
216 			sc->last_rca = rca;
217 			/* Prepare bus width for the new card. */
218 			ivar = device_get_ivars(dev);
219 			if (bootverbose) {
220 				device_printf(busdev,
221 				    "setting bus width to %d bits\n",
222 				    (ivar->bus_width == bus_width_4) ? 4 :
223 				    (ivar->bus_width == bus_width_8) ? 8 : 1);
224 			}
225 			mmc_set_card_bus_width(sc, rca, ivar->bus_width);
226 			mmcbr_set_bus_width(busdev, ivar->bus_width);
227 			mmcbr_update_ios(busdev);
228 		}
229 	} else {
230 		/*
231 		 * If there's a card selected, stand down.
232 		 */
233 		if (sc->last_rca != 0) {
234 			mmc_select_card(sc, 0);
235 			sc->last_rca = 0;
236 		}
237 	}
238 
239 	return (0);
240 }
241 
242 static int
243 mmc_release_bus(device_t busdev, device_t dev)
244 {
245 	struct mmc_softc *sc;
246 	int err;
247 
248 	sc = device_get_softc(busdev);
249 
250 	MMC_LOCK(sc);
251 	if (!sc->owner)
252 		panic("mmc: releasing unowned bus.");
253 	if (sc->owner != dev)
254 		panic("mmc: you don't own the bus.  game over.");
255 	MMC_UNLOCK(sc);
256 	err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
257 	if (err)
258 		return (err);
259 	MMC_LOCK(sc);
260 	sc->owner = NULL;
261 	MMC_UNLOCK(sc);
262 	return (0);
263 }
264 
265 static void
266 mmc_rescan_cards(struct mmc_softc *sc)
267 {
268 	/* XXX: Look at the children and see if they respond to status */
269 }
270 
271 static uint32_t
272 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
273 {
274 
275 	return (ocr & MMC_OCR_VOLTAGE);
276 }
277 
278 static int
279 mmc_highest_voltage(uint32_t ocr)
280 {
281 	int i;
282 
283 	for (i = 30; i >= 0; i--)
284 		if (ocr & (1 << i))
285 			return (i);
286 	return (-1);
287 }
288 
289 static void
290 mmc_wakeup(struct mmc_request *req)
291 {
292 	struct mmc_softc *sc;
293 
294 /*	printf("Wakeup for req %p done_data %p\n", req, req->done_data); */
295 	sc = (struct mmc_softc *)req->done_data;
296 	MMC_LOCK(sc);
297 	req->flags |= MMC_REQ_DONE;
298 	wakeup(req);
299 	MMC_UNLOCK(sc);
300 }
301 
302 static int
303 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
304 {
305 	int err;
306 
307 	req->done = mmc_wakeup;
308 	req->done_data = sc;
309 /*	printf("Submitting request %p sc %p\n", req, sc); */
310 	MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
311 	MMC_LOCK(sc);
312 	do {
313 		err = msleep(req, &sc->sc_mtx, PZERO | PCATCH, "mmcreq",
314 		    hz / 10);
315 	} while (!(req->flags & MMC_REQ_DONE) && err == EAGAIN);
316 /*	printf("Request %p done with error %d\n", req, err); */
317 	MMC_UNLOCK(sc);
318 	return (err);
319 }
320 
321 static int
322 mmc_wait_for_request(device_t brdev, device_t reqdev, struct mmc_request *req)
323 {
324 	struct mmc_softc *sc = device_get_softc(brdev);
325 
326 	return (mmc_wait_for_req(sc, req));
327 }
328 
329 static int
330 mmc_wait_for_cmd(struct mmc_softc *sc, struct mmc_command *cmd, int retries)
331 {
332 	struct mmc_request mreq;
333 
334 	memset(&mreq, 0, sizeof(mreq));
335 	memset(cmd->resp, 0, sizeof(cmd->resp));
336 	cmd->retries = retries;
337 	mreq.cmd = cmd;
338 /*	printf("CMD: %x ARG %x\n", cmd->opcode, cmd->arg); */
339 	mmc_wait_for_req(sc, &mreq);
340 	return (cmd->error);
341 }
342 
343 static int
344 mmc_wait_for_app_cmd(struct mmc_softc *sc, uint32_t rca,
345     struct mmc_command *cmd, int retries)
346 {
347 	struct mmc_command appcmd;
348 	int err = MMC_ERR_NONE, i;
349 
350 	for (i = 0; i <= retries; i++) {
351 		appcmd.opcode = MMC_APP_CMD;
352 		appcmd.arg = rca << 16;
353 		appcmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
354 		appcmd.data = NULL;
355 		mmc_wait_for_cmd(sc, &appcmd, 0);
356 		err = appcmd.error;
357 		if (err != MMC_ERR_NONE)
358 			continue;
359 		if (!(appcmd.resp[0] & R1_APP_CMD))
360 			return MMC_ERR_FAILED;
361 		mmc_wait_for_cmd(sc, cmd, 0);
362 		err = cmd->error;
363 		if (err == MMC_ERR_NONE)
364 			break;
365 	}
366 	return (err);
367 }
368 
369 static int
370 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
371     uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
372 {
373 	struct mmc_command cmd;
374 	int err;
375 
376 	memset(&cmd, 0, sizeof(cmd));
377 	cmd.opcode = opcode;
378 	cmd.arg = arg;
379 	cmd.flags = flags;
380 	cmd.data = NULL;
381 	err = mmc_wait_for_cmd(sc, &cmd, retries);
382 	if (err)
383 		return (err);
384 	if (cmd.error)
385 		return (cmd.error);
386 	if (resp) {
387 		if (flags & MMC_RSP_136)
388 			memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
389 		else
390 			*resp = cmd.resp[0];
391 	}
392 	return (0);
393 }
394 
395 static void
396 mmc_idle_cards(struct mmc_softc *sc)
397 {
398 	device_t dev;
399 	struct mmc_command cmd;
400 
401 	dev = sc->dev;
402 	mmcbr_set_chip_select(dev, cs_high);
403 	mmcbr_update_ios(dev);
404 	mmc_ms_delay(1);
405 
406 	memset(&cmd, 0, sizeof(cmd));
407 	cmd.opcode = MMC_GO_IDLE_STATE;
408 	cmd.arg = 0;
409 	cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
410 	cmd.data = NULL;
411 	mmc_wait_for_cmd(sc, &cmd, 0);
412 	mmc_ms_delay(1);
413 
414 	mmcbr_set_chip_select(dev, cs_dontcare);
415 	mmcbr_update_ios(dev);
416 	mmc_ms_delay(1);
417 }
418 
419 static int
420 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
421 {
422 	struct mmc_command cmd;
423 	int err = MMC_ERR_NONE, i;
424 
425 	memset(&cmd, 0, sizeof(cmd));
426 	cmd.opcode = ACMD_SD_SEND_OP_COND;
427 	cmd.arg = ocr;
428 	cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
429 	cmd.data = NULL;
430 
431 	for (i = 0; i < 100; i++) {
432 		err = mmc_wait_for_app_cmd(sc, 0, &cmd, CMD_RETRIES);
433 		if (err != MMC_ERR_NONE)
434 			break;
435 		if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
436 		    (ocr & MMC_OCR_VOLTAGE) == 0)
437 			break;
438 		err = MMC_ERR_TIMEOUT;
439 		mmc_ms_delay(10);
440 	}
441 	if (rocr && err == MMC_ERR_NONE)
442 		*rocr = cmd.resp[0];
443 	return (err);
444 }
445 
446 static int
447 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
448 {
449 	struct mmc_command cmd;
450 	int err = MMC_ERR_NONE, i;
451 
452 	memset(&cmd, 0, sizeof(cmd));
453 	cmd.opcode = MMC_SEND_OP_COND;
454 	cmd.arg = ocr;
455 	cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
456 	cmd.data = NULL;
457 
458 	for (i = 0; i < 100; i++) {
459 		err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
460 		if (err != MMC_ERR_NONE)
461 			break;
462 		if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
463 		    (ocr & MMC_OCR_VOLTAGE) == 0)
464 			break;
465 		err = MMC_ERR_TIMEOUT;
466 		mmc_ms_delay(10);
467 	}
468 	if (rocr && err == MMC_ERR_NONE)
469 		*rocr = cmd.resp[0];
470 	return (err);
471 }
472 
473 static int
474 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
475 {
476 	struct mmc_command cmd;
477 	int err;
478 
479 	memset(&cmd, 0, sizeof(cmd));
480 	cmd.opcode = SD_SEND_IF_COND;
481 	cmd.arg = (vhs << 8) + 0xAA;
482 	cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
483 	cmd.data = NULL;
484 
485 	err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
486 	return (err);
487 }
488 
489 static void
490 mmc_power_up(struct mmc_softc *sc)
491 {
492 	device_t dev;
493 
494 	dev = sc->dev;
495 	mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
496 	mmcbr_set_bus_mode(dev, opendrain);
497 	mmcbr_set_chip_select(dev, cs_dontcare);
498 	mmcbr_set_bus_width(dev, bus_width_1);
499 	mmcbr_set_power_mode(dev, power_up);
500 	mmcbr_set_clock(dev, 0);
501 	mmcbr_update_ios(dev);
502 	mmc_ms_delay(1);
503 
504 	mmcbr_set_clock(dev, mmcbr_get_f_min(sc->dev));
505 	mmcbr_set_timing(dev, bus_timing_normal);
506 	mmcbr_set_power_mode(dev, power_on);
507 	mmcbr_update_ios(dev);
508 	mmc_ms_delay(2);
509 }
510 
511 static void
512 mmc_power_down(struct mmc_softc *sc)
513 {
514 	device_t dev = sc->dev;
515 
516 	mmcbr_set_bus_mode(dev, opendrain);
517 	mmcbr_set_chip_select(dev, cs_dontcare);
518 	mmcbr_set_bus_width(dev, bus_width_1);
519 	mmcbr_set_power_mode(dev, power_off);
520 	mmcbr_set_clock(dev, 0);
521 	mmcbr_set_timing(dev, bus_timing_normal);
522 	mmcbr_update_ios(dev);
523 }
524 
525 static int
526 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
527 {
528 	int flags;
529 
530 	flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
531 	return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
532 	    flags, NULL, CMD_RETRIES));
533 }
534 
535 static int
536 mmc_switch(struct mmc_softc *sc, uint8_t set, uint8_t index, uint8_t value)
537 {
538 	struct mmc_command cmd;
539 	int err;
540 
541 	cmd.opcode = MMC_SWITCH_FUNC;
542 	cmd.arg = (MMC_SWITCH_FUNC_WR << 24) |
543 	    (index << 16) |
544 	    (value << 8) |
545 	    set;
546 	cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
547 	cmd.data = NULL;
548 	err = mmc_wait_for_cmd(sc, &cmd, 0);
549 	return (err);
550 }
551 
552 static int
553 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, uint8_t *res)
554 {
555 	int err;
556 	struct mmc_command cmd;
557 	struct mmc_data data;
558 
559 	memset(&cmd, 0, sizeof(struct mmc_command));
560 	memset(&data, 0, sizeof(struct mmc_data));
561 
562 	memset(res, 0, 64);
563 	cmd.opcode = SD_SWITCH_FUNC;
564 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
565 	cmd.arg = mode << 31;
566 	cmd.arg |= 0x00FFFFFF;
567 	cmd.arg &= ~(0xF << (grp * 4));
568 	cmd.arg |= value << (grp * 4);
569 	cmd.data = &data;
570 
571 	data.data = res;
572 	data.len = 64;
573 	data.flags = MMC_DATA_READ;
574 
575 	err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
576 	return (err);
577 }
578 
579 static int
580 mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width)
581 {
582 	int err;
583 
584 	if (mmcbr_get_mode(sc->dev) == mode_sd) {
585 		struct mmc_command cmd;
586 
587 		memset(&cmd, 0, sizeof(struct mmc_command));
588 		cmd.opcode = ACMD_SET_BUS_WIDTH;
589 		cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
590 		switch (width) {
591 		case bus_width_1:
592 			cmd.arg = SD_BUS_WIDTH_1;
593 			break;
594 		case bus_width_4:
595 			cmd.arg = SD_BUS_WIDTH_4;
596 			break;
597 		default:
598 			return (MMC_ERR_INVALID);
599 		}
600 		err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
601 	} else {
602 		uint8_t	value;
603 
604 		switch (width) {
605 		case bus_width_1:
606 			value = EXT_CSD_BUS_WIDTH_1;
607 			break;
608 		case bus_width_4:
609 			value = EXT_CSD_BUS_WIDTH_4;
610 			break;
611 		case bus_width_8:
612 			value = EXT_CSD_BUS_WIDTH_8;
613 			break;
614 		default:
615 			return (MMC_ERR_INVALID);
616 		}
617 		err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value);
618 	}
619 	return (err);
620 }
621 
622 static int
623 mmc_set_timing(struct mmc_softc *sc, int timing)
624 {
625 	int err;
626 	uint8_t	value;
627 
628 	switch (timing) {
629 	case bus_timing_normal:
630 		value = 0;
631 		break;
632 	case bus_timing_hs:
633 		value = 1;
634 		break;
635 	default:
636 		return (MMC_ERR_INVALID);
637 	}
638 	if (mmcbr_get_mode(sc->dev) == mode_sd) {
639 		u_char switch_res[64];
640 
641 		err = mmc_sd_switch(sc, 1, 0, value, switch_res);
642 	} else {
643 		err = mmc_switch(sc, EXT_CSD_CMD_SET_NORMAL,
644 		    EXT_CSD_HS_TIMING, value);
645 	}
646 	return (err);
647 }
648 
649 static int
650 mmc_test_bus_width(struct mmc_softc *sc)
651 {
652 	struct mmc_command cmd;
653 	struct mmc_data data;
654 	int err;
655 	uint8_t buf[8];
656 	uint8_t	p8[8] =   { 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
657 	uint8_t	p8ok[8] = { 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
658 	uint8_t	p4[4] =   { 0x5A, 0x00, 0x00, 0x00, };
659 	uint8_t	p4ok[4] = { 0xA5, 0x00, 0x00, 0x00, };
660 
661 	if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
662 		mmcbr_set_bus_width(sc->dev, bus_width_8);
663 		mmcbr_update_ios(sc->dev);
664 
665 		cmd.opcode = MMC_BUSTEST_W;
666 		cmd.arg = 0;
667 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
668 		cmd.data = &data;
669 
670 		data.data = p8;
671 		data.len = 8;
672 		data.flags = MMC_DATA_WRITE;
673 		mmc_wait_for_cmd(sc, &cmd, 0);
674 
675 		cmd.opcode = MMC_BUSTEST_R;
676 		cmd.arg = 0;
677 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
678 		cmd.data = &data;
679 
680 		data.data = buf;
681 		data.len = 8;
682 		data.flags = MMC_DATA_READ;
683 		err = mmc_wait_for_cmd(sc, &cmd, 0);
684 
685 		mmcbr_set_bus_width(sc->dev, bus_width_1);
686 		mmcbr_update_ios(sc->dev);
687 
688 		if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
689 			return (bus_width_8);
690 	}
691 
692 	if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
693 		mmcbr_set_bus_width(sc->dev, bus_width_4);
694 		mmcbr_update_ios(sc->dev);
695 
696 		cmd.opcode = MMC_BUSTEST_W;
697 		cmd.arg = 0;
698 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
699 		cmd.data = &data;
700 
701 		data.data = p4;
702 		data.len = 4;
703 		data.flags = MMC_DATA_WRITE;
704 		mmc_wait_for_cmd(sc, &cmd, 0);
705 
706 		cmd.opcode = MMC_BUSTEST_R;
707 		cmd.arg = 0;
708 		cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
709 		cmd.data = &data;
710 
711 		data.data = buf;
712 		data.len = 4;
713 		data.flags = MMC_DATA_READ;
714 		err = mmc_wait_for_cmd(sc, &cmd, 0);
715 
716 		mmcbr_set_bus_width(sc->dev, bus_width_1);
717 		mmcbr_update_ios(sc->dev);
718 
719 		if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
720 			return (bus_width_4);
721 	}
722 	return (bus_width_1);
723 }
724 
725 static uint32_t
726 mmc_get_bits(uint32_t *bits, int start, int size)
727 {
728 	const int bit_len = 128;
729 	const int i = (bit_len / 32) - (start / 32) - 1;
730 	const int shift = start & 31;
731 	uint32_t retval = bits[i] >> shift;
732 	if (size + shift > 32)
733 		retval |= bits[i - 1] << (32 - shift);
734 	return (retval & ((1 << size) - 1));
735 }
736 
737 static void
738 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
739 {
740 	int i;
741 
742 	/* There's no version info, so we take it on faith */
743 	memset(cid, 0, sizeof(*cid));
744 	cid->mid = mmc_get_bits(raw_cid, 120, 8);
745 	cid->oid = mmc_get_bits(raw_cid, 104, 16);
746 	for (i = 0; i < 5; i++)
747 		cid->pnm[i] = mmc_get_bits(raw_cid, 96 - i * 8, 8);
748 	cid->prv = mmc_get_bits(raw_cid, 56, 8);
749 	cid->psn = mmc_get_bits(raw_cid, 24, 32);
750 	cid->mdt_year = mmc_get_bits(raw_cid, 12, 8) + 2001;
751 	cid->mdt_month = mmc_get_bits(raw_cid, 8, 4);
752 }
753 
754 static void
755 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid)
756 {
757 	int i;
758 
759 	/* There's no version info, so we take it on faith */
760 	memset(cid, 0, sizeof(*cid));
761 	cid->mid = mmc_get_bits(raw_cid, 120, 8);
762 	cid->oid = mmc_get_bits(raw_cid, 104, 8);
763 	for (i = 0; i < 6; i++)
764 		cid->pnm[i] = mmc_get_bits(raw_cid, 96 - i * 8, 8);
765 	cid->prv = mmc_get_bits(raw_cid, 48, 8);
766 	cid->psn = mmc_get_bits(raw_cid, 16, 32);
767 	cid->mdt_month = mmc_get_bits(raw_cid, 12, 4);
768 	cid->mdt_year = mmc_get_bits(raw_cid, 8, 4) + 1997;
769 }
770 
771 static const int exp[8] = {
772 	1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
773 };
774 static const int mant[16] = {
775 	10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
776 };
777 static const int cur_min[8] = {
778 	500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
779 };
780 static const int cur_max[8] = {
781 	1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
782 };
783 
784 static void
785 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
786 {
787 	int v;
788 	int m;
789 	int e;
790 
791 	memset(csd, 0, sizeof(*csd));
792 	csd->csd_structure = v = mmc_get_bits(raw_csd, 126, 2);
793 	if (v == 0) {
794 		m = mmc_get_bits(raw_csd, 115, 4);
795 		e = mmc_get_bits(raw_csd, 112, 3);
796 		csd->tacc = exp[e] * mant[m] + 9 / 10;
797 		csd->nsac = mmc_get_bits(raw_csd, 104, 8) * 100;
798 		m = mmc_get_bits(raw_csd, 99, 4);
799 		e = mmc_get_bits(raw_csd, 96, 3);
800 		csd->tran_speed = exp[e] * 10000 * mant[m];
801 		csd->ccc = mmc_get_bits(raw_csd, 84, 12);
802 		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 80, 4);
803 		csd->read_bl_partial = mmc_get_bits(raw_csd, 79, 1);
804 		csd->write_blk_misalign = mmc_get_bits(raw_csd, 78, 1);
805 		csd->read_blk_misalign = mmc_get_bits(raw_csd, 77, 1);
806 		csd->dsr_imp = mmc_get_bits(raw_csd, 76, 1);
807 		csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 59, 3)];
808 		csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 56, 3)];
809 		csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 53, 3)];
810 		csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 50, 3)];
811 		m = mmc_get_bits(raw_csd, 62, 12);
812 		e = mmc_get_bits(raw_csd, 47, 3);
813 		csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
814 		csd->erase_blk_en = mmc_get_bits(raw_csd, 46, 1);
815 		csd->sector_size = mmc_get_bits(raw_csd, 39, 7);
816 		csd->wp_grp_size = mmc_get_bits(raw_csd, 32, 7);
817 		csd->wp_grp_enable = mmc_get_bits(raw_csd, 31, 1);
818 		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 26, 3);
819 		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 22, 4);
820 		csd->write_bl_partial = mmc_get_bits(raw_csd, 21, 1);
821 	} else if (v == 1) {
822 		m = mmc_get_bits(raw_csd, 115, 4);
823 		e = mmc_get_bits(raw_csd, 112, 3);
824 		csd->tacc = exp[e] * mant[m] + 9 / 10;
825 		csd->nsac = mmc_get_bits(raw_csd, 104, 8) * 100;
826 		m = mmc_get_bits(raw_csd, 99, 4);
827 		e = mmc_get_bits(raw_csd, 96, 3);
828 		csd->tran_speed = exp[e] * 10000 * mant[m];
829 		csd->ccc = mmc_get_bits(raw_csd, 84, 12);
830 		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 80, 4);
831 		csd->read_bl_partial = mmc_get_bits(raw_csd, 79, 1);
832 		csd->write_blk_misalign = mmc_get_bits(raw_csd, 78, 1);
833 		csd->read_blk_misalign = mmc_get_bits(raw_csd, 77, 1);
834 		csd->dsr_imp = mmc_get_bits(raw_csd, 76, 1);
835 		csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 48, 22) + 1) *
836 		    512 * 1024;
837 		csd->erase_blk_en = mmc_get_bits(raw_csd, 46, 1);
838 		csd->sector_size = mmc_get_bits(raw_csd, 39, 7);
839 		csd->wp_grp_size = mmc_get_bits(raw_csd, 32, 7);
840 		csd->wp_grp_enable = mmc_get_bits(raw_csd, 31, 1);
841 		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 26, 3);
842 		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 22, 4);
843 		csd->write_bl_partial = mmc_get_bits(raw_csd, 21, 1);
844 	} else
845 		panic("unknown SD CSD version");
846 }
847 
848 static void
849 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
850 {
851 	int m;
852 	int e;
853 
854 	memset(csd, 0, sizeof(*csd));
855 	csd->csd_structure = mmc_get_bits(raw_csd, 126, 2);
856 	csd->spec_vers = mmc_get_bits(raw_csd, 122, 4);
857 	m = mmc_get_bits(raw_csd, 115, 4);
858 	e = mmc_get_bits(raw_csd, 112, 3);
859 	csd->tacc = exp[e] * mant[m] + 9 / 10;
860 	csd->nsac = mmc_get_bits(raw_csd, 104, 8) * 100;
861 	m = mmc_get_bits(raw_csd, 99, 4);
862 	e = mmc_get_bits(raw_csd, 96, 3);
863 	csd->tran_speed = exp[e] * 10000 * mant[m];
864 	csd->ccc = mmc_get_bits(raw_csd, 84, 12);
865 	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 80, 4);
866 	csd->read_bl_partial = mmc_get_bits(raw_csd, 79, 1);
867 	csd->write_blk_misalign = mmc_get_bits(raw_csd, 78, 1);
868 	csd->read_blk_misalign = mmc_get_bits(raw_csd, 77, 1);
869 	csd->dsr_imp = mmc_get_bits(raw_csd, 76, 1);
870 	csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 59, 3)];
871 	csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 56, 3)];
872 	csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 53, 3)];
873 	csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 50, 3)];
874 	m = mmc_get_bits(raw_csd, 62, 12);
875 	e = mmc_get_bits(raw_csd, 47, 3);
876 	csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
877 //	csd->erase_blk_en = mmc_get_bits(raw_csd, 46, 1);
878 //	csd->sector_size = mmc_get_bits(raw_csd, 39, 7);
879 	csd->wp_grp_size = mmc_get_bits(raw_csd, 32, 5);
880 	csd->wp_grp_enable = mmc_get_bits(raw_csd, 31, 1);
881 	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 26, 3);
882 	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 22, 4);
883 	csd->write_bl_partial = mmc_get_bits(raw_csd, 21, 1);
884 }
885 
886 static void
887 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
888 {
889 	unsigned int scr_struct;
890 	uint32_t tmp[4];
891 
892 	tmp[3] = raw_scr[1];
893 	tmp[2] = raw_scr[0];
894 
895 	memset(scr, 0, sizeof(*scr));
896 
897 	scr_struct = mmc_get_bits(tmp, 60, 4);
898 	if (scr_struct != 0) {
899 		printf("Unrecognised SCR structure version %d\n",
900 		    scr_struct);
901 		return;
902 	}
903 	scr->sda_vsn = mmc_get_bits(tmp, 56, 4);
904 	scr->bus_widths = mmc_get_bits(tmp, 48, 4);
905 }
906 
907 static int
908 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
909 {
910 	struct mmc_command cmd;
911 	int err;
912 
913 	cmd.opcode = MMC_ALL_SEND_CID;
914 	cmd.arg = 0;
915 	cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
916 	cmd.data = NULL;
917 	err = mmc_wait_for_cmd(sc, &cmd, 0);
918 	memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
919 	return (err);
920 }
921 
922 static int
923 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcid)
924 {
925 	struct mmc_command cmd;
926 	int err;
927 
928 	cmd.opcode = MMC_SEND_CSD;
929 	cmd.arg = rca << 16;
930 	cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
931 	cmd.data = NULL;
932 	err = mmc_wait_for_cmd(sc, &cmd, 0);
933 	memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
934 	return (err);
935 }
936 
937 static int
938 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
939 {
940 	int err;
941 	struct mmc_command cmd;
942 	struct mmc_data data;
943 
944 	memset(&cmd, 0, sizeof(struct mmc_command));
945 	memset(&data, 0, sizeof(struct mmc_data));
946 
947 	memset(rawscr, 0, 8);
948 	cmd.opcode = ACMD_SEND_SCR;
949 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
950 	cmd.arg = 0;
951 	cmd.data = &data;
952 
953 	data.data = rawscr;
954 	data.len = 8;
955 	data.flags = MMC_DATA_READ;
956 
957 	err = mmc_wait_for_app_cmd(sc, rca, &cmd, CMD_RETRIES);
958 	rawscr[0] = be32toh(rawscr[0]);
959 	rawscr[1] = be32toh(rawscr[1]);
960 	return (err);
961 }
962 
963 static int
964 mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd)
965 {
966 	int err;
967 	struct mmc_command cmd;
968 	struct mmc_data data;
969 
970 	memset(&cmd, 0, sizeof(struct mmc_command));
971 	memset(&data, 0, sizeof(struct mmc_data));
972 
973 	memset(rawextcsd, 0, 512);
974 	cmd.opcode = MMC_SEND_EXT_CSD;
975 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
976 	cmd.arg = 0;
977 	cmd.data = &data;
978 
979 	data.data = rawextcsd;
980 	data.len = 512;
981 	data.flags = MMC_DATA_READ;
982 
983 	err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES);
984 	return (err);
985 }
986 
987 static int
988 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
989 {
990 	struct mmc_command cmd;
991 	int err;
992 
993 	cmd.opcode = MMC_SET_RELATIVE_ADDR;
994 	cmd.arg = resp << 16;
995 	cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
996 	cmd.data = NULL;
997 	err = mmc_wait_for_cmd(sc, &cmd, 0);
998 	return (err);
999 }
1000 
1001 static int
1002 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1003 {
1004 	struct mmc_command cmd;
1005 	int err;
1006 
1007 	cmd.opcode = SD_SEND_RELATIVE_ADDR;
1008 	cmd.arg = 0;
1009 	cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1010 	cmd.data = NULL;
1011 	err = mmc_wait_for_cmd(sc, &cmd, 0);
1012 	*resp = cmd.resp[0];
1013 	return (err);
1014 }
1015 
1016 static void
1017 mmc_discover_cards(struct mmc_softc *sc)
1018 {
1019 	struct mmc_ivars *ivar;
1020 	int err;
1021 	uint32_t resp, sec_count;
1022 	device_t child;
1023 	uint16_t rca = 2;
1024 	u_char switch_res[64];
1025 
1026 	while (1) {
1027 		ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1028 		    M_WAITOK | M_ZERO);
1029 		if (!ivar)
1030 			return;
1031 		err = mmc_all_send_cid(sc, ivar->raw_cid);
1032 		if (err == MMC_ERR_TIMEOUT)
1033 			break;
1034 		if (err != MMC_ERR_NONE) {
1035 			device_printf(sc->dev, "Error reading CID %d\n", err);
1036 			break;
1037 		}
1038 		if (mmcbr_get_ro(sc->dev))
1039 			ivar->read_only = 1;
1040 		ivar->bus_width = bus_width_1;
1041 		ivar->mode = mmcbr_get_mode(sc->dev);
1042 		if (ivar->mode == mode_sd) {
1043 			mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1044 			mmc_send_relative_addr(sc, &resp);
1045 			ivar->rca = resp >> 16;
1046 			/* Get card CSD. */
1047 			mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1048 			mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1049 			ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1050 			if (ivar->csd.csd_structure > 0)
1051 				ivar->high_cap = 1;
1052 			ivar->tran_speed = ivar->csd.tran_speed;
1053 			/* Get card SCR. Card must be selected to fetch it. */
1054 			mmc_select_card(sc, ivar->rca);
1055 			mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1056 			mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1057 			/* Get card switch capabilities. */
1058 			if ((ivar->scr.sda_vsn >= 1) &&
1059 			    (ivar->csd.ccc & (1<<10))) {
1060 				mmc_sd_switch(sc, 0, 0, 0xF, switch_res);
1061 				if (switch_res[13] & 2) {
1062 					ivar->timing = bus_timing_hs;
1063 					ivar->hs_tran_speed = 50000000;
1064 				}
1065 			}
1066 			mmc_select_card(sc, 0);
1067 			/* Find max supported bus width. */
1068 			if ((mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) &&
1069 			    (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1070 				ivar->bus_width = bus_width_4;
1071 			/* Add device. */
1072 			child = device_add_child(sc->dev, NULL, -1);
1073 			device_set_ivars(child, ivar);
1074 			return;
1075 		}
1076 		mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid);
1077 		ivar->rca = rca++;
1078 		mmc_set_relative_addr(sc, ivar->rca);
1079 		/* Get card CSD. */
1080 		mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1081 		mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1082 		ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1083 		ivar->tran_speed = ivar->csd.tran_speed;
1084 		/* Only MMC >= 4.x cards support EXT_CSD. */
1085 		if (ivar->csd.spec_vers >= 4) {
1086 			/* Card must be selected to fetch EXT_CSD. */
1087 			mmc_select_card(sc, ivar->rca);
1088 			mmc_send_ext_csd(sc, ivar->raw_ext_csd);
1089 			/* Handle extended capacity from EXT_CSD */
1090 			sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] +
1091 			    (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1092 			    (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1093 			    (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1094 			if (sec_count != 0) {
1095 				ivar->sec_count = sec_count;
1096 				ivar->high_cap = 1;
1097 			}
1098 			/* Get card speed in high speed mode. */
1099 			ivar->timing = bus_timing_hs;
1100 			if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE]
1101 			    & EXT_CSD_CARD_TYPE_52)
1102 				ivar->hs_tran_speed = 52000000;
1103 			else if (ivar->raw_ext_csd[EXT_CSD_CARD_TYPE]
1104 			    & EXT_CSD_CARD_TYPE_26)
1105 				ivar->hs_tran_speed = 26000000;
1106 			else
1107 				ivar->hs_tran_speed = ivar->tran_speed;
1108 			/* Find max supported bus width. */
1109 			ivar->bus_width = mmc_test_bus_width(sc);
1110 			mmc_select_card(sc, 0);
1111 		} else {
1112 			ivar->bus_width = bus_width_1;
1113 			ivar->timing = bus_timing_normal;
1114 		}
1115 		/* Add device. */
1116 		child = device_add_child(sc->dev, NULL, -1);
1117 		device_set_ivars(child, ivar);
1118 	}
1119 	free(ivar, M_DEVBUF);
1120 }
1121 
1122 static void
1123 mmc_go_discovery(struct mmc_softc *sc)
1124 {
1125 	uint32_t ocr;
1126 	device_t dev;
1127 	int err;
1128 
1129 	dev = sc->dev;
1130 	if (mmcbr_get_power_mode(dev) != power_on) {
1131 		/*
1132 		 * First, try SD modes
1133 		 */
1134 		mmcbr_set_mode(dev, mode_sd);
1135 		mmc_power_up(sc);
1136 		mmcbr_set_bus_mode(dev, pushpull);
1137 		mmc_idle_cards(sc);
1138 		err = mmc_send_if_cond(sc, 1);
1139 		if (mmc_send_app_op_cond(sc, err ? 0 : MMC_OCR_CCS, &ocr) !=
1140 		    MMC_ERR_NONE) {
1141 			/*
1142 			 * Failed, try MMC
1143 			 */
1144 			mmcbr_set_mode(dev, mode_mmc);
1145 			if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE)
1146 				return;	/* Failed both, punt! XXX powerdown? */
1147 		}
1148 		mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
1149 		if (mmcbr_get_ocr(dev) != 0)
1150 			mmc_idle_cards(sc);
1151 	} else {
1152 		mmcbr_set_bus_mode(dev, opendrain);
1153 		mmcbr_set_clock(dev, mmcbr_get_f_min(dev));
1154 		mmcbr_update_ios(dev);
1155 		/* XXX recompute vdd based on new cards? */
1156 	}
1157 	/*
1158 	 * Make sure that we have a mutually agreeable voltage to at least
1159 	 * one card on the bus.
1160 	 */
1161 	if (mmcbr_get_ocr(dev) == 0)
1162 		return;
1163 	/*
1164 	 * Reselect the cards after we've idled them above.
1165 	 */
1166 	if (mmcbr_get_mode(dev) == mode_sd) {
1167 		err = mmc_send_if_cond(sc, 1);
1168 		mmc_send_app_op_cond(sc,
1169 		    (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
1170 	} else
1171 		mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL);
1172 	mmc_discover_cards(sc);
1173 
1174 	mmcbr_set_bus_mode(dev, pushpull);
1175 	mmcbr_update_ios(dev);
1176 	mmc_calculate_clock(sc);
1177 	bus_generic_attach(dev);
1178 /*	mmc_update_children_sysctl(dev);*/
1179 }
1180 
1181 static int
1182 mmc_calculate_clock(struct mmc_softc *sc)
1183 {
1184 	int max_dtr, max_hs_dtr, max_timing;
1185 	int nkid, i, f_min, f_max;
1186 	device_t *kids;
1187 	struct mmc_ivars *ivar;
1188 
1189 	f_min = mmcbr_get_f_min(sc->dev);
1190 	f_max = mmcbr_get_f_max(sc->dev);
1191 	max_dtr = max_hs_dtr = f_max;
1192 	if ((mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED))
1193 		max_timing = bus_timing_hs;
1194 	else
1195 		max_timing = bus_timing_normal;
1196 	if (device_get_children(sc->dev, &kids, &nkid) != 0)
1197 		panic("can't get children");
1198 	for (i = 0; i < nkid; i++) {
1199 		ivar = device_get_ivars(kids[i]);
1200 		if (ivar->timing < max_timing)
1201 			max_timing = ivar->timing;
1202 		if (ivar->tran_speed < max_dtr)
1203 			max_dtr = ivar->tran_speed;
1204 		if (ivar->hs_tran_speed < max_dtr)
1205 			max_hs_dtr = ivar->hs_tran_speed;
1206 	}
1207 	for (i = 0; i < nkid; i++) {
1208 		ivar = device_get_ivars(kids[i]);
1209 		if (ivar->timing == bus_timing_normal)
1210 			continue;
1211 		mmc_select_card(sc, ivar->rca);
1212 		mmc_set_timing(sc, max_timing);
1213 	}
1214 	mmc_select_card(sc, 0);
1215 	free(kids, M_TEMP);
1216 	if (max_timing == bus_timing_hs)
1217 		max_dtr = max_hs_dtr;
1218 	if (bootverbose) {
1219 		device_printf(sc->dev,
1220 		    "setting transfer rate to %d.%03dMHz%s\n",
1221 		    max_dtr / 1000000, (max_dtr / 1000) % 1000,
1222 		    max_timing == bus_timing_hs ? " (high speed timing)" : "");
1223 	}
1224 	mmcbr_set_timing(sc->dev, max_timing);
1225 	mmcbr_set_clock(sc->dev, max_dtr);
1226 	mmcbr_update_ios(sc->dev);
1227 	return max_dtr;
1228 }
1229 
1230 static void
1231 mmc_scan(struct mmc_softc *sc)
1232 {
1233 	device_t dev;
1234 
1235 	dev = sc->dev;
1236 	mmc_acquire_bus(dev, dev);
1237 
1238 	if (mmcbr_get_power_mode(dev) == power_on)
1239 		mmc_rescan_cards(sc);
1240 	mmc_go_discovery(sc);
1241 
1242 	mmc_release_bus(dev, dev);
1243 	/* XXX probe/attach/detach children? */
1244 }
1245 
1246 static int
1247 mmc_read_ivar(device_t bus, device_t child, int which, u_char *result)
1248 {
1249 	struct mmc_ivars *ivar = device_get_ivars(child);
1250 
1251 	switch (which) {
1252 	default:
1253 		return (EINVAL);
1254 	case MMC_IVAR_DSR_IMP:
1255 		*(int *)result = ivar->csd.dsr_imp;
1256 		break;
1257 	case MMC_IVAR_MEDIA_SIZE:
1258 		*(off_t *)result = ivar->sec_count;
1259 		break;
1260 	case MMC_IVAR_RCA:
1261 		*(int *)result = ivar->rca;
1262 		break;
1263 	case MMC_IVAR_SECTOR_SIZE:
1264 		*(int *)result = MMC_SECTOR_SIZE;
1265 		break;
1266 	case MMC_IVAR_TRAN_SPEED:
1267 		*(int *)result = mmcbr_get_clock(bus);
1268 		break;
1269 	case MMC_IVAR_READ_ONLY:
1270 		*(int *)result = ivar->read_only;
1271 		break;
1272 	case MMC_IVAR_HIGH_CAP:
1273 		*(int *)result = ivar->high_cap;
1274 		break;
1275 	case MMC_IVAR_CARD_TYPE:
1276 		*(int *)result = ivar->mode;
1277 		break;
1278 	case MMC_IVAR_BUS_WIDTH:
1279 		*(int *)result = ivar->bus_width;
1280 		break;
1281 	}
1282 	return (0);
1283 }
1284 
1285 static int
1286 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1287 {
1288 	/*
1289 	 * None are writable ATM
1290 	 */
1291 	return (EINVAL);
1292 }
1293 
1294 
1295 static void
1296 mmc_delayed_attach(void *xsc)
1297 {
1298 	struct mmc_softc *sc = xsc;
1299 
1300 	mmc_scan(sc);
1301 	config_intrhook_disestablish(&sc->config_intrhook);
1302 }
1303 
1304 static device_method_t mmc_methods[] = {
1305 	/* device_if */
1306 	DEVMETHOD(device_probe, mmc_probe),
1307 	DEVMETHOD(device_attach, mmc_attach),
1308 	DEVMETHOD(device_detach, mmc_detach),
1309 
1310 	/* Bus interface */
1311 	DEVMETHOD(bus_read_ivar, mmc_read_ivar),
1312 	DEVMETHOD(bus_write_ivar, mmc_write_ivar),
1313 
1314 	/* MMC Bus interface */
1315 	DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
1316 	DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
1317 	DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
1318 
1319 	{0, 0},
1320 };
1321 
1322 static driver_t mmc_driver = {
1323 	"mmc",
1324 	mmc_methods,
1325 	sizeof(struct mmc_softc),
1326 };
1327 static devclass_t mmc_devclass;
1328 
1329 
1330 DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, 0, 0);
1331 DRIVER_MODULE(mmc, sdhci, mmc_driver, mmc_devclass, 0, 0);
1332