1 /*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * Portions of this software may have been developed with reference to 27 * the SD Simplified Specification. The following disclaimer may apply: 28 * 29 * The following conditions apply to the release of the simplified 30 * specification ("Simplified Specification") by the SD Card Association and 31 * the SD Group. The Simplified Specification is a subset of the complete SD 32 * Specification which is owned by the SD Card Association and the SD 33 * Group. This Simplified Specification is provided on a non-confidential 34 * basis subject to the disclaimers below. Any implementation of the 35 * Simplified Specification may require a license from the SD Card 36 * Association, SD Group, SD-3C LLC or other third parties. 37 * 38 * Disclaimers: 39 * 40 * The information contained in the Simplified Specification is presented only 41 * as a standard specification for SD Cards and SD Host/Ancillary products and 42 * is provided "AS-IS" without any representations or warranties of any 43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44 * Card Association for any damages, any infringements of patents or other 45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46 * parties, which may result from its use. No license is granted by 47 * implication, estoppel or otherwise under any patent or other rights of the 48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50 * or the SD Card Association to disclose or distribute any technical 51 * information, know-how or other confidential information to any third party. 52 */ 53 54 #include <sys/cdefs.h> 55 __FBSDID("$FreeBSD$"); 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/lock.h> 62 #include <sys/module.h> 63 #include <sys/mutex.h> 64 #include <sys/bus.h> 65 #include <sys/endian.h> 66 #include <sys/sysctl.h> 67 #include <sys/time.h> 68 69 #include <dev/mmc/bridge.h> 70 #include <dev/mmc/mmc_private.h> 71 #include <dev/mmc/mmc_subr.h> 72 #include <dev/mmc/mmcreg.h> 73 #include <dev/mmc/mmcbrvar.h> 74 #include <dev/mmc/mmcvar.h> 75 76 #include "mmcbr_if.h" 77 #include "mmcbus_if.h" 78 79 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 80 81 /* 82 * Per-card data 83 */ 84 struct mmc_ivars { 85 uint32_t raw_cid[4]; /* Raw bits of the CID */ 86 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 87 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 88 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 89 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 90 uint16_t rca; 91 u_char read_only; /* True when the device is read-only */ 92 u_char high_cap; /* High Capacity device (block addressed) */ 93 enum mmc_card_mode mode; 94 enum mmc_bus_width bus_width; /* Bus width to use */ 95 struct mmc_cid cid; /* cid decoded */ 96 struct mmc_csd csd; /* csd decoded */ 97 struct mmc_scr scr; /* scr decoded */ 98 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 99 uint32_t sec_count; /* Card capacity in 512byte blocks */ 100 uint32_t timings; /* Mask of bus timings supported */ 101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 103 uint32_t tran_speed; /* Max speed in normal mode */ 104 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 105 uint32_t erase_sector; /* Card native erase sector size */ 106 uint32_t cmd6_time; /* Generic switch timeout [us] */ 107 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 108 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 109 }; 110 111 #define CMD_RETRIES 3 112 113 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver"); 114 115 static int mmc_debug; 116 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, 117 "Debug level"); 118 119 /* bus entry points */ 120 static int mmc_acquire_bus(device_t busdev, device_t dev); 121 static int mmc_attach(device_t dev); 122 static int mmc_child_location_str(device_t dev, device_t child, char *buf, 123 size_t buflen); 124 static int mmc_detach(device_t dev); 125 static int mmc_probe(device_t dev); 126 static int mmc_read_ivar(device_t bus, device_t child, int which, 127 uintptr_t *result); 128 static int mmc_release_bus(device_t busdev, device_t dev); 129 static int mmc_resume(device_t dev); 130 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune); 131 static void mmc_retune_unpause(device_t busdev, device_t dev); 132 static int mmc_suspend(device_t dev); 133 static int mmc_wait_for_request(device_t busdev, device_t dev, 134 struct mmc_request *req); 135 static int mmc_write_ivar(device_t bus, device_t child, int which, 136 uintptr_t value); 137 138 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 139 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 140 #define MMC_LOCK_INIT(_sc) \ 141 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \ 142 "mmc", MTX_DEF) 143 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 144 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED); 145 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED); 146 147 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 148 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 149 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 150 struct mmc_sd_status *sd_status); 151 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 152 uint32_t *rawsdstatus); 153 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 154 uint32_t *rawscr); 155 static int mmc_calculate_clock(struct mmc_softc *sc); 156 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 157 bool is_4_41p); 158 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 159 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 160 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 161 static void mmc_delayed_attach(void *xsc); 162 static int mmc_delete_cards(struct mmc_softc *sc, bool final); 163 static void mmc_discover_cards(struct mmc_softc *sc); 164 static void mmc_format_card_id_string(struct mmc_ivars *ivar); 165 static void mmc_go_discovery(struct mmc_softc *sc); 166 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 167 int size); 168 static int mmc_highest_voltage(uint32_t ocr); 169 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing); 170 static void mmc_idle_cards(struct mmc_softc *sc); 171 static void mmc_ms_delay(int ms); 172 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 173 static void mmc_power_down(struct mmc_softc *sc); 174 static void mmc_power_up(struct mmc_softc *sc); 175 static void mmc_rescan_cards(struct mmc_softc *sc); 176 static int mmc_retune(device_t busdev, device_t dev, bool reset); 177 static void mmc_scan(struct mmc_softc *sc); 178 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 179 uint8_t value, uint8_t *res); 180 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 181 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 182 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 183 uint32_t *rocr); 184 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 185 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 186 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 187 uint32_t *rocr); 188 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 189 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 190 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 191 enum mmc_bus_timing timing); 192 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 193 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 194 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 195 enum mmc_bus_timing timing); 196 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 197 enum mmc_bus_timing timing); 198 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 199 uint32_t clock); 200 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 201 uint32_t max_dtr, enum mmc_bus_timing max_timing); 202 static int mmc_test_bus_width(struct mmc_softc *sc); 203 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 204 enum mmc_bus_timing timing); 205 static const char *mmc_timing_to_string(enum mmc_bus_timing timing); 206 static void mmc_update_child_list(struct mmc_softc *sc); 207 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 208 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 209 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 210 static void mmc_wakeup(struct mmc_request *req); 211 212 static void 213 mmc_ms_delay(int ms) 214 { 215 216 DELAY(1000 * ms); /* XXX BAD */ 217 } 218 219 static int 220 mmc_probe(device_t dev) 221 { 222 223 device_set_desc(dev, "MMC/SD bus"); 224 return (0); 225 } 226 227 static int 228 mmc_attach(device_t dev) 229 { 230 struct mmc_softc *sc; 231 232 sc = device_get_softc(dev); 233 sc->dev = dev; 234 MMC_LOCK_INIT(sc); 235 236 /* We'll probe and attach our children later, but before / mount */ 237 sc->config_intrhook.ich_func = mmc_delayed_attach; 238 sc->config_intrhook.ich_arg = sc; 239 if (config_intrhook_establish(&sc->config_intrhook) != 0) 240 device_printf(dev, "config_intrhook_establish failed\n"); 241 return (0); 242 } 243 244 static int 245 mmc_detach(device_t dev) 246 { 247 struct mmc_softc *sc = device_get_softc(dev); 248 int err; 249 250 err = mmc_delete_cards(sc, true); 251 if (err != 0) 252 return (err); 253 mmc_power_down(sc); 254 MMC_LOCK_DESTROY(sc); 255 256 return (0); 257 } 258 259 static int 260 mmc_suspend(device_t dev) 261 { 262 struct mmc_softc *sc = device_get_softc(dev); 263 int err; 264 265 err = bus_generic_suspend(dev); 266 if (err != 0) 267 return (err); 268 /* 269 * We power down with the bus acquired here, mainly so that no device 270 * is selected any longer and sc->last_rca gets set to 0. Otherwise, 271 * the deselect as part of the bus acquisition in mmc_scan() may fail 272 * during resume, as the bus isn't powered up again before later in 273 * mmc_go_discovery(). 274 */ 275 err = mmc_acquire_bus(dev, dev); 276 if (err != 0) 277 return (err); 278 mmc_power_down(sc); 279 err = mmc_release_bus(dev, dev); 280 return (err); 281 } 282 283 static int 284 mmc_resume(device_t dev) 285 { 286 struct mmc_softc *sc = device_get_softc(dev); 287 288 mmc_scan(sc); 289 return (bus_generic_resume(dev)); 290 } 291 292 static int 293 mmc_acquire_bus(device_t busdev, device_t dev) 294 { 295 struct mmc_softc *sc; 296 struct mmc_ivars *ivar; 297 int err; 298 uint16_t rca; 299 enum mmc_bus_timing timing; 300 301 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 302 if (err) 303 return (err); 304 sc = device_get_softc(busdev); 305 MMC_LOCK(sc); 306 if (sc->owner) 307 panic("mmc: host bridge didn't serialize us."); 308 sc->owner = dev; 309 MMC_UNLOCK(sc); 310 311 if (busdev != dev) { 312 /* 313 * Keep track of the last rca that we've selected. If 314 * we're asked to do it again, don't. We never 315 * unselect unless the bus code itself wants the mmc 316 * bus, and constantly reselecting causes problems. 317 */ 318 ivar = device_get_ivars(dev); 319 rca = ivar->rca; 320 if (sc->last_rca != rca) { 321 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 322 device_printf(busdev, "Card at relative " 323 "address %d failed to select\n", rca); 324 return (ENXIO); 325 } 326 sc->last_rca = rca; 327 timing = mmcbr_get_timing(busdev); 328 /* 329 * For eMMC modes, setting/updating bus width and VCCQ 330 * only really is necessary if there actually is more 331 * than one device on the bus as generally that already 332 * had to be done by mmc_calculate_clock() or one of 333 * its calees. Moreover, setting the bus width anew 334 * can trigger re-tuning (via a CRC error on the next 335 * CMD), even if not switching between devices an the 336 * previously selected one is still tuned. Obviously, 337 * we need to re-tune the host controller if devices 338 * are actually switched, though. 339 */ 340 if (timing >= bus_timing_mmc_ddr52 && 341 sc->child_count == 1) 342 return (0); 343 /* Prepare bus width for the new card. */ 344 if (bootverbose || mmc_debug) { 345 device_printf(busdev, 346 "setting bus width to %d bits %s timing\n", 347 (ivar->bus_width == bus_width_4) ? 4 : 348 (ivar->bus_width == bus_width_8) ? 8 : 1, 349 mmc_timing_to_string(timing)); 350 } 351 if (mmc_set_card_bus_width(sc, ivar, timing) != 352 MMC_ERR_NONE) { 353 device_printf(busdev, "Card at relative " 354 "address %d failed to set bus width\n", 355 rca); 356 return (ENXIO); 357 } 358 mmcbr_set_bus_width(busdev, ivar->bus_width); 359 mmcbr_update_ios(busdev); 360 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 361 device_printf(busdev, "Failed to set VCCQ " 362 "for card at relative address %d\n", rca); 363 return (ENXIO); 364 } 365 if (timing >= bus_timing_mmc_hs200 && 366 mmc_retune(busdev, dev, true) != 0) { 367 device_printf(busdev, "Card at relative " 368 "address %d failed to re-tune\n", rca); 369 return (ENXIO); 370 } 371 } 372 } else { 373 /* 374 * If there's a card selected, stand down. 375 */ 376 if (sc->last_rca != 0) { 377 if (mmc_select_card(sc, 0) != MMC_ERR_NONE) 378 return (ENXIO); 379 sc->last_rca = 0; 380 } 381 } 382 383 return (0); 384 } 385 386 static int 387 mmc_release_bus(device_t busdev, device_t dev) 388 { 389 struct mmc_softc *sc; 390 int err; 391 392 sc = device_get_softc(busdev); 393 394 MMC_LOCK(sc); 395 if (!sc->owner) 396 panic("mmc: releasing unowned bus."); 397 if (sc->owner != dev) 398 panic("mmc: you don't own the bus. game over."); 399 MMC_UNLOCK(sc); 400 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 401 if (err) 402 return (err); 403 MMC_LOCK(sc); 404 sc->owner = NULL; 405 MMC_UNLOCK(sc); 406 return (0); 407 } 408 409 static uint32_t 410 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 411 { 412 413 return (ocr & MMC_OCR_VOLTAGE); 414 } 415 416 static int 417 mmc_highest_voltage(uint32_t ocr) 418 { 419 int i; 420 421 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 422 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 423 if (ocr & (1 << i)) 424 return (i); 425 return (-1); 426 } 427 428 static void 429 mmc_wakeup(struct mmc_request *req) 430 { 431 struct mmc_softc *sc; 432 433 sc = (struct mmc_softc *)req->done_data; 434 MMC_LOCK(sc); 435 req->flags |= MMC_REQ_DONE; 436 MMC_UNLOCK(sc); 437 wakeup(req); 438 } 439 440 static int 441 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 442 { 443 444 req->done = mmc_wakeup; 445 req->done_data = sc; 446 if (__predict_false(mmc_debug > 1)) { 447 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 448 req->cmd->opcode, req->cmd->arg, req->cmd->flags); 449 if (req->cmd->data) { 450 printf(" data %d\n", (int)req->cmd->data->len); 451 } else 452 printf("\n"); 453 } 454 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 455 MMC_LOCK(sc); 456 while ((req->flags & MMC_REQ_DONE) == 0) 457 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 458 MMC_UNLOCK(sc); 459 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 && 460 req->cmd->error != MMC_ERR_NONE))) 461 device_printf(sc->dev, "CMD%d RESULT: %d\n", 462 req->cmd->opcode, req->cmd->error); 463 return (0); 464 } 465 466 static int 467 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req) 468 { 469 struct mmc_softc *sc; 470 struct mmc_ivars *ivar; 471 int err, i; 472 enum mmc_retune_req retune_req; 473 474 sc = device_get_softc(busdev); 475 KASSERT(sc->owner != NULL, 476 ("%s: Request from %s without bus being acquired.", __func__, 477 device_get_nameunit(dev))); 478 479 /* 480 * Unless no device is selected or re-tuning is already ongoing, 481 * execute re-tuning if a) the bridge is requesting to do so and 482 * re-tuning hasn't been otherwise paused, or b) if a child asked 483 * to be re-tuned prior to pausing (see also mmc_retune_pause()). 484 */ 485 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 && 486 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none && 487 sc->retune_paused == 0) || sc->retune_needed == 1))) { 488 if (__predict_false(mmc_debug > 1)) { 489 device_printf(busdev, 490 "Re-tuning with%s circuit reset required\n", 491 retune_req == retune_req_reset ? "" : "out"); 492 } 493 if (device_get_parent(dev) == busdev) 494 ivar = device_get_ivars(dev); 495 else { 496 for (i = 0; i < sc->child_count; i++) { 497 ivar = device_get_ivars(sc->child_list[i]); 498 if (ivar->rca == sc->last_rca) 499 break; 500 } 501 if (ivar->rca != sc->last_rca) 502 return (EINVAL); 503 } 504 sc->retune_ongoing = 1; 505 err = mmc_retune(busdev, dev, retune_req == retune_req_reset); 506 sc->retune_ongoing = 0; 507 switch (err) { 508 case MMC_ERR_NONE: 509 case MMC_ERR_FAILED: /* Re-tune error but still might work */ 510 break; 511 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */ 512 return (ENXIO); 513 case MMC_ERR_INVALID: /* Driver implementation b0rken */ 514 default: /* Unknown error, should not happen */ 515 return (EINVAL); 516 } 517 sc->retune_needed = 0; 518 } 519 return (mmc_wait_for_req(sc, req)); 520 } 521 522 static int 523 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 524 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 525 { 526 struct mmc_command cmd; 527 int err; 528 529 memset(&cmd, 0, sizeof(cmd)); 530 cmd.opcode = opcode; 531 cmd.arg = arg; 532 cmd.flags = flags; 533 cmd.data = NULL; 534 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 535 if (err) 536 return (err); 537 if (resp) { 538 if (flags & MMC_RSP_136) 539 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 540 else 541 *resp = cmd.resp[0]; 542 } 543 return (0); 544 } 545 546 static void 547 mmc_idle_cards(struct mmc_softc *sc) 548 { 549 device_t dev; 550 struct mmc_command cmd; 551 552 dev = sc->dev; 553 mmcbr_set_chip_select(dev, cs_high); 554 mmcbr_update_ios(dev); 555 mmc_ms_delay(1); 556 557 memset(&cmd, 0, sizeof(cmd)); 558 cmd.opcode = MMC_GO_IDLE_STATE; 559 cmd.arg = 0; 560 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 561 cmd.data = NULL; 562 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 563 mmc_ms_delay(1); 564 565 mmcbr_set_chip_select(dev, cs_dontcare); 566 mmcbr_update_ios(dev); 567 mmc_ms_delay(1); 568 } 569 570 static int 571 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 572 { 573 struct mmc_command cmd; 574 int err = MMC_ERR_NONE, i; 575 576 memset(&cmd, 0, sizeof(cmd)); 577 cmd.opcode = ACMD_SD_SEND_OP_COND; 578 cmd.arg = ocr; 579 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 580 cmd.data = NULL; 581 582 for (i = 0; i < 1000; i++) { 583 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 584 CMD_RETRIES); 585 if (err != MMC_ERR_NONE) 586 break; 587 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 588 (ocr & MMC_OCR_VOLTAGE) == 0) 589 break; 590 err = MMC_ERR_TIMEOUT; 591 mmc_ms_delay(10); 592 } 593 if (rocr && err == MMC_ERR_NONE) 594 *rocr = cmd.resp[0]; 595 return (err); 596 } 597 598 static int 599 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 600 { 601 struct mmc_command cmd; 602 int err = MMC_ERR_NONE, i; 603 604 memset(&cmd, 0, sizeof(cmd)); 605 cmd.opcode = MMC_SEND_OP_COND; 606 cmd.arg = ocr; 607 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 608 cmd.data = NULL; 609 610 for (i = 0; i < 1000; i++) { 611 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 612 if (err != MMC_ERR_NONE) 613 break; 614 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 615 (ocr & MMC_OCR_VOLTAGE) == 0) 616 break; 617 err = MMC_ERR_TIMEOUT; 618 mmc_ms_delay(10); 619 } 620 if (rocr && err == MMC_ERR_NONE) 621 *rocr = cmd.resp[0]; 622 return (err); 623 } 624 625 static int 626 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 627 { 628 struct mmc_command cmd; 629 int err; 630 631 memset(&cmd, 0, sizeof(cmd)); 632 cmd.opcode = SD_SEND_IF_COND; 633 cmd.arg = (vhs << 8) + 0xAA; 634 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 635 cmd.data = NULL; 636 637 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 638 return (err); 639 } 640 641 static void 642 mmc_power_up(struct mmc_softc *sc) 643 { 644 device_t dev; 645 enum mmc_vccq vccq; 646 647 dev = sc->dev; 648 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 649 mmcbr_set_bus_mode(dev, opendrain); 650 mmcbr_set_chip_select(dev, cs_dontcare); 651 mmcbr_set_bus_width(dev, bus_width_1); 652 mmcbr_set_power_mode(dev, power_up); 653 mmcbr_set_clock(dev, 0); 654 mmcbr_update_ios(dev); 655 for (vccq = vccq_330; ; vccq--) { 656 mmcbr_set_vccq(dev, vccq); 657 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 658 break; 659 } 660 mmc_ms_delay(1); 661 662 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 663 mmcbr_set_timing(dev, bus_timing_normal); 664 mmcbr_set_power_mode(dev, power_on); 665 mmcbr_update_ios(dev); 666 mmc_ms_delay(2); 667 } 668 669 static void 670 mmc_power_down(struct mmc_softc *sc) 671 { 672 device_t dev = sc->dev; 673 674 mmcbr_set_bus_mode(dev, opendrain); 675 mmcbr_set_chip_select(dev, cs_dontcare); 676 mmcbr_set_bus_width(dev, bus_width_1); 677 mmcbr_set_power_mode(dev, power_off); 678 mmcbr_set_clock(dev, 0); 679 mmcbr_set_timing(dev, bus_timing_normal); 680 mmcbr_update_ios(dev); 681 } 682 683 static int 684 mmc_select_card(struct mmc_softc *sc, uint16_t rca) 685 { 686 int err, flags; 687 688 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 689 sc->retune_paused++; 690 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 691 flags, NULL, CMD_RETRIES); 692 sc->retune_paused--; 693 return (err); 694 } 695 696 static int 697 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 698 uint8_t *res) 699 { 700 int err; 701 struct mmc_command cmd; 702 struct mmc_data data; 703 704 memset(&cmd, 0, sizeof(cmd)); 705 memset(&data, 0, sizeof(data)); 706 memset(res, 0, 64); 707 708 cmd.opcode = SD_SWITCH_FUNC; 709 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 710 cmd.arg = mode << 31; /* 0 - check, 1 - set */ 711 cmd.arg |= 0x00FFFFFF; 712 cmd.arg &= ~(0xF << (grp * 4)); 713 cmd.arg |= value << (grp * 4); 714 cmd.data = &data; 715 716 data.data = res; 717 data.len = 64; 718 data.flags = MMC_DATA_READ; 719 720 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 721 return (err); 722 } 723 724 static int 725 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 726 enum mmc_bus_timing timing) 727 { 728 struct mmc_command cmd; 729 int err; 730 uint8_t value; 731 732 if (mmcbr_get_mode(sc->dev) == mode_sd) { 733 memset(&cmd, 0, sizeof(cmd)); 734 cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 735 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 736 cmd.arg = SD_CLR_CARD_DETECT; 737 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 738 CMD_RETRIES); 739 if (err != 0) 740 return (err); 741 memset(&cmd, 0, sizeof(cmd)); 742 cmd.opcode = ACMD_SET_BUS_WIDTH; 743 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 744 switch (ivar->bus_width) { 745 case bus_width_1: 746 cmd.arg = SD_BUS_WIDTH_1; 747 break; 748 case bus_width_4: 749 cmd.arg = SD_BUS_WIDTH_4; 750 break; 751 default: 752 return (MMC_ERR_INVALID); 753 } 754 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 755 CMD_RETRIES); 756 } else { 757 switch (ivar->bus_width) { 758 case bus_width_1: 759 if (timing == bus_timing_mmc_hs400 || 760 timing == bus_timing_mmc_hs400es) 761 return (MMC_ERR_INVALID); 762 value = EXT_CSD_BUS_WIDTH_1; 763 break; 764 case bus_width_4: 765 switch (timing) { 766 case bus_timing_mmc_ddr52: 767 value = EXT_CSD_BUS_WIDTH_4_DDR; 768 break; 769 case bus_timing_mmc_hs400: 770 case bus_timing_mmc_hs400es: 771 return (MMC_ERR_INVALID); 772 default: 773 value = EXT_CSD_BUS_WIDTH_4; 774 break; 775 } 776 break; 777 case bus_width_8: 778 value = 0; 779 switch (timing) { 780 case bus_timing_mmc_hs400es: 781 value = EXT_CSD_BUS_WIDTH_ES; 782 /* FALLTHROUGH */ 783 case bus_timing_mmc_ddr52: 784 case bus_timing_mmc_hs400: 785 value |= EXT_CSD_BUS_WIDTH_8_DDR; 786 break; 787 default: 788 value = EXT_CSD_BUS_WIDTH_8; 789 break; 790 } 791 break; 792 default: 793 return (MMC_ERR_INVALID); 794 } 795 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 796 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 797 ivar->cmd6_time, true); 798 } 799 return (err); 800 } 801 802 static int 803 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 804 { 805 device_t dev; 806 const uint8_t *ext_csd; 807 uint32_t clock; 808 uint8_t value; 809 810 dev = sc->dev; 811 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4) 812 return (MMC_ERR_NONE); 813 814 value = 0; 815 ext_csd = ivar->raw_ext_csd; 816 clock = mmcbr_get_clock(dev); 817 switch (1 << mmcbr_get_vdd(dev)) { 818 case MMC_OCR_LOW_VOLTAGE: 819 if (clock <= MMC_TYPE_HS_26_MAX) 820 value = ext_csd[EXT_CSD_PWR_CL_26_195]; 821 else if (clock <= MMC_TYPE_HS_52_MAX) { 822 if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 && 823 ivar->bus_width >= bus_width_4) 824 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 825 else 826 value = ext_csd[EXT_CSD_PWR_CL_52_195]; 827 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) 828 value = ext_csd[EXT_CSD_PWR_CL_200_195]; 829 break; 830 case MMC_OCR_270_280: 831 case MMC_OCR_280_290: 832 case MMC_OCR_290_300: 833 case MMC_OCR_300_310: 834 case MMC_OCR_310_320: 835 case MMC_OCR_320_330: 836 case MMC_OCR_330_340: 837 case MMC_OCR_340_350: 838 case MMC_OCR_350_360: 839 if (clock <= MMC_TYPE_HS_26_MAX) 840 value = ext_csd[EXT_CSD_PWR_CL_26_360]; 841 else if (clock <= MMC_TYPE_HS_52_MAX) { 842 if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 && 843 ivar->bus_width >= bus_width_4) 844 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 845 else 846 value = ext_csd[EXT_CSD_PWR_CL_52_360]; 847 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 848 if (ivar->bus_width == bus_width_8) 849 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 850 else 851 value = ext_csd[EXT_CSD_PWR_CL_200_360]; 852 } 853 break; 854 default: 855 device_printf(dev, "No power class support for VDD 0x%x\n", 856 1 << mmcbr_get_vdd(dev)); 857 return (MMC_ERR_INVALID); 858 } 859 860 if (ivar->bus_width == bus_width_8) 861 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 862 EXT_CSD_POWER_CLASS_8BIT_SHIFT; 863 else 864 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 865 EXT_CSD_POWER_CLASS_4BIT_SHIFT; 866 867 if (value == 0) 868 return (MMC_ERR_NONE); 869 870 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 871 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 872 } 873 874 static int 875 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 876 enum mmc_bus_timing timing) 877 { 878 u_char switch_res[64]; 879 uint8_t value; 880 int err; 881 882 if (mmcbr_get_mode(sc->dev) == mode_sd) { 883 switch (timing) { 884 case bus_timing_normal: 885 value = SD_SWITCH_NORMAL_MODE; 886 break; 887 case bus_timing_hs: 888 value = SD_SWITCH_HS_MODE; 889 break; 890 default: 891 return (MMC_ERR_INVALID); 892 } 893 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 894 value, switch_res); 895 if (err != MMC_ERR_NONE) 896 return (err); 897 if ((switch_res[16] & 0xf) != value) 898 return (MMC_ERR_FAILED); 899 mmcbr_set_timing(sc->dev, timing); 900 mmcbr_update_ios(sc->dev); 901 } else { 902 switch (timing) { 903 case bus_timing_normal: 904 value = EXT_CSD_HS_TIMING_BC; 905 break; 906 case bus_timing_hs: 907 case bus_timing_mmc_ddr52: 908 value = EXT_CSD_HS_TIMING_HS; 909 break; 910 case bus_timing_mmc_hs200: 911 value = EXT_CSD_HS_TIMING_HS200; 912 break; 913 case bus_timing_mmc_hs400: 914 case bus_timing_mmc_hs400es: 915 value = EXT_CSD_HS_TIMING_HS400; 916 break; 917 default: 918 return (MMC_ERR_INVALID); 919 } 920 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 921 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 922 ivar->cmd6_time, false); 923 if (err != MMC_ERR_NONE) 924 return (err); 925 mmcbr_set_timing(sc->dev, timing); 926 mmcbr_update_ios(sc->dev); 927 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 928 ivar->cmd6_time); 929 } 930 return (err); 931 } 932 933 static int 934 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 935 enum mmc_bus_timing timing) 936 { 937 938 if (isset(&ivar->vccq_120, timing)) 939 mmcbr_set_vccq(sc->dev, vccq_120); 940 else if (isset(&ivar->vccq_180, timing)) 941 mmcbr_set_vccq(sc->dev, vccq_180); 942 else 943 mmcbr_set_vccq(sc->dev, vccq_330); 944 if (mmcbr_switch_vccq(sc->dev) != 0) 945 return (MMC_ERR_INVALID); 946 else 947 return (MMC_ERR_NONE); 948 } 949 950 static const uint8_t p8[8] = { 951 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 952 }; 953 954 static const uint8_t p8ok[8] = { 955 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 956 }; 957 958 static const uint8_t p4[4] = { 959 0x5A, 0x00, 0x00, 0x00 960 }; 961 962 static const uint8_t p4ok[4] = { 963 0xA5, 0x00, 0x00, 0x00 964 }; 965 966 static int 967 mmc_test_bus_width(struct mmc_softc *sc) 968 { 969 struct mmc_command cmd; 970 struct mmc_data data; 971 uint8_t buf[8]; 972 int err; 973 974 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 975 mmcbr_set_bus_width(sc->dev, bus_width_8); 976 mmcbr_update_ios(sc->dev); 977 978 sc->squelched++; /* Errors are expected, squelch reporting. */ 979 memset(&cmd, 0, sizeof(cmd)); 980 memset(&data, 0, sizeof(data)); 981 cmd.opcode = MMC_BUSTEST_W; 982 cmd.arg = 0; 983 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 984 cmd.data = &data; 985 986 data.data = __DECONST(void *, p8); 987 data.len = 8; 988 data.flags = MMC_DATA_WRITE; 989 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 990 991 memset(&cmd, 0, sizeof(cmd)); 992 memset(&data, 0, sizeof(data)); 993 cmd.opcode = MMC_BUSTEST_R; 994 cmd.arg = 0; 995 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 996 cmd.data = &data; 997 998 data.data = buf; 999 data.len = 8; 1000 data.flags = MMC_DATA_READ; 1001 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1002 sc->squelched--; 1003 1004 mmcbr_set_bus_width(sc->dev, bus_width_1); 1005 mmcbr_update_ios(sc->dev); 1006 1007 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 1008 return (bus_width_8); 1009 } 1010 1011 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 1012 mmcbr_set_bus_width(sc->dev, bus_width_4); 1013 mmcbr_update_ios(sc->dev); 1014 1015 sc->squelched++; /* Errors are expected, squelch reporting. */ 1016 memset(&cmd, 0, sizeof(cmd)); 1017 memset(&data, 0, sizeof(data)); 1018 cmd.opcode = MMC_BUSTEST_W; 1019 cmd.arg = 0; 1020 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1021 cmd.data = &data; 1022 1023 data.data = __DECONST(void *, p4); 1024 data.len = 4; 1025 data.flags = MMC_DATA_WRITE; 1026 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1027 1028 memset(&cmd, 0, sizeof(cmd)); 1029 memset(&data, 0, sizeof(data)); 1030 cmd.opcode = MMC_BUSTEST_R; 1031 cmd.arg = 0; 1032 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1033 cmd.data = &data; 1034 1035 data.data = buf; 1036 data.len = 4; 1037 data.flags = MMC_DATA_READ; 1038 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1039 sc->squelched--; 1040 1041 mmcbr_set_bus_width(sc->dev, bus_width_1); 1042 mmcbr_update_ios(sc->dev); 1043 1044 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 1045 return (bus_width_4); 1046 } 1047 return (bus_width_1); 1048 } 1049 1050 static uint32_t 1051 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 1052 { 1053 const int i = (bit_len / 32) - (start / 32) - 1; 1054 const int shift = start & 31; 1055 uint32_t retval = bits[i] >> shift; 1056 1057 if (size + shift > 32) 1058 retval |= bits[i - 1] << (32 - shift); 1059 return (retval & ((1llu << size) - 1)); 1060 } 1061 1062 static void 1063 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 1064 { 1065 int i; 1066 1067 /* There's no version info, so we take it on faith */ 1068 memset(cid, 0, sizeof(*cid)); 1069 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1070 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 1071 for (i = 0; i < 5; i++) 1072 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1073 cid->pnm[5] = 0; 1074 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 1075 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 1076 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 1077 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 1078 } 1079 1080 static void 1081 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 1082 { 1083 int i; 1084 1085 /* There's no version info, so we take it on faith */ 1086 memset(cid, 0, sizeof(*cid)); 1087 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1088 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 1089 for (i = 0; i < 6; i++) 1090 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1091 cid->pnm[6] = 0; 1092 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 1093 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 1094 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 1095 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 1096 if (is_4_41p) 1097 cid->mdt_year += 2013; 1098 else 1099 cid->mdt_year += 1997; 1100 } 1101 1102 static void 1103 mmc_format_card_id_string(struct mmc_ivars *ivar) 1104 { 1105 char oidstr[8]; 1106 uint8_t c1; 1107 uint8_t c2; 1108 1109 /* 1110 * Format a card ID string for use by the mmcsd driver, it's what 1111 * appears between the <> in the following: 1112 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 1113 * 22.5MHz/4bit/128-block 1114 * 1115 * Also format just the card serial number, which the mmcsd driver will 1116 * use as the disk->d_ident string. 1117 * 1118 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1119 * and our max formatted length is currently 55 bytes if every field 1120 * contains the largest value. 1121 * 1122 * Sometimes the oid is two printable ascii chars; when it's not, 1123 * format it as 0xnnnn instead. 1124 */ 1125 c1 = (ivar->cid.oid >> 8) & 0x0ff; 1126 c2 = ivar->cid.oid & 0x0ff; 1127 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1128 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1129 else 1130 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1131 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1132 "%08X", ivar->cid.psn); 1133 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1134 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1135 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1136 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1137 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1138 ivar->cid.mid, oidstr); 1139 } 1140 1141 static const int exp[8] = { 1142 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1143 }; 1144 1145 static const int mant[16] = { 1146 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1147 }; 1148 1149 static const int cur_min[8] = { 1150 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1151 }; 1152 1153 static const int cur_max[8] = { 1154 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1155 }; 1156 1157 static int 1158 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1159 { 1160 int v; 1161 int m; 1162 int e; 1163 1164 memset(csd, 0, sizeof(*csd)); 1165 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1166 if (v == 0) { 1167 m = mmc_get_bits(raw_csd, 128, 115, 4); 1168 e = mmc_get_bits(raw_csd, 128, 112, 3); 1169 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1170 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1171 m = mmc_get_bits(raw_csd, 128, 99, 4); 1172 e = mmc_get_bits(raw_csd, 128, 96, 3); 1173 csd->tran_speed = exp[e] * 10000 * mant[m]; 1174 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1175 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1176 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1177 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1178 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1179 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1180 csd->vdd_r_curr_min = 1181 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1182 csd->vdd_r_curr_max = 1183 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1184 csd->vdd_w_curr_min = 1185 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1186 csd->vdd_w_curr_max = 1187 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1188 m = mmc_get_bits(raw_csd, 128, 62, 12); 1189 e = mmc_get_bits(raw_csd, 128, 47, 3); 1190 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1191 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1192 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1193 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1194 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1195 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1196 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1197 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1198 return (MMC_ERR_NONE); 1199 } else if (v == 1) { 1200 m = mmc_get_bits(raw_csd, 128, 115, 4); 1201 e = mmc_get_bits(raw_csd, 128, 112, 3); 1202 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1203 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1204 m = mmc_get_bits(raw_csd, 128, 99, 4); 1205 e = mmc_get_bits(raw_csd, 128, 96, 3); 1206 csd->tran_speed = exp[e] * 10000 * mant[m]; 1207 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1208 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1209 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1210 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1211 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1212 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1213 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1214 1) * 512 * 1024; 1215 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1216 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1217 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1218 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1219 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1220 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1221 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1222 return (MMC_ERR_NONE); 1223 } 1224 return (MMC_ERR_INVALID); 1225 } 1226 1227 static void 1228 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1229 { 1230 int m; 1231 int e; 1232 1233 memset(csd, 0, sizeof(*csd)); 1234 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1235 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1236 m = mmc_get_bits(raw_csd, 128, 115, 4); 1237 e = mmc_get_bits(raw_csd, 128, 112, 3); 1238 csd->tacc = exp[e] * mant[m] + 9 / 10; 1239 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1240 m = mmc_get_bits(raw_csd, 128, 99, 4); 1241 e = mmc_get_bits(raw_csd, 128, 96, 3); 1242 csd->tran_speed = exp[e] * 10000 * mant[m]; 1243 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1244 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1245 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1246 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1247 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1248 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1249 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1250 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1251 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1252 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1253 m = mmc_get_bits(raw_csd, 128, 62, 12); 1254 e = mmc_get_bits(raw_csd, 128, 47, 3); 1255 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1256 csd->erase_blk_en = 0; 1257 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1258 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1259 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1260 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1261 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1262 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1263 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1264 } 1265 1266 static void 1267 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1268 { 1269 unsigned int scr_struct; 1270 1271 memset(scr, 0, sizeof(*scr)); 1272 1273 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1274 if (scr_struct != 0) { 1275 printf("Unrecognised SCR structure version %d\n", 1276 scr_struct); 1277 return; 1278 } 1279 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1280 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1281 } 1282 1283 static void 1284 mmc_app_decode_sd_status(uint32_t *raw_sd_status, 1285 struct mmc_sd_status *sd_status) 1286 { 1287 1288 memset(sd_status, 0, sizeof(*sd_status)); 1289 1290 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1291 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1292 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1293 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1294 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1295 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1296 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1297 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1298 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1299 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1300 } 1301 1302 static int 1303 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1304 { 1305 struct mmc_command cmd; 1306 int err; 1307 1308 memset(&cmd, 0, sizeof(cmd)); 1309 cmd.opcode = MMC_ALL_SEND_CID; 1310 cmd.arg = 0; 1311 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1312 cmd.data = NULL; 1313 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1314 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1315 return (err); 1316 } 1317 1318 static int 1319 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1320 { 1321 struct mmc_command cmd; 1322 int err; 1323 1324 memset(&cmd, 0, sizeof(cmd)); 1325 cmd.opcode = MMC_SEND_CSD; 1326 cmd.arg = rca << 16; 1327 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1328 cmd.data = NULL; 1329 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1330 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1331 return (err); 1332 } 1333 1334 static int 1335 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1336 { 1337 int err; 1338 struct mmc_command cmd; 1339 struct mmc_data data; 1340 1341 memset(&cmd, 0, sizeof(cmd)); 1342 memset(&data, 0, sizeof(data)); 1343 1344 memset(rawscr, 0, 8); 1345 cmd.opcode = ACMD_SEND_SCR; 1346 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1347 cmd.arg = 0; 1348 cmd.data = &data; 1349 1350 data.data = rawscr; 1351 data.len = 8; 1352 data.flags = MMC_DATA_READ; 1353 1354 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1355 rawscr[0] = be32toh(rawscr[0]); 1356 rawscr[1] = be32toh(rawscr[1]); 1357 return (err); 1358 } 1359 1360 static int 1361 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1362 { 1363 struct mmc_command cmd; 1364 struct mmc_data data; 1365 int err, i; 1366 1367 memset(&cmd, 0, sizeof(cmd)); 1368 memset(&data, 0, sizeof(data)); 1369 1370 memset(rawsdstatus, 0, 64); 1371 cmd.opcode = ACMD_SD_STATUS; 1372 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1373 cmd.arg = 0; 1374 cmd.data = &data; 1375 1376 data.data = rawsdstatus; 1377 data.len = 64; 1378 data.flags = MMC_DATA_READ; 1379 1380 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1381 for (i = 0; i < 16; i++) 1382 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1383 return (err); 1384 } 1385 1386 static int 1387 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1388 { 1389 struct mmc_command cmd; 1390 int err; 1391 1392 memset(&cmd, 0, sizeof(cmd)); 1393 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1394 cmd.arg = resp << 16; 1395 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1396 cmd.data = NULL; 1397 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1398 return (err); 1399 } 1400 1401 static int 1402 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1403 { 1404 struct mmc_command cmd; 1405 int err; 1406 1407 memset(&cmd, 0, sizeof(cmd)); 1408 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1409 cmd.arg = 0; 1410 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1411 cmd.data = NULL; 1412 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1413 *resp = cmd.resp[0]; 1414 return (err); 1415 } 1416 1417 static int 1418 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1419 { 1420 struct mmc_command cmd; 1421 int err; 1422 1423 memset(&cmd, 0, sizeof(cmd)); 1424 cmd.opcode = MMC_SET_BLOCKLEN; 1425 cmd.arg = len; 1426 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1427 cmd.data = NULL; 1428 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1429 return (err); 1430 } 1431 1432 static uint32_t 1433 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1434 { 1435 1436 switch (timing) { 1437 case bus_timing_normal: 1438 return (ivar->tran_speed); 1439 case bus_timing_hs: 1440 return (ivar->hs_tran_speed); 1441 case bus_timing_uhs_sdr12: 1442 return (SD_SDR12_MAX); 1443 case bus_timing_uhs_sdr25: 1444 return (SD_SDR25_MAX); 1445 case bus_timing_uhs_ddr50: 1446 return (SD_DDR50_MAX); 1447 case bus_timing_uhs_sdr50: 1448 return (SD_SDR50_MAX); 1449 case bus_timing_uhs_sdr104: 1450 return (SD_SDR104_MAX); 1451 case bus_timing_mmc_ddr52: 1452 return (MMC_TYPE_DDR52_MAX); 1453 case bus_timing_mmc_hs200: 1454 case bus_timing_mmc_hs400: 1455 case bus_timing_mmc_hs400es: 1456 return (MMC_TYPE_HS200_HS400ES_MAX); 1457 } 1458 return (0); 1459 } 1460 1461 static const char * 1462 mmc_timing_to_string(enum mmc_bus_timing timing) 1463 { 1464 1465 switch (timing) { 1466 case bus_timing_normal: 1467 return ("normal speed"); 1468 case bus_timing_hs: 1469 return ("high speed"); 1470 case bus_timing_uhs_sdr12: 1471 case bus_timing_uhs_sdr25: 1472 case bus_timing_uhs_sdr50: 1473 case bus_timing_uhs_sdr104: 1474 return ("single data rate"); 1475 case bus_timing_uhs_ddr50: 1476 case bus_timing_mmc_ddr52: 1477 return ("dual data rate"); 1478 case bus_timing_mmc_hs200: 1479 return ("HS200"); 1480 case bus_timing_mmc_hs400: 1481 return ("HS400"); 1482 case bus_timing_mmc_hs400es: 1483 return ("HS400 with enhanced strobe"); 1484 } 1485 return (""); 1486 } 1487 1488 static bool 1489 mmc_host_timing(device_t dev, enum mmc_bus_timing timing) 1490 { 1491 int host_caps; 1492 1493 host_caps = mmcbr_get_caps(dev); 1494 1495 #define HOST_TIMING_CAP(host_caps, cap) ({ \ 1496 bool retval; \ 1497 if (((host_caps) & (cap)) == (cap)) \ 1498 retval = true; \ 1499 else \ 1500 retval = false; \ 1501 retval; \ 1502 }) 1503 1504 switch (timing) { 1505 case bus_timing_normal: 1506 return (true); 1507 case bus_timing_hs: 1508 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED)); 1509 case bus_timing_uhs_sdr12: 1510 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12)); 1511 case bus_timing_uhs_sdr25: 1512 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25)); 1513 case bus_timing_uhs_ddr50: 1514 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50)); 1515 case bus_timing_uhs_sdr50: 1516 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50)); 1517 case bus_timing_uhs_sdr104: 1518 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104)); 1519 case bus_timing_mmc_ddr52: 1520 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52)); 1521 case bus_timing_mmc_hs200: 1522 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200)); 1523 case bus_timing_mmc_hs400: 1524 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400)); 1525 case bus_timing_mmc_hs400es: 1526 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 | 1527 MMC_CAP_MMC_ENH_STROBE)); 1528 } 1529 1530 #undef HOST_TIMING_CAP 1531 1532 return (false); 1533 } 1534 1535 static void 1536 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1537 { 1538 enum mmc_bus_timing max_timing, timing; 1539 1540 device_printf(dev, "Card at relative address 0x%04x%s:\n", 1541 ivar->rca, newcard ? " added" : ""); 1542 device_printf(dev, " card: %s\n", ivar->card_id_string); 1543 max_timing = bus_timing_normal; 1544 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1545 if (isset(&ivar->timings, timing)) { 1546 max_timing = timing; 1547 break; 1548 } 1549 } 1550 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1551 (ivar->bus_width == bus_width_1 ? 1 : 1552 (ivar->bus_width == bus_width_4 ? 4 : 8)), 1553 mmc_timing_to_dtr(ivar, timing) / 1000000, 1554 mmc_timing_to_string(timing)); 1555 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1556 ivar->sec_count, ivar->erase_sector, 1557 ivar->read_only ? ", read-only" : ""); 1558 } 1559 1560 static void 1561 mmc_discover_cards(struct mmc_softc *sc) 1562 { 1563 u_char switch_res[64]; 1564 uint32_t raw_cid[4]; 1565 struct mmc_ivars *ivar = NULL; 1566 device_t child; 1567 int err, host_caps, i, newcard; 1568 uint32_t resp, sec_count, status; 1569 uint16_t rca = 2; 1570 1571 host_caps = mmcbr_get_caps(sc->dev); 1572 if (bootverbose || mmc_debug) 1573 device_printf(sc->dev, "Probing cards\n"); 1574 while (1) { 1575 child = NULL; 1576 sc->squelched++; /* Errors are expected, squelch reporting. */ 1577 err = mmc_all_send_cid(sc, raw_cid); 1578 sc->squelched--; 1579 if (err == MMC_ERR_TIMEOUT) 1580 break; 1581 if (err != MMC_ERR_NONE) { 1582 device_printf(sc->dev, "Error reading CID %d\n", err); 1583 break; 1584 } 1585 newcard = 1; 1586 for (i = 0; i < sc->child_count; i++) { 1587 ivar = device_get_ivars(sc->child_list[i]); 1588 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 1589 0) { 1590 newcard = 0; 1591 break; 1592 } 1593 } 1594 if (bootverbose || mmc_debug) { 1595 device_printf(sc->dev, 1596 "%sard detected (CID %08x%08x%08x%08x)\n", 1597 newcard ? "New c" : "C", 1598 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1599 } 1600 if (newcard) { 1601 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1602 M_WAITOK | M_ZERO); 1603 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1604 } 1605 if (mmcbr_get_ro(sc->dev)) 1606 ivar->read_only = 1; 1607 ivar->bus_width = bus_width_1; 1608 setbit(&ivar->timings, bus_timing_normal); 1609 ivar->mode = mmcbr_get_mode(sc->dev); 1610 if (ivar->mode == mode_sd) { 1611 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1612 err = mmc_send_relative_addr(sc, &resp); 1613 if (err != MMC_ERR_NONE) { 1614 device_printf(sc->dev, 1615 "Error getting RCA %d\n", err); 1616 goto free_ivar; 1617 } 1618 ivar->rca = resp >> 16; 1619 /* Get card CSD. */ 1620 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1621 if (err != MMC_ERR_NONE) { 1622 device_printf(sc->dev, 1623 "Error getting CSD %d\n", err); 1624 goto free_ivar; 1625 } 1626 if (bootverbose || mmc_debug) 1627 device_printf(sc->dev, 1628 "%sard detected (CSD %08x%08x%08x%08x)\n", 1629 newcard ? "New c" : "C", ivar->raw_csd[0], 1630 ivar->raw_csd[1], ivar->raw_csd[2], 1631 ivar->raw_csd[3]); 1632 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1633 if (err != MMC_ERR_NONE) { 1634 device_printf(sc->dev, "Error decoding CSD\n"); 1635 goto free_ivar; 1636 } 1637 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1638 if (ivar->csd.csd_structure > 0) 1639 ivar->high_cap = 1; 1640 ivar->tran_speed = ivar->csd.tran_speed; 1641 ivar->erase_sector = ivar->csd.erase_sector * 1642 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1643 1644 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1645 &status); 1646 if (err != MMC_ERR_NONE) { 1647 device_printf(sc->dev, 1648 "Error reading card status %d\n", err); 1649 goto free_ivar; 1650 } 1651 if ((status & R1_CARD_IS_LOCKED) != 0) { 1652 device_printf(sc->dev, 1653 "Card is password protected, skipping\n"); 1654 goto free_ivar; 1655 } 1656 1657 /* Get card SCR. Card must be selected to fetch it. */ 1658 err = mmc_select_card(sc, ivar->rca); 1659 if (err != MMC_ERR_NONE) { 1660 device_printf(sc->dev, 1661 "Error selecting card %d\n", err); 1662 goto free_ivar; 1663 } 1664 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1665 if (err != MMC_ERR_NONE) { 1666 device_printf(sc->dev, 1667 "Error reading SCR %d\n", err); 1668 goto free_ivar; 1669 } 1670 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1671 /* Get card switch capabilities (command class 10). */ 1672 if ((ivar->scr.sda_vsn >= 1) && 1673 (ivar->csd.ccc & (1 << 10))) { 1674 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1675 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1676 switch_res); 1677 if (err == MMC_ERR_NONE && 1678 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1679 setbit(&ivar->timings, bus_timing_hs); 1680 ivar->hs_tran_speed = SD_HS_MAX; 1681 } 1682 } 1683 1684 /* 1685 * We deselect then reselect the card here. Some cards 1686 * become unselected and timeout with the above two 1687 * commands, although the state tables / diagrams in the 1688 * standard suggest they go back to the transfer state. 1689 * Other cards don't become deselected, and if we 1690 * attempt to blindly re-select them, we get timeout 1691 * errors from some controllers. So we deselect then 1692 * reselect to handle all situations. The only thing we 1693 * use from the sd_status is the erase sector size, but 1694 * it is still nice to get that right. 1695 */ 1696 (void)mmc_select_card(sc, 0); 1697 (void)mmc_select_card(sc, ivar->rca); 1698 (void)mmc_app_sd_status(sc, ivar->rca, 1699 ivar->raw_sd_status); 1700 mmc_app_decode_sd_status(ivar->raw_sd_status, 1701 &ivar->sd_status); 1702 if (ivar->sd_status.au_size != 0) { 1703 ivar->erase_sector = 1704 16 << ivar->sd_status.au_size; 1705 } 1706 /* Find maximum supported bus width. */ 1707 if ((host_caps & MMC_CAP_4_BIT_DATA) && 1708 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1709 ivar->bus_width = bus_width_4; 1710 1711 goto child_common; 1712 } 1713 ivar->rca = rca++; 1714 err = mmc_set_relative_addr(sc, ivar->rca); 1715 if (err != MMC_ERR_NONE) { 1716 device_printf(sc->dev, "Error setting RCA %d\n", err); 1717 goto free_ivar; 1718 } 1719 /* Get card CSD. */ 1720 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1721 if (err != MMC_ERR_NONE) { 1722 device_printf(sc->dev, "Error getting CSD %d\n", err); 1723 goto free_ivar; 1724 } 1725 if (bootverbose || mmc_debug) 1726 device_printf(sc->dev, 1727 "%sard detected (CSD %08x%08x%08x%08x)\n", 1728 newcard ? "New c" : "C", ivar->raw_csd[0], 1729 ivar->raw_csd[1], ivar->raw_csd[2], 1730 ivar->raw_csd[3]); 1731 1732 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1733 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1734 ivar->tran_speed = ivar->csd.tran_speed; 1735 ivar->erase_sector = ivar->csd.erase_sector * 1736 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1737 1738 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1739 if (err != MMC_ERR_NONE) { 1740 device_printf(sc->dev, 1741 "Error reading card status %d\n", err); 1742 goto free_ivar; 1743 } 1744 if ((status & R1_CARD_IS_LOCKED) != 0) { 1745 device_printf(sc->dev, 1746 "Card is password protected, skipping\n"); 1747 goto free_ivar; 1748 } 1749 1750 err = mmc_select_card(sc, ivar->rca); 1751 if (err != MMC_ERR_NONE) { 1752 device_printf(sc->dev, "Error selecting card %d\n", 1753 err); 1754 goto free_ivar; 1755 } 1756 1757 /* Only MMC >= 4.x devices support EXT_CSD. */ 1758 if (ivar->csd.spec_vers >= 4) { 1759 err = mmc_send_ext_csd(sc->dev, sc->dev, 1760 ivar->raw_ext_csd); 1761 if (err != MMC_ERR_NONE) { 1762 device_printf(sc->dev, 1763 "Error reading EXT_CSD %d\n", err); 1764 goto free_ivar; 1765 } 1766 /* Handle extended capacity from EXT_CSD */ 1767 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] + 1768 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1769 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1770 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1771 if (sec_count != 0) { 1772 ivar->sec_count = sec_count; 1773 ivar->high_cap = 1; 1774 } 1775 /* Find maximum supported bus width. */ 1776 ivar->bus_width = mmc_test_bus_width(sc); 1777 /* Get device speeds beyond normal mode. */ 1778 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1779 EXT_CSD_CARD_TYPE_HS_52) != 0) { 1780 setbit(&ivar->timings, bus_timing_hs); 1781 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1782 } else if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1783 EXT_CSD_CARD_TYPE_HS_26) != 0) { 1784 setbit(&ivar->timings, bus_timing_hs); 1785 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1786 } 1787 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1788 EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1789 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1790 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1791 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1792 } 1793 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1794 EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1795 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1796 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1797 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1798 } 1799 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1800 EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1801 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1802 setbit(&ivar->timings, bus_timing_mmc_hs200); 1803 setbit(&ivar->vccq_120, bus_timing_mmc_hs200); 1804 } 1805 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1806 EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1807 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1808 setbit(&ivar->timings, bus_timing_mmc_hs200); 1809 setbit(&ivar->vccq_180, bus_timing_mmc_hs200); 1810 } 1811 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1812 EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1813 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1814 ivar->bus_width == bus_width_8) { 1815 setbit(&ivar->timings, bus_timing_mmc_hs400); 1816 setbit(&ivar->vccq_120, bus_timing_mmc_hs400); 1817 } 1818 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1819 EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1820 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1821 ivar->bus_width == bus_width_8) { 1822 setbit(&ivar->timings, bus_timing_mmc_hs400); 1823 setbit(&ivar->vccq_180, bus_timing_mmc_hs400); 1824 } 1825 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1826 EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1827 (ivar->raw_ext_csd[EXT_CSD_STROBE_SUPPORT] & 1828 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1829 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1830 ivar->bus_width == bus_width_8) { 1831 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1832 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es); 1833 } 1834 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1835 EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1836 (ivar->raw_ext_csd[EXT_CSD_STROBE_SUPPORT] & 1837 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1838 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1839 ivar->bus_width == bus_width_8) { 1840 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1841 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es); 1842 } 1843 /* 1844 * Determine generic switch timeout (provided in 1845 * units of 10 ms), defaulting to 500 ms. 1846 */ 1847 ivar->cmd6_time = 500 * 1000; 1848 if (ivar->csd.spec_vers >= 6) 1849 ivar->cmd6_time = 10 * 1850 ivar->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1851 /* Handle HC erase sector size. */ 1852 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1853 ivar->erase_sector = 1024 * 1854 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1855 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1856 EXT_CSD_CMD_SET_NORMAL, 1857 EXT_CSD_ERASE_GRP_DEF, 1858 EXT_CSD_ERASE_GRP_DEF_EN, 1859 ivar->cmd6_time, true); 1860 if (err != MMC_ERR_NONE) { 1861 device_printf(sc->dev, 1862 "Error setting erase group %d\n", 1863 err); 1864 goto free_ivar; 1865 } 1866 } 1867 } 1868 1869 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, 1870 ivar->raw_ext_csd[EXT_CSD_REV] >= 5); 1871 1872 child_common: 1873 /* 1874 * Some cards that report maximum I/O block sizes greater 1875 * than 512 require the block length to be set to 512, even 1876 * though that is supposed to be the default. Example: 1877 * 1878 * Transcend 2GB SDSC card, CID: 1879 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1880 */ 1881 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1882 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1883 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1884 1885 mmc_format_card_id_string(ivar); 1886 1887 if (bootverbose || mmc_debug) 1888 mmc_log_card(sc->dev, ivar, newcard); 1889 if (newcard) { 1890 /* Add device. */ 1891 child = device_add_child(sc->dev, NULL, -1); 1892 if (child != NULL) { 1893 device_set_ivars(child, ivar); 1894 sc->child_list = realloc(sc->child_list, 1895 sizeof(device_t *) * sc->child_count + 1, 1896 M_DEVBUF, M_WAITOK); 1897 sc->child_list[sc->child_count++] = child; 1898 } else 1899 device_printf(sc->dev, "Error adding child\n"); 1900 } 1901 1902 free_ivar: 1903 if (newcard && child == NULL) 1904 free(ivar, M_DEVBUF); 1905 (void)mmc_select_card(sc, 0); 1906 /* 1907 * Not returning here when one MMC device could no be added 1908 * potentially would mean looping forever when that device 1909 * is broken (in which case it also may impact the remainder 1910 * of the bus anyway, though). 1911 */ 1912 if ((newcard && child == NULL) || 1913 mmcbr_get_mode(sc->dev) == mode_sd) 1914 return; 1915 } 1916 } 1917 1918 static void 1919 mmc_update_child_list(struct mmc_softc *sc) 1920 { 1921 device_t child; 1922 int i, j; 1923 1924 if (sc->child_count == 0) { 1925 free(sc->child_list, M_DEVBUF); 1926 return; 1927 } 1928 for (i = j = 0; i < sc->child_count; i++) { 1929 for (;;) { 1930 child = sc->child_list[j++]; 1931 if (child != NULL) 1932 break; 1933 } 1934 if (i != j) 1935 sc->child_list[i] = child; 1936 } 1937 sc->child_list = realloc(sc->child_list, sizeof(device_t *) * 1938 sc->child_count, M_DEVBUF, M_WAITOK); 1939 } 1940 1941 static void 1942 mmc_rescan_cards(struct mmc_softc *sc) 1943 { 1944 struct mmc_ivars *ivar; 1945 int err, i, j; 1946 1947 for (i = j = 0; i < sc->child_count; i++) { 1948 ivar = device_get_ivars(sc->child_list[i]); 1949 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1950 if (bootverbose || mmc_debug) 1951 device_printf(sc->dev, 1952 "Card at relative address %d lost\n", 1953 ivar->rca); 1954 err = device_delete_child(sc->dev, sc->child_list[i]); 1955 if (err != 0) { 1956 j++; 1957 continue; 1958 } 1959 free(ivar, M_DEVBUF); 1960 } else 1961 j++; 1962 } 1963 if (sc->child_count == j) 1964 goto out; 1965 sc->child_count = j; 1966 mmc_update_child_list(sc); 1967 out: 1968 (void)mmc_select_card(sc, 0); 1969 } 1970 1971 static int 1972 mmc_delete_cards(struct mmc_softc *sc, bool final) 1973 { 1974 struct mmc_ivars *ivar; 1975 int err, i, j; 1976 1977 err = 0; 1978 for (i = j = 0; i < sc->child_count; i++) { 1979 ivar = device_get_ivars(sc->child_list[i]); 1980 if (bootverbose || mmc_debug) 1981 device_printf(sc->dev, 1982 "Card at relative address %d deleted\n", 1983 ivar->rca); 1984 err = device_delete_child(sc->dev, sc->child_list[i]); 1985 if (err != 0) { 1986 j++; 1987 if (final == false) 1988 continue; 1989 else 1990 break; 1991 } 1992 free(ivar, M_DEVBUF); 1993 } 1994 sc->child_count = j; 1995 mmc_update_child_list(sc); 1996 return (err); 1997 } 1998 1999 static void 2000 mmc_go_discovery(struct mmc_softc *sc) 2001 { 2002 uint32_t ocr; 2003 device_t dev; 2004 int err; 2005 2006 dev = sc->dev; 2007 if (mmcbr_get_power_mode(dev) != power_on) { 2008 /* 2009 * First, try SD modes 2010 */ 2011 sc->squelched++; /* Errors are expected, squelch reporting. */ 2012 mmcbr_set_mode(dev, mode_sd); 2013 mmc_power_up(sc); 2014 mmcbr_set_bus_mode(dev, pushpull); 2015 if (bootverbose || mmc_debug) 2016 device_printf(sc->dev, "Probing bus\n"); 2017 mmc_idle_cards(sc); 2018 err = mmc_send_if_cond(sc, 1); 2019 if ((bootverbose || mmc_debug) && err == 0) 2020 device_printf(sc->dev, 2021 "SD 2.0 interface conditions: OK\n"); 2022 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2023 if (bootverbose || mmc_debug) 2024 device_printf(sc->dev, "SD probe: failed\n"); 2025 /* 2026 * Failed, try MMC 2027 */ 2028 mmcbr_set_mode(dev, mode_mmc); 2029 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2030 if (bootverbose || mmc_debug) 2031 device_printf(sc->dev, 2032 "MMC probe: failed\n"); 2033 ocr = 0; /* Failed both, powerdown. */ 2034 } else if (bootverbose || mmc_debug) 2035 device_printf(sc->dev, 2036 "MMC probe: OK (OCR: 0x%08x)\n", ocr); 2037 } else if (bootverbose || mmc_debug) 2038 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", 2039 ocr); 2040 sc->squelched--; 2041 2042 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 2043 if (mmcbr_get_ocr(dev) != 0) 2044 mmc_idle_cards(sc); 2045 } else { 2046 mmcbr_set_bus_mode(dev, opendrain); 2047 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 2048 mmcbr_update_ios(dev); 2049 /* XXX recompute vdd based on new cards? */ 2050 } 2051 /* 2052 * Make sure that we have a mutually agreeable voltage to at least 2053 * one card on the bus. 2054 */ 2055 if (bootverbose || mmc_debug) 2056 device_printf(sc->dev, "Current OCR: 0x%08x\n", 2057 mmcbr_get_ocr(dev)); 2058 if (mmcbr_get_ocr(dev) == 0) { 2059 device_printf(sc->dev, "No compatible cards found on bus\n"); 2060 (void)mmc_delete_cards(sc, false); 2061 mmc_power_down(sc); 2062 return; 2063 } 2064 /* 2065 * Reselect the cards after we've idled them above. 2066 */ 2067 if (mmcbr_get_mode(dev) == mode_sd) { 2068 err = mmc_send_if_cond(sc, 1); 2069 mmc_send_app_op_cond(sc, 2070 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 2071 } else 2072 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 2073 mmc_discover_cards(sc); 2074 mmc_rescan_cards(sc); 2075 2076 mmcbr_set_bus_mode(dev, pushpull); 2077 mmcbr_update_ios(dev); 2078 mmc_calculate_clock(sc); 2079 } 2080 2081 static int 2082 mmc_calculate_clock(struct mmc_softc *sc) 2083 { 2084 device_t dev; 2085 struct mmc_ivars *ivar; 2086 int i; 2087 uint32_t dtr, max_dtr; 2088 uint16_t rca; 2089 enum mmc_bus_timing max_timing, timing; 2090 bool changed, hs400; 2091 2092 dev = sc->dev; 2093 max_dtr = mmcbr_get_f_max(dev); 2094 max_timing = bus_timing_max; 2095 do { 2096 changed = false; 2097 for (i = 0; i < sc->child_count; i++) { 2098 ivar = device_get_ivars(sc->child_list[i]); 2099 if (isclr(&ivar->timings, max_timing) || 2100 !mmc_host_timing(dev, max_timing)) { 2101 for (timing = max_timing - 1; timing >= 2102 bus_timing_normal; timing--) { 2103 if (isset(&ivar->timings, timing) && 2104 mmc_host_timing(dev, timing)) { 2105 max_timing = timing; 2106 break; 2107 } 2108 } 2109 changed = true; 2110 } 2111 dtr = mmc_timing_to_dtr(ivar, max_timing); 2112 if (dtr < max_dtr) { 2113 max_dtr = dtr; 2114 changed = true; 2115 } 2116 } 2117 } while (changed == true); 2118 2119 if (bootverbose || mmc_debug) { 2120 device_printf(dev, 2121 "setting transfer rate to %d.%03dMHz (%s timing)\n", 2122 max_dtr / 1000000, (max_dtr / 1000) % 1000, 2123 mmc_timing_to_string(max_timing)); 2124 } 2125 2126 /* 2127 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin 2128 * with HS200 following the sequence as described in "6.6.2.2 HS200 2129 * timing mode selection" of the eMMC specification v5.1, too, and 2130 * switch to max_timing later. HS400ES requires no tuning and, thus, 2131 * can be switch to directly, but requires the same detour via high 2132 * speed mode as does HS400 (see mmc_switch_to_hs400()). 2133 */ 2134 hs400 = max_timing == bus_timing_mmc_hs400; 2135 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing; 2136 for (i = 0; i < sc->child_count; i++) { 2137 ivar = device_get_ivars(sc->child_list[i]); 2138 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 2139 continue; 2140 2141 rca = ivar->rca; 2142 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 2143 device_printf(dev, "Card at relative address %d " 2144 "failed to select\n", rca); 2145 continue; 2146 } 2147 2148 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */ 2149 timing == bus_timing_mmc_hs400es) { 2150 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2151 device_printf(dev, "Failed to set VCCQ for " 2152 "card at relative address %d\n", rca); 2153 continue; 2154 } 2155 } 2156 2157 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */ 2158 /* Set bus width (required for initial tuning). */ 2159 if (mmc_set_card_bus_width(sc, ivar, timing) != 2160 MMC_ERR_NONE) { 2161 device_printf(dev, "Card at relative address " 2162 "%d failed to set bus width\n", rca); 2163 continue; 2164 } 2165 mmcbr_set_bus_width(dev, ivar->bus_width); 2166 mmcbr_update_ios(dev); 2167 } else if (timing == bus_timing_mmc_hs400es) { 2168 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) != 2169 MMC_ERR_NONE) { 2170 device_printf(dev, "Card at relative address " 2171 "%d failed to set %s timing\n", rca, 2172 mmc_timing_to_string(timing)); 2173 continue; 2174 } 2175 goto power_class; 2176 } 2177 2178 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) { 2179 device_printf(dev, "Card at relative address %d " 2180 "failed to set %s timing\n", rca, 2181 mmc_timing_to_string(timing)); 2182 continue; 2183 } 2184 2185 if (timing == bus_timing_mmc_ddr52) { 2186 /* 2187 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH 2188 * (must be done after switching to EXT_CSD_HS_TIMING). 2189 */ 2190 if (mmc_set_card_bus_width(sc, ivar, timing) != 2191 MMC_ERR_NONE) { 2192 device_printf(dev, "Card at relative address " 2193 "%d failed to set bus width\n", rca); 2194 continue; 2195 } 2196 mmcbr_set_bus_width(dev, ivar->bus_width); 2197 mmcbr_update_ios(dev); 2198 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2199 device_printf(dev, "Failed to set VCCQ for " 2200 "card at relative address %d\n", rca); 2201 continue; 2202 } 2203 } 2204 2205 /* Set clock (must be done before initial tuning). */ 2206 mmcbr_set_clock(dev, max_dtr); 2207 mmcbr_update_ios(dev); 2208 2209 if (mmcbr_tune(dev, hs400) != 0) { 2210 device_printf(dev, "Card at relative address %d " 2211 "failed to execute initial tuning\n", rca); 2212 continue; 2213 } 2214 2215 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr, 2216 max_timing) != MMC_ERR_NONE) { 2217 device_printf(dev, "Card at relative address %d " 2218 "failed to set %s timing\n", rca, 2219 mmc_timing_to_string(max_timing)); 2220 continue; 2221 } 2222 2223 power_class: 2224 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 2225 device_printf(dev, "Card at relative address %d " 2226 "failed to set power class\n", rca); 2227 } 2228 } 2229 (void)mmc_select_card(sc, 0); 2230 return (max_dtr); 2231 } 2232 2233 /* 2234 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly 2235 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing 2236 * mode selection" of the eMMC specification v5.1. 2237 */ 2238 static int 2239 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 2240 uint32_t clock, enum mmc_bus_timing max_timing) 2241 { 2242 device_t dev; 2243 int err; 2244 uint16_t rca; 2245 2246 dev = sc->dev; 2247 rca = ivar->rca; 2248 2249 /* 2250 * Both clock and timing must be set as appropriate for high speed 2251 * before eventually switching to HS400/HS400ES; mmc_set_timing() 2252 * will issue mmcbr_update_ios(). 2253 */ 2254 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2255 err = mmc_set_timing(sc, ivar, bus_timing_hs); 2256 if (err != MMC_ERR_NONE) 2257 return (err); 2258 2259 /* 2260 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally 2261 * EXT_CSD_BUS_WIDTH_ES for HS400ES). 2262 */ 2263 err = mmc_set_card_bus_width(sc, ivar, max_timing); 2264 if (err != MMC_ERR_NONE) 2265 return (err); 2266 mmcbr_set_bus_width(dev, ivar->bus_width); 2267 mmcbr_update_ios(dev); 2268 2269 /* Finally, switch to HS400/HS400ES mode. */ 2270 err = mmc_set_timing(sc, ivar, max_timing); 2271 if (err != MMC_ERR_NONE) 2272 return (err); 2273 mmcbr_set_clock(dev, clock); 2274 mmcbr_update_ios(dev); 2275 return (MMC_ERR_NONE); 2276 } 2277 2278 /* 2279 * Switch from HS400 to HS200 (for re-tuning). 2280 */ 2281 static int 2282 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 2283 uint32_t clock) 2284 { 2285 device_t dev; 2286 int err; 2287 uint16_t rca; 2288 2289 dev = sc->dev; 2290 rca = ivar->rca; 2291 2292 /* 2293 * Both clock and timing must initially be set as appropriate for 2294 * DDR52 before eventually switching to HS200; mmc_set_timing() 2295 * will issue mmcbr_update_ios(). 2296 */ 2297 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2298 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52); 2299 if (err != MMC_ERR_NONE) 2300 return (err); 2301 2302 /* 2303 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR 2304 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios. 2305 */ 2306 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs); 2307 if (err != MMC_ERR_NONE) 2308 return (err); 2309 mmcbr_set_bus_width(dev, ivar->bus_width); 2310 mmcbr_set_timing(sc->dev, bus_timing_hs); 2311 mmcbr_update_ios(dev); 2312 2313 /* Finally, switch to HS200 mode. */ 2314 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200); 2315 if (err != MMC_ERR_NONE) 2316 return (err); 2317 mmcbr_set_clock(dev, clock); 2318 mmcbr_update_ios(dev); 2319 return (MMC_ERR_NONE); 2320 } 2321 2322 static int 2323 mmc_retune(device_t busdev, device_t dev, bool reset) 2324 { 2325 struct mmc_softc *sc; 2326 struct mmc_ivars *ivar; 2327 int err; 2328 uint32_t clock; 2329 enum mmc_bus_timing timing; 2330 2331 if (device_get_parent(dev) != busdev) 2332 return (MMC_ERR_INVALID); 2333 2334 sc = device_get_softc(busdev); 2335 if (sc->retune_needed != 1 && sc->retune_paused != 0) 2336 return (MMC_ERR_INVALID); 2337 2338 timing = mmcbr_get_timing(busdev); 2339 if (timing == bus_timing_mmc_hs400) { 2340 /* 2341 * Controllers use the data strobe line to latch data from 2342 * the devices in HS400 mode so periodic re-tuning isn't 2343 * expected to be required, i. e. only if a CRC or tuning 2344 * error is signaled to the bridge. In these latter cases 2345 * we are asked to reset the tuning circuit and need to do 2346 * the switch timing dance. 2347 */ 2348 if (reset == false) 2349 return (0); 2350 ivar = device_get_ivars(dev); 2351 clock = mmcbr_get_clock(busdev); 2352 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE) 2353 return (MMC_ERR_BADCRC); 2354 } 2355 err = mmcbr_retune(busdev, reset); 2356 if (err != 0 && timing == bus_timing_mmc_hs400) 2357 return (MMC_ERR_BADCRC); 2358 switch (err) { 2359 case 0: 2360 break; 2361 case EIO: 2362 return (MMC_ERR_FAILED); 2363 default: 2364 return (MMC_ERR_INVALID); 2365 } 2366 if (timing == bus_timing_mmc_hs400) { 2367 if (mmc_switch_to_hs400(sc, ivar, clock, timing) != 2368 MMC_ERR_NONE) 2369 return (MMC_ERR_BADCRC); 2370 } 2371 return (MMC_ERR_NONE); 2372 } 2373 2374 static void 2375 mmc_retune_pause(device_t busdev, device_t dev, bool retune) 2376 { 2377 struct mmc_softc *sc; 2378 2379 sc = device_get_softc(busdev); 2380 KASSERT(device_get_parent(dev) == busdev, 2381 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2382 device_get_nameunit(busdev))); 2383 KASSERT(sc->owner != NULL, 2384 ("%s: Request from %s without bus being acquired.", __func__, 2385 device_get_nameunit(dev))); 2386 2387 if (retune == true && sc->retune_paused == 0) 2388 sc->retune_needed = 1; 2389 sc->retune_paused++; 2390 } 2391 2392 static void 2393 mmc_retune_unpause(device_t busdev, device_t dev) 2394 { 2395 struct mmc_softc *sc; 2396 2397 sc = device_get_softc(busdev); 2398 KASSERT(device_get_parent(dev) == busdev, 2399 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2400 device_get_nameunit(busdev))); 2401 KASSERT(sc->owner != NULL, 2402 ("%s: Request from %s without bus being acquired.", __func__, 2403 device_get_nameunit(dev))); 2404 KASSERT(sc->retune_paused != 0, 2405 ("%s: Re-tune pause count already at 0", __func__)); 2406 2407 sc->retune_paused--; 2408 } 2409 2410 static void 2411 mmc_scan(struct mmc_softc *sc) 2412 { 2413 device_t dev = sc->dev; 2414 int err; 2415 2416 err = mmc_acquire_bus(dev, dev); 2417 if (err != 0) { 2418 device_printf(dev, "Failed to acquire bus for scanning\n"); 2419 return; 2420 } 2421 mmc_go_discovery(sc); 2422 err = mmc_release_bus(dev, dev); 2423 if (err != 0) { 2424 device_printf(dev, "Failed to release bus after scanning\n"); 2425 return; 2426 } 2427 (void)bus_generic_attach(dev); 2428 } 2429 2430 static int 2431 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 2432 { 2433 struct mmc_ivars *ivar = device_get_ivars(child); 2434 2435 switch (which) { 2436 default: 2437 return (EINVAL); 2438 case MMC_IVAR_SPEC_VERS: 2439 *result = ivar->csd.spec_vers; 2440 break; 2441 case MMC_IVAR_DSR_IMP: 2442 *result = ivar->csd.dsr_imp; 2443 break; 2444 case MMC_IVAR_MEDIA_SIZE: 2445 *result = ivar->sec_count; 2446 break; 2447 case MMC_IVAR_RCA: 2448 *result = ivar->rca; 2449 break; 2450 case MMC_IVAR_SECTOR_SIZE: 2451 *result = MMC_SECTOR_SIZE; 2452 break; 2453 case MMC_IVAR_TRAN_SPEED: 2454 *result = mmcbr_get_clock(bus); 2455 break; 2456 case MMC_IVAR_READ_ONLY: 2457 *result = ivar->read_only; 2458 break; 2459 case MMC_IVAR_HIGH_CAP: 2460 *result = ivar->high_cap; 2461 break; 2462 case MMC_IVAR_CARD_TYPE: 2463 *result = ivar->mode; 2464 break; 2465 case MMC_IVAR_BUS_WIDTH: 2466 *result = ivar->bus_width; 2467 break; 2468 case MMC_IVAR_ERASE_SECTOR: 2469 *result = ivar->erase_sector; 2470 break; 2471 case MMC_IVAR_MAX_DATA: 2472 *result = mmcbr_get_max_data(bus); 2473 break; 2474 case MMC_IVAR_CARD_ID_STRING: 2475 *(char **)result = ivar->card_id_string; 2476 break; 2477 case MMC_IVAR_CARD_SN_STRING: 2478 *(char **)result = ivar->card_sn_string; 2479 break; 2480 } 2481 return (0); 2482 } 2483 2484 static int 2485 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 2486 { 2487 2488 /* 2489 * None are writable ATM 2490 */ 2491 return (EINVAL); 2492 } 2493 2494 static void 2495 mmc_delayed_attach(void *xsc) 2496 { 2497 struct mmc_softc *sc = xsc; 2498 2499 mmc_scan(sc); 2500 config_intrhook_disestablish(&sc->config_intrhook); 2501 } 2502 2503 static int 2504 mmc_child_location_str(device_t dev, device_t child, char *buf, 2505 size_t buflen) 2506 { 2507 2508 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child)); 2509 return (0); 2510 } 2511 2512 static device_method_t mmc_methods[] = { 2513 /* device_if */ 2514 DEVMETHOD(device_probe, mmc_probe), 2515 DEVMETHOD(device_attach, mmc_attach), 2516 DEVMETHOD(device_detach, mmc_detach), 2517 DEVMETHOD(device_suspend, mmc_suspend), 2518 DEVMETHOD(device_resume, mmc_resume), 2519 2520 /* Bus interface */ 2521 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2522 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2523 DEVMETHOD(bus_child_location_str, mmc_child_location_str), 2524 2525 /* MMC Bus interface */ 2526 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause), 2527 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause), 2528 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2529 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2530 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2531 2532 DEVMETHOD_END 2533 }; 2534 2535 driver_t mmc_driver = { 2536 "mmc", 2537 mmc_methods, 2538 sizeof(struct mmc_softc), 2539 }; 2540 devclass_t mmc_devclass; 2541 2542 MODULE_VERSION(mmc, MMC_VERSION); 2543