1*fa6ea996SAndrew Turner /*- 2*fa6ea996SAndrew Turner * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3*fa6ea996SAndrew Turner * All rights reserved. 4*fa6ea996SAndrew Turner * 5*fa6ea996SAndrew Turner * This software was developed by SRI International and the University of 6*fa6ea996SAndrew Turner * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7*fa6ea996SAndrew Turner * ("CTSRD"), as part of the DARPA CRASH research programme. 8*fa6ea996SAndrew Turner * 9*fa6ea996SAndrew Turner * Redistribution and use in source and binary forms, with or without 10*fa6ea996SAndrew Turner * modification, are permitted provided that the following conditions 11*fa6ea996SAndrew Turner * are met: 12*fa6ea996SAndrew Turner * 1. Redistributions of source code must retain the above copyright 13*fa6ea996SAndrew Turner * notice, this list of conditions and the following disclaimer. 14*fa6ea996SAndrew Turner * 2. Redistributions in binary form must reproduce the above copyright 15*fa6ea996SAndrew Turner * notice, this list of conditions and the following disclaimer in the 16*fa6ea996SAndrew Turner * documentation and/or other materials provided with the distribution. 17*fa6ea996SAndrew Turner * 18*fa6ea996SAndrew Turner * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19*fa6ea996SAndrew Turner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*fa6ea996SAndrew Turner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*fa6ea996SAndrew Turner * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22*fa6ea996SAndrew Turner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23*fa6ea996SAndrew Turner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24*fa6ea996SAndrew Turner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25*fa6ea996SAndrew Turner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26*fa6ea996SAndrew Turner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27*fa6ea996SAndrew Turner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28*fa6ea996SAndrew Turner * SUCH DAMAGE. 29*fa6ea996SAndrew Turner * 30*fa6ea996SAndrew Turner * $FreeBSD$ 31*fa6ea996SAndrew Turner */ 32*fa6ea996SAndrew Turner 33*fa6ea996SAndrew Turner #ifndef DEV_MMC_HOST_DWMMC_VAR_H 34*fa6ea996SAndrew Turner #define DEV_MMC_HOST_DWMMC_VAR_H 35*fa6ea996SAndrew Turner 36*fa6ea996SAndrew Turner enum { 37*fa6ea996SAndrew Turner HWTYPE_NONE, 38*fa6ea996SAndrew Turner HWTYPE_ALTERA, 39*fa6ea996SAndrew Turner HWTYPE_EXYNOS, 40*fa6ea996SAndrew Turner HWTYPE_HISILICON, 41*fa6ea996SAndrew Turner HWTYPE_ROCKCHIP, 42*fa6ea996SAndrew Turner }; 43*fa6ea996SAndrew Turner 44*fa6ea996SAndrew Turner struct dwmmc_softc { 45*fa6ea996SAndrew Turner struct resource *res[2]; 46*fa6ea996SAndrew Turner device_t dev; 47*fa6ea996SAndrew Turner void *intr_cookie; 48*fa6ea996SAndrew Turner struct mmc_host host; 49*fa6ea996SAndrew Turner struct mtx sc_mtx; 50*fa6ea996SAndrew Turner struct mmc_request *req; 51*fa6ea996SAndrew Turner struct mmc_command *curcmd; 52*fa6ea996SAndrew Turner uint32_t flags; 53*fa6ea996SAndrew Turner uint32_t hwtype; 54*fa6ea996SAndrew Turner uint32_t use_auto_stop; 55*fa6ea996SAndrew Turner uint32_t use_pio; 56*fa6ea996SAndrew Turner uint32_t pwren_inverted; 57*fa6ea996SAndrew Turner u_int desc_count; 58*fa6ea996SAndrew Turner 59*fa6ea996SAndrew Turner bus_dma_tag_t desc_tag; 60*fa6ea996SAndrew Turner bus_dmamap_t desc_map; 61*fa6ea996SAndrew Turner struct idmac_desc *desc_ring; 62*fa6ea996SAndrew Turner bus_addr_t desc_ring_paddr; 63*fa6ea996SAndrew Turner bus_dma_tag_t buf_tag; 64*fa6ea996SAndrew Turner bus_dmamap_t buf_map; 65*fa6ea996SAndrew Turner 66*fa6ea996SAndrew Turner uint32_t bus_busy; 67*fa6ea996SAndrew Turner uint32_t dto_rcvd; 68*fa6ea996SAndrew Turner uint32_t acd_rcvd; 69*fa6ea996SAndrew Turner uint32_t cmd_done; 70*fa6ea996SAndrew Turner uint32_t bus_hz; 71*fa6ea996SAndrew Turner uint32_t fifo_depth; 72*fa6ea996SAndrew Turner uint32_t num_slots; 73*fa6ea996SAndrew Turner uint32_t sdr_timing; 74*fa6ea996SAndrew Turner uint32_t ddr_timing; 75*fa6ea996SAndrew Turner }; 76*fa6ea996SAndrew Turner 77*fa6ea996SAndrew Turner extern driver_t dwmmc_driver; 78*fa6ea996SAndrew Turner 79*fa6ea996SAndrew Turner int dwmmc_attach(device_t); 80*fa6ea996SAndrew Turner 81*fa6ea996SAndrew Turner #endif 82