1 /* 2 * Copyright 2017 Emmanuel Vadot <manu@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/kernel.h> 33 #include <sys/bus.h> 34 #include <sys/module.h> 35 36 #include <machine/bus.h> 37 38 #include <dev/mmc/bridge.h> 39 40 #include <dev/ofw/ofw_bus_subr.h> 41 42 #ifdef EXT_RESOURCES 43 #include <dev/extres/clk/clk.h> 44 #endif 45 46 #include <dev/mmc/host/dwmmc_var.h> 47 48 #include "opt_mmccam.h" 49 50 enum RKTYPE { 51 RK2928 = 1, 52 RK3328, 53 }; 54 55 static struct ofw_compat_data compat_data[] = { 56 {"rockchip,rk2928-dw-mshc", RK2928}, 57 {"rockchip,rk3328-dw-mshc", RK3328}, 58 {NULL, 0}, 59 }; 60 61 static int dwmmc_rockchip_update_ios(struct dwmmc_softc *sc, struct mmc_ios *ios); 62 63 static int 64 rockchip_dwmmc_probe(device_t dev) 65 { 66 67 if (!ofw_bus_status_okay(dev)) 68 return (ENXIO); 69 70 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 71 return (ENXIO); 72 73 device_set_desc(dev, "Synopsys DesignWare Mobile " 74 "Storage Host Controller (RockChip)"); 75 76 return (BUS_PROBE_VENDOR); 77 } 78 79 static int 80 rockchip_dwmmc_attach(device_t dev) 81 { 82 struct dwmmc_softc *sc; 83 int type; 84 85 sc = device_get_softc(dev); 86 sc->hwtype = HWTYPE_ROCKCHIP; 87 type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 88 89 switch (type) { 90 case RK2928: 91 sc->use_pio = 1; 92 break; 93 } 94 95 sc->pwren_inverted = 1; 96 97 #ifdef EXT_RESOURCES 98 sc->update_ios = &dwmmc_rockchip_update_ios; 99 #endif 100 101 return (dwmmc_attach(dev)); 102 } 103 104 #ifdef EXT_RESOURCES 105 static int 106 dwmmc_rockchip_update_ios(struct dwmmc_softc *sc, struct mmc_ios *ios) 107 { 108 unsigned int clock; 109 int error; 110 111 if (ios->clock && ios->clock != sc->bus_hz) { 112 sc->bus_hz = clock = ios->clock; 113 /* Set the MMC clock. */ 114 if (sc->ciu) { 115 /* 116 * Apparently you need to set the ciu clock to 117 * the double of bus_hz 118 */ 119 error = clk_set_freq(sc->ciu, clock * 2, 120 CLK_SET_ROUND_DOWN); 121 if (error != 0) { 122 device_printf(sc->dev, 123 "failed to set frequency to %u Hz: %d\n", 124 clock, error); 125 return (error); 126 } 127 } 128 } 129 return (0); 130 } 131 #endif 132 133 static device_method_t rockchip_dwmmc_methods[] = { 134 /* bus interface */ 135 DEVMETHOD(device_probe, rockchip_dwmmc_probe), 136 DEVMETHOD(device_attach, rockchip_dwmmc_attach), 137 138 DEVMETHOD_END 139 }; 140 141 static devclass_t rockchip_dwmmc_devclass; 142 143 DEFINE_CLASS_1(rockchip_dwmmc, rockchip_dwmmc_driver, rockchip_dwmmc_methods, 144 sizeof(struct dwmmc_softc), dwmmc_driver); 145 146 DRIVER_MODULE(rockchip_dwmmc, simplebus, rockchip_dwmmc_driver, 147 rockchip_dwmmc_devclass, 0, 0); 148 DRIVER_MODULE(rockchip_dwmmc, ofwbus, rockchip_dwmmc_driver, 149 rockchip_dwmmc_devclass, NULL, NULL); 150 #ifndef MMCCAM 151 MMC_DECLARE_BRIDGE(rockchip_dwmmc); 152 #endif 153