1 /* 2 * Copyright 2015 Andrew Turner. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/kernel.h> 31 #include <sys/bus.h> 32 #include <sys/module.h> 33 #include <sys/queue.h> 34 #include <sys/taskqueue.h> 35 36 #include <machine/bus.h> 37 38 #include <dev/mmc/bridge.h> 39 #include <dev/mmc/mmc_fdt_helpers.h> 40 41 #include <dev/ofw/ofw_bus_subr.h> 42 43 #include <dev/mmc/host/dwmmc_var.h> 44 45 #include "opt_mmccam.h" 46 47 static device_probe_t hisi_dwmmc_probe; 48 static device_attach_t hisi_dwmmc_attach; 49 50 static int 51 hisi_dwmmc_probe(device_t dev) 52 { 53 54 if (!ofw_bus_status_okay(dev)) 55 return (ENXIO); 56 57 if (!ofw_bus_is_compatible(dev, "hisilicon,hi6220-dw-mshc")) 58 return (ENXIO); 59 60 device_set_desc(dev, "Synopsys DesignWare Mobile " 61 "Storage Host Controller (HiSilicon)"); 62 63 return (BUS_PROBE_VENDOR); 64 } 65 66 static int 67 hisi_dwmmc_attach(device_t dev) 68 { 69 struct dwmmc_softc *sc; 70 71 sc = device_get_softc(dev); 72 sc->hwtype = HWTYPE_HISILICON; 73 /* TODO: Calculate this from a clock driver */ 74 sc->bus_hz = 24000000; /* 24MHz */ 75 76 /* 77 * ARM64TODO: This is likely because we lack support for 78 * DMA when the controller is not cache-coherent on arm64. 79 */ 80 sc->use_pio = 1; 81 82 return (dwmmc_attach(dev)); 83 } 84 85 static device_method_t hisi_dwmmc_methods[] = { 86 /* bus interface */ 87 DEVMETHOD(device_probe, hisi_dwmmc_probe), 88 DEVMETHOD(device_attach, hisi_dwmmc_attach), 89 90 DEVMETHOD_END 91 }; 92 93 DEFINE_CLASS_1(hisi_dwmmc, hisi_dwmmc_driver, hisi_dwmmc_methods, 94 sizeof(struct dwmmc_softc), dwmmc_driver); 95 96 DRIVER_MODULE(hisi_dwmmc, simplebus, hisi_dwmmc_driver, 0, 0); 97 DRIVER_MODULE(hisi_dwmmc, ofwbus, hisi_dwmmc_driver, NULL, NULL); 98 #ifndef MMCCAM 99 MMC_DECLARE_BRIDGE(hisi_dwmmc); 100 #endif 101