1 /*- 2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 * $FreeBSD$ 33 */ 34 35 #ifndef __MLX5_ACCEL_IPSEC_H__ 36 #define __MLX5_ACCEL_IPSEC_H__ 37 38 #ifdef CONFIG_MLX5_ACCEL 39 40 #include <dev/mlx5/driver.h> 41 42 enum { 43 MLX5_ACCEL_IPSEC_DEVICE = BIT(1), 44 MLX5_ACCEL_IPSEC_IPV6 = BIT(2), 45 MLX5_ACCEL_IPSEC_ESP = BIT(3), 46 MLX5_ACCEL_IPSEC_LSO = BIT(4), 47 }; 48 49 #define MLX5_IPSEC_SADB_IP_AH BIT(7) 50 #define MLX5_IPSEC_SADB_IP_ESP BIT(6) 51 #define MLX5_IPSEC_SADB_SA_VALID BIT(5) 52 #define MLX5_IPSEC_SADB_SPI_EN BIT(4) 53 #define MLX5_IPSEC_SADB_DIR_SX BIT(3) 54 #define MLX5_IPSEC_SADB_IPV6 BIT(2) 55 56 enum { 57 MLX5_IPSEC_CMD_ADD_SA = 0, 58 MLX5_IPSEC_CMD_DEL_SA = 1, 59 }; 60 61 enum mlx5_accel_ipsec_enc_mode { 62 MLX5_IPSEC_SADB_MODE_NONE = 0, 63 MLX5_IPSEC_SADB_MODE_AES_GCM_128_AUTH_128 = 1, 64 MLX5_IPSEC_SADB_MODE_AES_GCM_256_AUTH_128 = 3, 65 }; 66 67 #define MLX5_IPSEC_DEV(mdev) (mlx5_accel_ipsec_device_caps(mdev) & \ 68 MLX5_ACCEL_IPSEC_DEVICE) 69 70 struct mlx5_accel_ipsec_sa { 71 __be32 cmd; 72 u8 key_enc[32]; 73 u8 key_auth[32]; 74 __be32 sip[4]; 75 __be32 dip[4]; 76 union { 77 struct { 78 __be32 reserved; 79 u8 salt_iv[8]; 80 __be32 salt; 81 } __packed gcm; 82 struct { 83 u8 salt[16]; 84 } __packed cbc; 85 }; 86 __be32 spi; 87 __be32 sw_sa_handle; 88 __be16 tfclen; 89 u8 enc_mode; 90 u8 sip_masklen; 91 u8 dip_masklen; 92 u8 flags; 93 u8 reserved[2]; 94 } __packed; 95 96 /** 97 * mlx5_accel_ipsec_sa_cmd_exec - Execute an IPSec SADB command 98 * @mdev: mlx5 device 99 * @cmd: command to execute 100 * May be called from atomic context. Returns context pointer, or error 101 * Caller must eventually call mlx5_accel_ipsec_sa_cmd_wait from non-atomic 102 * context, to cleanup the context pointer 103 */ 104 void *mlx5_accel_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev, 105 struct mlx5_accel_ipsec_sa *cmd); 106 107 /** 108 * mlx5_accel_ipsec_sa_cmd_wait - Wait for command execution completion 109 * @context: Context pointer returned from call to mlx5_accel_ipsec_sa_cmd_exec 110 * Sleeps (killable) until command execution is complete. 111 * Returns the command result, or -EINTR if killed 112 */ 113 int mlx5_accel_ipsec_sa_cmd_wait(void *context); 114 115 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev); 116 117 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev); 118 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters, 119 unsigned int count); 120 121 int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev); 122 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev); 123 124 #else 125 126 #define MLX5_IPSEC_DEV(mdev) false 127 128 static inline int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev) 129 { 130 return 0; 131 } 132 133 static inline void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev) 134 { 135 } 136 137 #endif 138 139 #endif /* __MLX5_ACCEL_IPSEC_H__ */ 140