xref: /freebsd/sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c (revision f0cfa1b168014f56c02b83e5f28412cc5f78d117)
1 /*
2  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 
34 #define	LINUXKPI_PARAM_PREFIX mlx4_
35 
36 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/errno.h>
39 #include <linux/etherdevice.h>
40 #include <linux/netdevice.h>
41 #include <linux/inetdevice.h>
42 #include <linux/if_vlan.h>
43 #include <linux/fs.h>
44 #include <linux/rcupdate.h>
45 #include <linux/notifier.h>
46 #include <linux/delay.h>
47 
48 #include <net/ipv6.h>
49 
50 #include <rdma/ib_smi.h>
51 #include <rdma/ib_user_verbs.h>
52 #include <rdma/ib_addr.h>
53 #include <rdma/ib_cache.h>
54 
55 #include <dev/mlx4/driver.h>
56 #include <dev/mlx4/cmd.h>
57 #include <dev/mlx4/qp.h>
58 #include <linux/sched.h>
59 #include <linux/page.h>
60 #include <linux/printk.h>
61 #include "mlx4_ib.h"
62 #include <rdma/mlx4-abi.h>
63 #include "wc.h"
64 
65 #define DRV_NAME	MLX4_IB_DRV_NAME
66 #define DRV_VERSION	"3.4.1-BETA"
67 #define DRV_RELDATE	"October 2017"
68 
69 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
70 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
71 #define MLX4_IB_CARD_REV_A0   0xA0
72 
73 MODULE_AUTHOR("Roland Dreier");
74 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
75 MODULE_LICENSE("Dual BSD/GPL");
76 
77 int mlx4_ib_sm_guid_assign = 0;
78 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
79 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
80 
81 static const char mlx4_ib_version[] =
82 	DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
83 	DRV_VERSION " (" DRV_RELDATE ")\n";
84 
85 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
86 
87 static struct workqueue_struct *wq;
88 
89 static void init_query_mad(struct ib_smp *mad)
90 {
91 	mad->base_version  = 1;
92 	mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
93 	mad->class_version = 1;
94 	mad->method	   = IB_MGMT_METHOD_GET;
95 }
96 
97 static int check_flow_steering_support(struct mlx4_dev *dev)
98 {
99 	int eth_num_ports = 0;
100 	int ib_num_ports = 0;
101 
102 	int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
103 
104 	if (dmfs) {
105 		int i;
106 		mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
107 			eth_num_ports++;
108 		mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
109 			ib_num_ports++;
110 		dmfs &= (!ib_num_ports ||
111 			 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
112 			(!eth_num_ports ||
113 			 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
114 		if (ib_num_ports && mlx4_is_mfunc(dev)) {
115 			pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
116 			dmfs = 0;
117 		}
118 	}
119 	return dmfs;
120 }
121 
122 static int num_ib_ports(struct mlx4_dev *dev)
123 {
124 	int ib_ports = 0;
125 	int i;
126 
127 	mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
128 		ib_ports++;
129 
130 	return ib_ports;
131 }
132 
133 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
134 {
135 	struct mlx4_ib_dev *ibdev = to_mdev(device);
136 	struct net_device *dev;
137 
138 	rcu_read_lock();
139 	dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
140 
141 #if 0
142 	if (dev) {
143 		if (mlx4_is_bonded(ibdev->dev)) {
144 			struct net_device *upper = NULL;
145 
146 			upper = netdev_master_upper_dev_get_rcu(dev);
147 			if (upper) {
148 				struct net_device *active;
149 
150 				active = bond_option_active_slave_get_rcu(netdev_priv(upper));
151 				if (active)
152 					dev = active;
153 			}
154 		}
155 	}
156 #endif
157 	if (dev)
158 		dev_hold(dev);
159 
160 	rcu_read_unlock();
161 	return dev;
162 }
163 
164 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
165 				  struct mlx4_ib_dev *ibdev,
166 				  u8 port_num)
167 {
168 	struct mlx4_cmd_mailbox *mailbox;
169 	int err;
170 	struct mlx4_dev *dev = ibdev->dev;
171 	int i;
172 	union ib_gid *gid_tbl;
173 
174 	mailbox = mlx4_alloc_cmd_mailbox(dev);
175 	if (IS_ERR(mailbox))
176 		return -ENOMEM;
177 
178 	gid_tbl = mailbox->buf;
179 
180 	for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
181 		memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
182 
183 	err = mlx4_cmd(dev, mailbox->dma,
184 		       MLX4_SET_PORT_GID_TABLE << 8 | port_num,
185 		       1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
186 		       MLX4_CMD_WRAPPED);
187 	if (mlx4_is_bonded(dev))
188 		err += mlx4_cmd(dev, mailbox->dma,
189 				MLX4_SET_PORT_GID_TABLE << 8 | 2,
190 				1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
191 				MLX4_CMD_WRAPPED);
192 
193 	mlx4_free_cmd_mailbox(dev, mailbox);
194 	return err;
195 }
196 
197 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
198 				     struct mlx4_ib_dev *ibdev,
199 				     u8 port_num)
200 {
201 	struct mlx4_cmd_mailbox *mailbox;
202 	int err;
203 	struct mlx4_dev *dev = ibdev->dev;
204 	int i;
205 	struct {
206 		union ib_gid	gid;
207 		__be32		rsrvd1[2];
208 		__be16		rsrvd2;
209 		u8		type;
210 		u8		version;
211 		__be32		rsrvd3;
212 	} *gid_tbl;
213 
214 	mailbox = mlx4_alloc_cmd_mailbox(dev);
215 	if (IS_ERR(mailbox))
216 		return -ENOMEM;
217 
218 	gid_tbl = mailbox->buf;
219 	for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
220 		memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
221 		if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
222 			gid_tbl[i].version = 2;
223 			if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
224 				gid_tbl[i].type = 1;
225 			else
226 				memset(&gid_tbl[i].gid, 0, 12);
227 		}
228 	}
229 
230 	err = mlx4_cmd(dev, mailbox->dma,
231 		       MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
232 		       1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
233 		       MLX4_CMD_WRAPPED);
234 	if (mlx4_is_bonded(dev))
235 		err += mlx4_cmd(dev, mailbox->dma,
236 				MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
237 				1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
238 				MLX4_CMD_WRAPPED);
239 
240 	mlx4_free_cmd_mailbox(dev, mailbox);
241 	return err;
242 }
243 
244 static int mlx4_ib_update_gids(struct gid_entry *gids,
245 			       struct mlx4_ib_dev *ibdev,
246 			       u8 port_num)
247 {
248 	if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
249 		return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
250 
251 	return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
252 }
253 
254 static int mlx4_ib_add_gid(struct ib_device *device,
255 			   u8 port_num,
256 			   unsigned int index,
257 			   const union ib_gid *gid,
258 			   const struct ib_gid_attr *attr,
259 			   void **context)
260 {
261 	struct mlx4_ib_dev *ibdev = to_mdev(device);
262 	struct mlx4_ib_iboe *iboe = &ibdev->iboe;
263 	struct mlx4_port_gid_table   *port_gid_table;
264 	int free = -1, found = -1;
265 	int ret = 0;
266 	int hw_update = 0;
267 	int i;
268 	struct gid_entry *gids = NULL;
269 
270 	if (!rdma_cap_roce_gid_table(device, port_num))
271 		return -EINVAL;
272 
273 	if (port_num > MLX4_MAX_PORTS)
274 		return -EINVAL;
275 
276 	if (!context)
277 		return -EINVAL;
278 
279 	port_gid_table = &iboe->gids[port_num - 1];
280 	spin_lock_bh(&iboe->lock);
281 	for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
282 		if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) &&
283 		    (port_gid_table->gids[i].gid_type == attr->gid_type))  {
284 			found = i;
285 			break;
286 		}
287 		if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
288 			free = i; /* HW has space */
289 	}
290 
291 	if (found < 0) {
292 		if (free < 0) {
293 			ret = -ENOSPC;
294 		} else {
295 			port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
296 			if (!port_gid_table->gids[free].ctx) {
297 				ret = -ENOMEM;
298 			} else {
299 				*context = port_gid_table->gids[free].ctx;
300 				memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
301 				port_gid_table->gids[free].gid_type = attr->gid_type;
302 				port_gid_table->gids[free].ctx->real_index = free;
303 				port_gid_table->gids[free].ctx->refcount = 1;
304 				hw_update = 1;
305 			}
306 		}
307 	} else {
308 		struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
309 		*context = ctx;
310 		ctx->refcount++;
311 	}
312 	if (!ret && hw_update) {
313 		gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
314 		if (!gids) {
315 			ret = -ENOMEM;
316 		} else {
317 			for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
318 				memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
319 				gids[i].gid_type = port_gid_table->gids[i].gid_type;
320 			}
321 		}
322 	}
323 	spin_unlock_bh(&iboe->lock);
324 
325 	if (!ret && hw_update) {
326 		ret = mlx4_ib_update_gids(gids, ibdev, port_num);
327 		kfree(gids);
328 	}
329 
330 	return ret;
331 }
332 
333 static int mlx4_ib_del_gid(struct ib_device *device,
334 			   u8 port_num,
335 			   unsigned int index,
336 			   void **context)
337 {
338 	struct gid_cache_context *ctx = *context;
339 	struct mlx4_ib_dev *ibdev = to_mdev(device);
340 	struct mlx4_ib_iboe *iboe = &ibdev->iboe;
341 	struct mlx4_port_gid_table   *port_gid_table;
342 	int ret = 0;
343 	int hw_update = 0;
344 	struct gid_entry *gids = NULL;
345 
346 	if (!rdma_cap_roce_gid_table(device, port_num))
347 		return -EINVAL;
348 
349 	if (port_num > MLX4_MAX_PORTS)
350 		return -EINVAL;
351 
352 	port_gid_table = &iboe->gids[port_num - 1];
353 	spin_lock_bh(&iboe->lock);
354 	if (ctx) {
355 		ctx->refcount--;
356 		if (!ctx->refcount) {
357 			unsigned int real_index = ctx->real_index;
358 
359 			memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
360 			kfree(port_gid_table->gids[real_index].ctx);
361 			port_gid_table->gids[real_index].ctx = NULL;
362 			hw_update = 1;
363 		}
364 	}
365 	if (!ret && hw_update) {
366 		int i;
367 
368 		gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
369 		if (!gids) {
370 			ret = -ENOMEM;
371 		} else {
372 			for (i = 0; i < MLX4_MAX_PORT_GIDS; i++)
373 				memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
374 		}
375 	}
376 	spin_unlock_bh(&iboe->lock);
377 
378 	if (!ret && hw_update) {
379 		ret = mlx4_ib_update_gids(gids, ibdev, port_num);
380 		kfree(gids);
381 	}
382 	return ret;
383 }
384 
385 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
386 				    u8 port_num, int index)
387 {
388 	struct mlx4_ib_iboe *iboe = &ibdev->iboe;
389 	struct gid_cache_context *ctx = NULL;
390 	union ib_gid gid;
391 	struct mlx4_port_gid_table   *port_gid_table;
392 	int real_index = -EINVAL;
393 	int i;
394 	int ret;
395 	unsigned long flags;
396 	struct ib_gid_attr attr;
397 
398 	if (port_num > MLX4_MAX_PORTS)
399 		return -EINVAL;
400 
401 	if (mlx4_is_bonded(ibdev->dev))
402 		port_num = 1;
403 
404 	if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
405 		return index;
406 
407 	ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr);
408 	if (ret)
409 		return ret;
410 
411 	if (attr.ndev)
412 		dev_put(attr.ndev);
413 
414 	if (!memcmp(&gid, &zgid, sizeof(gid)))
415 		return -EINVAL;
416 
417 	spin_lock_irqsave(&iboe->lock, flags);
418 	port_gid_table = &iboe->gids[port_num - 1];
419 
420 	for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
421 		if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) &&
422 		    attr.gid_type == port_gid_table->gids[i].gid_type) {
423 			ctx = port_gid_table->gids[i].ctx;
424 			break;
425 		}
426 	if (ctx)
427 		real_index = ctx->real_index;
428 	spin_unlock_irqrestore(&iboe->lock, flags);
429 	return real_index;
430 }
431 
432 static int mlx4_ib_query_device(struct ib_device *ibdev,
433 				struct ib_device_attr *props,
434 				struct ib_udata *uhw)
435 {
436 	struct mlx4_ib_dev *dev = to_mdev(ibdev);
437 	struct ib_smp *in_mad  = NULL;
438 	struct ib_smp *out_mad = NULL;
439 	int err = -ENOMEM;
440 	int have_ib_ports;
441 	struct mlx4_uverbs_ex_query_device cmd;
442 	struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
443 	struct mlx4_clock_params clock_params;
444 
445 	if (uhw->inlen) {
446 		if (uhw->inlen < sizeof(cmd))
447 			return -EINVAL;
448 
449 		err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
450 		if (err)
451 			return err;
452 
453 		if (cmd.comp_mask)
454 			return -EINVAL;
455 
456 		if (cmd.reserved)
457 			return -EINVAL;
458 	}
459 
460 	resp.response_length = offsetof(typeof(resp), response_length) +
461 		sizeof(resp.response_length);
462 	in_mad  = kzalloc(sizeof *in_mad, GFP_KERNEL);
463 	out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
464 	if (!in_mad || !out_mad)
465 		goto out;
466 
467 	init_query_mad(in_mad);
468 	in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
469 
470 	err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
471 			   1, NULL, NULL, in_mad, out_mad);
472 	if (err)
473 		goto out;
474 
475 	memset(props, 0, sizeof *props);
476 
477 	have_ib_ports = num_ib_ports(dev->dev);
478 
479 	props->fw_ver = dev->dev->caps.fw_ver;
480 	props->device_cap_flags    = IB_DEVICE_CHANGE_PHY_PORT |
481 		IB_DEVICE_PORT_ACTIVE_EVENT		|
482 		IB_DEVICE_SYS_IMAGE_GUID		|
483 		IB_DEVICE_RC_RNR_NAK_GEN		|
484 		IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
485 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
486 		props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
487 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
488 		props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
489 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
490 		props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
491 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
492 		props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
493 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
494 		props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
495 	if (dev->dev->caps.max_gso_sz &&
496 	    (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
497 	    (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
498 		props->device_cap_flags |= IB_DEVICE_UD_TSO;
499 	if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
500 		props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
501 	if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
502 	    (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
503 	    (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
504 		props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
505 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
506 		props->device_cap_flags |= IB_DEVICE_XRC;
507 	if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
508 		props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
509 	if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
510 		if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
511 			props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
512 		else
513 			props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
514 	}
515 	if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
516 		props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
517 
518 	props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
519 
520 	props->vendor_id	   = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
521 		0xffffff;
522 	props->vendor_part_id	   = dev->dev->persist->pdev->device;
523 	props->hw_ver		   = be32_to_cpup((__be32 *) (out_mad->data + 32));
524 	memcpy(&props->sys_image_guid, out_mad->data +	4, 8);
525 
526 	props->max_mr_size	   = ~0ull;
527 	props->page_size_cap	   = dev->dev->caps.page_size_cap;
528 	props->max_qp		   = dev->dev->quotas.qp;
529 	props->max_qp_wr	   = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
530 	props->max_sge		   = min(dev->dev->caps.max_sq_sg,
531 					 dev->dev->caps.max_rq_sg);
532 	props->max_sge_rd	   = MLX4_MAX_SGE_RD;
533 	props->max_cq		   = dev->dev->quotas.cq;
534 	props->max_cqe		   = dev->dev->caps.max_cqes;
535 	props->max_mr		   = dev->dev->quotas.mpt;
536 	props->max_pd		   = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
537 	props->max_qp_rd_atom	   = dev->dev->caps.max_qp_dest_rdma;
538 	props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
539 	props->max_res_rd_atom	   = props->max_qp_rd_atom * props->max_qp;
540 	props->max_srq		   = dev->dev->quotas.srq;
541 	props->max_srq_wr	   = dev->dev->caps.max_srq_wqes - 1;
542 	props->max_srq_sge	   = dev->dev->caps.max_srq_sge;
543 	props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
544 	props->local_ca_ack_delay  = dev->dev->caps.local_ca_ack_delay;
545 	props->atomic_cap	   = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
546 		IB_ATOMIC_HCA : IB_ATOMIC_NONE;
547 	props->masked_atomic_cap   = props->atomic_cap;
548 	props->max_pkeys	   = dev->dev->caps.pkey_table_len[1];
549 	props->max_mcast_grp	   = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
550 	props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
551 	props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
552 					   props->max_mcast_grp;
553 	props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
554 	props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
555 	props->timestamp_mask = 0xFFFFFFFFFFFFULL;
556 
557 	if (!mlx4_is_slave(dev->dev))
558 		err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
559 
560 	if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
561 		resp.response_length += sizeof(resp.hca_core_clock_offset);
562 		if (!err && !mlx4_is_slave(dev->dev)) {
563 			resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
564 			resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
565 		}
566 	}
567 
568 	if (uhw->outlen) {
569 		err = ib_copy_to_udata(uhw, &resp, resp.response_length);
570 		if (err)
571 			goto out;
572 	}
573 out:
574 	kfree(in_mad);
575 	kfree(out_mad);
576 
577 	return err;
578 }
579 
580 static enum rdma_link_layer
581 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
582 {
583 	struct mlx4_dev *dev = to_mdev(device)->dev;
584 
585 	return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
586 		IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
587 }
588 
589 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
590 			      struct ib_port_attr *props, int netw_view)
591 {
592 	struct ib_smp *in_mad  = NULL;
593 	struct ib_smp *out_mad = NULL;
594 	int ext_active_speed;
595 	int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
596 	int err = -ENOMEM;
597 
598 	in_mad  = kzalloc(sizeof *in_mad, GFP_KERNEL);
599 	out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
600 	if (!in_mad || !out_mad)
601 		goto out;
602 
603 	init_query_mad(in_mad);
604 	in_mad->attr_id  = IB_SMP_ATTR_PORT_INFO;
605 	in_mad->attr_mod = cpu_to_be32(port);
606 
607 	if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
608 		mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
609 
610 	err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
611 				in_mad, out_mad);
612 	if (err)
613 		goto out;
614 
615 
616 	props->lid		= be16_to_cpup((__be16 *) (out_mad->data + 16));
617 	props->lmc		= out_mad->data[34] & 0x7;
618 	props->sm_lid		= be16_to_cpup((__be16 *) (out_mad->data + 18));
619 	props->sm_sl		= out_mad->data[36] & 0xf;
620 	props->state		= out_mad->data[32] & 0xf;
621 	props->phys_state	= out_mad->data[33] >> 4;
622 	props->port_cap_flags	= be32_to_cpup((__be32 *) (out_mad->data + 20));
623 	if (netw_view)
624 		props->gid_tbl_len = out_mad->data[50];
625 	else
626 		props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
627 	props->max_msg_sz	= to_mdev(ibdev)->dev->caps.max_msg_sz;
628 	props->pkey_tbl_len	= to_mdev(ibdev)->dev->caps.pkey_table_len[port];
629 	props->bad_pkey_cntr	= be16_to_cpup((__be16 *) (out_mad->data + 46));
630 	props->qkey_viol_cntr	= be16_to_cpup((__be16 *) (out_mad->data + 48));
631 	props->active_width	= out_mad->data[31] & 0xf;
632 	props->active_speed	= out_mad->data[35] >> 4;
633 	props->max_mtu		= out_mad->data[41] & 0xf;
634 	props->active_mtu	= out_mad->data[36] >> 4;
635 	props->subnet_timeout	= out_mad->data[51] & 0x1f;
636 	props->max_vl_num	= out_mad->data[37] >> 4;
637 	props->init_type_reply	= out_mad->data[41] >> 4;
638 
639 	/* Check if extended speeds (EDR/FDR/...) are supported */
640 	if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
641 		ext_active_speed = out_mad->data[62] >> 4;
642 
643 		switch (ext_active_speed) {
644 		case 1:
645 			props->active_speed = IB_SPEED_FDR;
646 			break;
647 		case 2:
648 			props->active_speed = IB_SPEED_EDR;
649 			break;
650 		}
651 	}
652 
653 	/* If reported active speed is QDR, check if is FDR-10 */
654 	if (props->active_speed == IB_SPEED_QDR) {
655 		init_query_mad(in_mad);
656 		in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
657 		in_mad->attr_mod = cpu_to_be32(port);
658 
659 		err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
660 				   NULL, NULL, in_mad, out_mad);
661 		if (err)
662 			goto out;
663 
664 		/* Checking LinkSpeedActive for FDR-10 */
665 		if (out_mad->data[15] & 0x1)
666 			props->active_speed = IB_SPEED_FDR10;
667 	}
668 
669 	/* Avoid wrong speed value returned by FW if the IB link is down. */
670 	if (props->state == IB_PORT_DOWN)
671 		 props->active_speed = IB_SPEED_SDR;
672 
673 out:
674 	kfree(in_mad);
675 	kfree(out_mad);
676 	return err;
677 }
678 
679 static u8 state_to_phys_state(enum ib_port_state state)
680 {
681 	return state == IB_PORT_ACTIVE ? 5 : 3;
682 }
683 
684 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
685 			       struct ib_port_attr *props, int netw_view)
686 {
687 
688 	struct mlx4_ib_dev *mdev = to_mdev(ibdev);
689 	struct mlx4_ib_iboe *iboe = &mdev->iboe;
690 	struct net_device *ndev;
691 	enum ib_mtu tmp;
692 	struct mlx4_cmd_mailbox *mailbox;
693 	int err = 0;
694 	int is_bonded = mlx4_is_bonded(mdev->dev);
695 
696 	mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
697 	if (IS_ERR(mailbox))
698 		return PTR_ERR(mailbox);
699 
700 	err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
701 			   MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
702 			   MLX4_CMD_WRAPPED);
703 	if (err)
704 		goto out;
705 
706 	props->active_width	=  (((u8 *)mailbox->buf)[5] == 0x40) ?
707 						IB_WIDTH_4X : IB_WIDTH_1X;
708 	props->active_speed	= IB_SPEED_QDR;
709 	props->port_cap_flags	= IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
710 	props->gid_tbl_len	= mdev->dev->caps.gid_table_len[port];
711 	props->max_msg_sz	= mdev->dev->caps.max_msg_sz;
712 	props->pkey_tbl_len	= 1;
713 	props->max_mtu		= IB_MTU_4096;
714 	props->max_vl_num	= 2;
715 	props->state		= IB_PORT_DOWN;
716 	props->phys_state	= state_to_phys_state(props->state);
717 	props->active_mtu	= IB_MTU_256;
718 	spin_lock_bh(&iboe->lock);
719 	ndev = iboe->netdevs[port - 1];
720 	if (ndev && is_bonded) {
721 #if 0
722 		rcu_read_lock(); /* required to get upper dev */
723 		ndev = netdev_master_upper_dev_get_rcu(ndev);
724 		rcu_read_unlock();
725 #endif
726 	}
727 	if (!ndev)
728 		goto out_unlock;
729 
730 	tmp = iboe_get_mtu(ndev->if_mtu);
731 	props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
732 
733 	props->state		= (netif_running(ndev) && netif_carrier_ok(ndev)) ?
734 					IB_PORT_ACTIVE : IB_PORT_DOWN;
735 	props->phys_state	= state_to_phys_state(props->state);
736 out_unlock:
737 	spin_unlock_bh(&iboe->lock);
738 out:
739 	mlx4_free_cmd_mailbox(mdev->dev, mailbox);
740 	return err;
741 }
742 
743 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
744 			 struct ib_port_attr *props, int netw_view)
745 {
746 	int err;
747 
748 	memset(props, 0, sizeof *props);
749 
750 	err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
751 		ib_link_query_port(ibdev, port, props, netw_view) :
752 				eth_link_query_port(ibdev, port, props, netw_view);
753 
754 	return err;
755 }
756 
757 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
758 			      struct ib_port_attr *props)
759 {
760 	/* returns host view */
761 	return __mlx4_ib_query_port(ibdev, port, props, 0);
762 }
763 
764 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
765 			union ib_gid *gid, int netw_view)
766 {
767 	struct ib_smp *in_mad  = NULL;
768 	struct ib_smp *out_mad = NULL;
769 	int err = -ENOMEM;
770 	struct mlx4_ib_dev *dev = to_mdev(ibdev);
771 	int clear = 0;
772 	int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
773 
774 	in_mad  = kzalloc(sizeof *in_mad, GFP_KERNEL);
775 	out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
776 	if (!in_mad || !out_mad)
777 		goto out;
778 
779 	init_query_mad(in_mad);
780 	in_mad->attr_id  = IB_SMP_ATTR_PORT_INFO;
781 	in_mad->attr_mod = cpu_to_be32(port);
782 
783 	if (mlx4_is_mfunc(dev->dev) && netw_view)
784 		mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
785 
786 	err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
787 	if (err)
788 		goto out;
789 
790 	memcpy(gid->raw, out_mad->data + 8, 8);
791 
792 	if (mlx4_is_mfunc(dev->dev) && !netw_view) {
793 		if (index) {
794 			/* For any index > 0, return the null guid */
795 			err = 0;
796 			clear = 1;
797 			goto out;
798 		}
799 	}
800 
801 	init_query_mad(in_mad);
802 	in_mad->attr_id  = IB_SMP_ATTR_GUID_INFO;
803 	in_mad->attr_mod = cpu_to_be32(index / 8);
804 
805 	err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
806 			   NULL, NULL, in_mad, out_mad);
807 	if (err)
808 		goto out;
809 
810 	memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
811 
812 out:
813 	if (clear)
814 		memset(gid->raw + 8, 0, 8);
815 	kfree(in_mad);
816 	kfree(out_mad);
817 	return err;
818 }
819 
820 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
821 			     union ib_gid *gid)
822 {
823 	int ret;
824 
825 	if (rdma_protocol_ib(ibdev, port))
826 		return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
827 
828 	if (!rdma_protocol_roce(ibdev, port))
829 		return -ENODEV;
830 
831 	if (!rdma_cap_roce_gid_table(ibdev, port))
832 		return -ENODEV;
833 
834 	ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
835 	if (ret == -EAGAIN) {
836 		memcpy(gid, &zgid, sizeof(*gid));
837 		return 0;
838 	}
839 
840 	return ret;
841 }
842 
843 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
844 {
845 	union sl2vl_tbl_to_u64 sl2vl64;
846 	struct ib_smp *in_mad  = NULL;
847 	struct ib_smp *out_mad = NULL;
848 	int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
849 	int err = -ENOMEM;
850 	int jj;
851 
852 	if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
853 		*sl2vl_tbl = 0;
854 		return 0;
855 	}
856 
857 	in_mad  = kzalloc(sizeof(*in_mad), GFP_KERNEL);
858 	out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
859 	if (!in_mad || !out_mad)
860 		goto out;
861 
862 	init_query_mad(in_mad);
863 	in_mad->attr_id  = IB_SMP_ATTR_SL_TO_VL_TABLE;
864 	in_mad->attr_mod = 0;
865 
866 	if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
867 		mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
868 
869 	err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
870 			   in_mad, out_mad);
871 	if (err)
872 		goto out;
873 
874 	for (jj = 0; jj < 8; jj++)
875 		sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
876 	*sl2vl_tbl = sl2vl64.sl64;
877 
878 out:
879 	kfree(in_mad);
880 	kfree(out_mad);
881 	return err;
882 }
883 
884 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
885 {
886 	u64 sl2vl;
887 	int i;
888 	int err;
889 
890 	for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
891 		if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
892 			continue;
893 		err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
894 		if (err) {
895 			pr_err("Unable to get default sl to vl mapping for port %d.  Using all zeroes (%d)\n",
896 			       i, err);
897 			sl2vl = 0;
898 		}
899 		atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
900 	}
901 }
902 
903 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
904 			 u16 *pkey, int netw_view)
905 {
906 	struct ib_smp *in_mad  = NULL;
907 	struct ib_smp *out_mad = NULL;
908 	int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
909 	int err = -ENOMEM;
910 
911 	in_mad  = kzalloc(sizeof *in_mad, GFP_KERNEL);
912 	out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
913 	if (!in_mad || !out_mad)
914 		goto out;
915 
916 	init_query_mad(in_mad);
917 	in_mad->attr_id  = IB_SMP_ATTR_PKEY_TABLE;
918 	in_mad->attr_mod = cpu_to_be32(index / 32);
919 
920 	if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
921 		mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
922 
923 	err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
924 			   in_mad, out_mad);
925 	if (err)
926 		goto out;
927 
928 	*pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
929 
930 out:
931 	kfree(in_mad);
932 	kfree(out_mad);
933 	return err;
934 }
935 
936 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
937 {
938 	return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
939 }
940 
941 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
942 				 struct ib_device_modify *props)
943 {
944 	struct mlx4_cmd_mailbox *mailbox;
945 	unsigned long flags;
946 
947 	if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
948 		return -EOPNOTSUPP;
949 
950 	if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
951 		return 0;
952 
953 	if (mlx4_is_slave(to_mdev(ibdev)->dev))
954 		return -EOPNOTSUPP;
955 
956 	spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
957 	memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
958 	spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
959 
960 	/*
961 	 * If possible, pass node desc to FW, so it can generate
962 	 * a 144 trap.  If cmd fails, just ignore.
963 	 */
964 	mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
965 	if (IS_ERR(mailbox))
966 		return 0;
967 
968 	memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
969 	mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
970 		 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
971 
972 	mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
973 
974 	return 0;
975 }
976 
977 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
978 			    u32 cap_mask)
979 {
980 	struct mlx4_cmd_mailbox *mailbox;
981 	int err;
982 
983 	mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
984 	if (IS_ERR(mailbox))
985 		return PTR_ERR(mailbox);
986 
987 	if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
988 		*(u8 *) mailbox->buf	     = !!reset_qkey_viols << 6;
989 		((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
990 	} else {
991 		((u8 *) mailbox->buf)[3]     = !!reset_qkey_viols;
992 		((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
993 	}
994 
995 	err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
996 		       MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
997 		       MLX4_CMD_WRAPPED);
998 
999 	mlx4_free_cmd_mailbox(dev->dev, mailbox);
1000 	return err;
1001 }
1002 
1003 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1004 			       struct ib_port_modify *props)
1005 {
1006 	struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1007 	u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1008 	struct ib_port_attr attr;
1009 	u32 cap_mask;
1010 	int err;
1011 
1012 	/* return OK if this is RoCE. CM calls ib_modify_port() regardless
1013 	 * of whether port link layer is ETH or IB. For ETH ports, qkey
1014 	 * violations and port capabilities are not meaningful.
1015 	 */
1016 	if (is_eth)
1017 		return 0;
1018 
1019 	mutex_lock(&mdev->cap_mask_mutex);
1020 
1021 	err = mlx4_ib_query_port(ibdev, port, &attr);
1022 	if (err)
1023 		goto out;
1024 
1025 	cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1026 		~props->clr_port_cap_mask;
1027 
1028 	err = mlx4_ib_SET_PORT(mdev, port,
1029 			       !!(mask & IB_PORT_RESET_QKEY_CNTR),
1030 			       cap_mask);
1031 
1032 out:
1033 	mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1034 	return err;
1035 }
1036 
1037 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1038 						  struct ib_udata *udata)
1039 {
1040 	struct mlx4_ib_dev *dev = to_mdev(ibdev);
1041 	struct mlx4_ib_ucontext *context;
1042 	struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1043 	struct mlx4_ib_alloc_ucontext_resp resp;
1044 	int err;
1045 
1046 	if (!dev->ib_active)
1047 		return ERR_PTR(-EAGAIN);
1048 
1049 	if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1050 		resp_v3.qp_tab_size      = dev->dev->caps.num_qps;
1051 		resp_v3.bf_reg_size      = dev->dev->caps.bf_reg_size;
1052 		resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1053 	} else {
1054 		resp.dev_caps	      = dev->dev->caps.userspace_caps;
1055 		resp.qp_tab_size      = dev->dev->caps.num_qps;
1056 		resp.bf_reg_size      = dev->dev->caps.bf_reg_size;
1057 		resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1058 		resp.cqe_size	      = dev->dev->caps.cqe_size;
1059 	}
1060 
1061 	context = kzalloc(sizeof(*context), GFP_KERNEL);
1062 	if (!context)
1063 		return ERR_PTR(-ENOMEM);
1064 
1065 	err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1066 	if (err) {
1067 		kfree(context);
1068 		return ERR_PTR(err);
1069 	}
1070 
1071 	INIT_LIST_HEAD(&context->db_page_list);
1072 	mutex_init(&context->db_page_mutex);
1073 
1074 	if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1075 		err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1076 	else
1077 		err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1078 
1079 	if (err) {
1080 		mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1081 		kfree(context);
1082 		return ERR_PTR(-EFAULT);
1083 	}
1084 
1085 	return &context->ibucontext;
1086 }
1087 
1088 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1089 {
1090 	struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1091 
1092 	mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1093 	kfree(context);
1094 
1095 	return 0;
1096 }
1097 
1098 static void  mlx4_ib_vma_open(struct vm_area_struct *area)
1099 {
1100 	/* vma_open is called when a new VMA is created on top of our VMA.
1101 	 * This is done through either mremap flow or split_vma (usually due
1102 	 * to mlock, madvise, munmap, etc.). We do not support a clone of the
1103 	 * vma, as this VMA is strongly hardware related. Therefore we set the
1104 	 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
1105 	 * calling us again and trying to do incorrect actions. We assume that
1106 	 * the original vma size is exactly a single page that there will be no
1107 	 * "splitting" operations on.
1108 	 */
1109 	area->vm_ops = NULL;
1110 }
1111 
1112 static void  mlx4_ib_vma_close(struct vm_area_struct *area)
1113 {
1114 	struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
1115 
1116 	/* It's guaranteed that all VMAs opened on a FD are closed before the
1117 	 * file itself is closed, therefore no sync is needed with the regular
1118 	 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
1119 	 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
1120 	 * The close operation is usually called under mm->mmap_sem except when
1121 	 * process is exiting.  The exiting case is handled explicitly as part
1122 	 * of mlx4_ib_disassociate_ucontext.
1123 	 */
1124 	mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
1125 				area->vm_private_data;
1126 
1127 	/* set the vma context pointer to null in the mlx4_ib driver's private
1128 	 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
1129 	 */
1130 	mlx4_ib_vma_priv_data->vma = NULL;
1131 }
1132 
1133 static const struct vm_operations_struct mlx4_ib_vm_ops = {
1134 	.open = mlx4_ib_vma_open,
1135 	.close = mlx4_ib_vma_close
1136 };
1137 
1138 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1139 {
1140 	int i;
1141 	int ret = 0;
1142 	struct vm_area_struct *vma;
1143 	struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1144 	struct task_struct *owning_process  = NULL;
1145 	struct mm_struct   *owning_mm       = NULL;
1146 
1147 	owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID);
1148 	if (!owning_process)
1149 		return;
1150 
1151 	owning_mm = get_task_mm(owning_process);
1152 	if (!owning_mm) {
1153 		pr_info("no mm, disassociate ucontext is pending task termination\n");
1154 		while (1) {
1155 			/* make sure that task is dead before returning, it may
1156 			 * prevent a rare case of module down in parallel to a
1157 			 * call to mlx4_ib_vma_close.
1158 			 */
1159 			put_task_struct(owning_process);
1160 			msleep(1);
1161 			owning_process = get_pid_task(ibcontext->tgid,
1162 						      PIDTYPE_PID);
1163 			if (!owning_process /* ||
1164 			    owning_process->state == TASK_DEAD */) {
1165 				pr_info("disassociate ucontext done, task was terminated\n");
1166 				/* in case task was dead need to release the task struct */
1167 				if (owning_process)
1168 					put_task_struct(owning_process);
1169 				return;
1170 			}
1171 		}
1172 	}
1173 
1174 	/* need to protect from a race on closing the vma as part of
1175 	 * mlx4_ib_vma_close().
1176 	 */
1177 	down_read(&owning_mm->mmap_sem);
1178 	for (i = 0; i < HW_BAR_COUNT; i++) {
1179 		vma = context->hw_bar_info[i].vma;
1180 		if (!vma)
1181 			continue;
1182 
1183 		ret = zap_vma_ptes(context->hw_bar_info[i].vma,
1184 				   context->hw_bar_info[i].vma->vm_start,
1185 				   PAGE_SIZE);
1186 		if (ret) {
1187 			pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret);
1188 			BUG_ON(1);
1189 		}
1190 
1191 		/* context going to be destroyed, should not access ops any more */
1192 		context->hw_bar_info[i].vma->vm_ops = NULL;
1193 	}
1194 
1195 	up_read(&owning_mm->mmap_sem);
1196 	mmput(owning_mm);
1197 	put_task_struct(owning_process);
1198 }
1199 
1200 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1201 				 struct mlx4_ib_vma_private_data *vma_private_data)
1202 {
1203 	vma_private_data->vma = vma;
1204 	vma->vm_private_data = vma_private_data;
1205 	vma->vm_ops =  &mlx4_ib_vm_ops;
1206 }
1207 
1208 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1209 {
1210 	struct mlx4_ib_dev *dev = to_mdev(context->device);
1211 	struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1212 
1213 	if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1214 		return -EINVAL;
1215 
1216 	if (vma->vm_pgoff == 0) {
1217 		/* We prevent double mmaping on same context */
1218 		if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1219 			return -EINVAL;
1220 
1221 		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1222 
1223 		if (io_remap_pfn_range(vma, vma->vm_start,
1224 				       to_mucontext(context)->uar.pfn,
1225 				       PAGE_SIZE, vma->vm_page_prot))
1226 			return -EAGAIN;
1227 
1228 		mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1229 
1230 	} else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1231 		/* We prevent double mmaping on same context */
1232 		if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1233 			return -EINVAL;
1234 
1235 		vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1236 
1237 		if (io_remap_pfn_range(vma, vma->vm_start,
1238 				       to_mucontext(context)->uar.pfn +
1239 				       dev->dev->caps.num_uars,
1240 				       PAGE_SIZE, vma->vm_page_prot))
1241 			return -EAGAIN;
1242 
1243 		mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1244 
1245 	} else if (vma->vm_pgoff == 3) {
1246 		struct mlx4_clock_params params;
1247 		int ret;
1248 
1249 		/* We prevent double mmaping on same context */
1250 		if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1251 			return -EINVAL;
1252 
1253 		ret = mlx4_get_internal_clock_params(dev->dev, &params);
1254 
1255 		if (ret)
1256 			return ret;
1257 
1258 		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1259 		if (io_remap_pfn_range(vma, vma->vm_start,
1260 				       (pci_resource_start(dev->dev->persist->pdev,
1261 							   params.bar) +
1262 					params.offset)
1263 				       >> PAGE_SHIFT,
1264 				       PAGE_SIZE, vma->vm_page_prot))
1265 			return -EAGAIN;
1266 
1267 		mlx4_ib_set_vma_data(vma,
1268 				     &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1269 	} else {
1270 		return -EINVAL;
1271 	}
1272 
1273 	return 0;
1274 }
1275 
1276 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1277 				      struct ib_ucontext *context,
1278 				      struct ib_udata *udata)
1279 {
1280 	struct mlx4_ib_pd *pd;
1281 	int err;
1282 
1283 	pd = kmalloc(sizeof *pd, GFP_KERNEL);
1284 	if (!pd)
1285 		return ERR_PTR(-ENOMEM);
1286 
1287 	err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1288 	if (err) {
1289 		kfree(pd);
1290 		return ERR_PTR(err);
1291 	}
1292 
1293 	if (context)
1294 		if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1295 			mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1296 			kfree(pd);
1297 			return ERR_PTR(-EFAULT);
1298 		}
1299 
1300 	return &pd->ibpd;
1301 }
1302 
1303 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1304 {
1305 	mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1306 	kfree(pd);
1307 
1308 	return 0;
1309 }
1310 
1311 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1312 					  struct ib_ucontext *context,
1313 					  struct ib_udata *udata)
1314 {
1315 	struct mlx4_ib_xrcd *xrcd;
1316 	struct ib_cq_init_attr cq_attr = {};
1317 	int err;
1318 
1319 	if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1320 		return ERR_PTR(-ENOSYS);
1321 
1322 	xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1323 	if (!xrcd)
1324 		return ERR_PTR(-ENOMEM);
1325 
1326 	err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1327 	if (err)
1328 		goto err1;
1329 
1330 	xrcd->pd = ib_alloc_pd(ibdev, 0);
1331 	if (IS_ERR(xrcd->pd)) {
1332 		err = PTR_ERR(xrcd->pd);
1333 		goto err2;
1334 	}
1335 
1336 	cq_attr.cqe = 1;
1337 	xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1338 	if (IS_ERR(xrcd->cq)) {
1339 		err = PTR_ERR(xrcd->cq);
1340 		goto err3;
1341 	}
1342 
1343 	return &xrcd->ibxrcd;
1344 
1345 err3:
1346 	ib_dealloc_pd(xrcd->pd);
1347 err2:
1348 	mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1349 err1:
1350 	kfree(xrcd);
1351 	return ERR_PTR(err);
1352 }
1353 
1354 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1355 {
1356 	ib_destroy_cq(to_mxrcd(xrcd)->cq);
1357 	ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1358 	mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1359 	kfree(xrcd);
1360 
1361 	return 0;
1362 }
1363 
1364 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1365 {
1366 	struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1367 	struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1368 	struct mlx4_ib_gid_entry *ge;
1369 
1370 	ge = kzalloc(sizeof *ge, GFP_KERNEL);
1371 	if (!ge)
1372 		return -ENOMEM;
1373 
1374 	ge->gid = *gid;
1375 	if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1376 		ge->port = mqp->port;
1377 		ge->added = 1;
1378 	}
1379 
1380 	mutex_lock(&mqp->mutex);
1381 	list_add_tail(&ge->list, &mqp->gid_list);
1382 	mutex_unlock(&mqp->mutex);
1383 
1384 	return 0;
1385 }
1386 
1387 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1388 					  struct mlx4_ib_counters *ctr_table)
1389 {
1390 	struct counter_index *counter, *tmp_count;
1391 
1392 	mutex_lock(&ctr_table->mutex);
1393 	list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1394 				 list) {
1395 		if (counter->allocated)
1396 			mlx4_counter_free(ibdev->dev, counter->index);
1397 		list_del(&counter->list);
1398 		kfree(counter);
1399 	}
1400 	mutex_unlock(&ctr_table->mutex);
1401 }
1402 
1403 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1404 		   union ib_gid *gid)
1405 {
1406 	struct net_device *ndev;
1407 	int ret = 0;
1408 
1409 	if (!mqp->port)
1410 		return 0;
1411 
1412 	spin_lock_bh(&mdev->iboe.lock);
1413 	ndev = mdev->iboe.netdevs[mqp->port - 1];
1414 	if (ndev)
1415 		dev_hold(ndev);
1416 	spin_unlock_bh(&mdev->iboe.lock);
1417 
1418 	if (ndev) {
1419 		ret = 1;
1420 		dev_put(ndev);
1421 	}
1422 
1423 	return ret;
1424 }
1425 
1426 struct mlx4_ib_steering {
1427 	struct list_head list;
1428 	struct mlx4_flow_reg_id reg_id;
1429 	union ib_gid gid;
1430 };
1431 
1432 #define LAST_ETH_FIELD vlan_tag
1433 #define LAST_IB_FIELD sl
1434 #define LAST_IPV4_FIELD dst_ip
1435 #define LAST_TCP_UDP_FIELD src_port
1436 
1437 /* Field is the last supported field */
1438 #define FIELDS_NOT_SUPPORTED(filter, field)\
1439 	memchr_inv((void *)&filter.field  +\
1440 		   sizeof(filter.field), 0,\
1441 		   sizeof(filter) -\
1442 		   offsetof(typeof(filter), field) -\
1443 		   sizeof(filter.field))
1444 
1445 static int parse_flow_attr(struct mlx4_dev *dev,
1446 			   u32 qp_num,
1447 			   union ib_flow_spec *ib_spec,
1448 			   struct _rule_hw *mlx4_spec)
1449 {
1450 	enum mlx4_net_trans_rule_id type;
1451 
1452 	switch (ib_spec->type) {
1453 	case IB_FLOW_SPEC_ETH:
1454 		if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1455 			return -ENOTSUPP;
1456 
1457 		type = MLX4_NET_TRANS_RULE_ID_ETH;
1458 		memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1459 		       ETH_ALEN);
1460 		memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1461 		       ETH_ALEN);
1462 		mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1463 		mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1464 		break;
1465 	case IB_FLOW_SPEC_IB:
1466 		if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1467 			return -ENOTSUPP;
1468 
1469 		type = MLX4_NET_TRANS_RULE_ID_IB;
1470 		mlx4_spec->ib.l3_qpn =
1471 			cpu_to_be32(qp_num);
1472 		mlx4_spec->ib.qpn_mask =
1473 			cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1474 		break;
1475 
1476 
1477 	case IB_FLOW_SPEC_IPV4:
1478 		if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1479 			return -ENOTSUPP;
1480 
1481 		type = MLX4_NET_TRANS_RULE_ID_IPV4;
1482 		mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1483 		mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1484 		mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1485 		mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1486 		break;
1487 
1488 	case IB_FLOW_SPEC_TCP:
1489 	case IB_FLOW_SPEC_UDP:
1490 		if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1491 			return -ENOTSUPP;
1492 
1493 		type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1494 					MLX4_NET_TRANS_RULE_ID_TCP :
1495 					MLX4_NET_TRANS_RULE_ID_UDP;
1496 		mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1497 		mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1498 		mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1499 		mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1500 		break;
1501 
1502 	default:
1503 		return -EINVAL;
1504 	}
1505 	if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1506 	    mlx4_hw_rule_sz(dev, type) < 0)
1507 		return -EINVAL;
1508 	mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1509 	mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1510 	return mlx4_hw_rule_sz(dev, type);
1511 }
1512 
1513 struct default_rules {
1514 	__u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1515 	__u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1516 	__u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1517 	__u8  link_layer;
1518 };
1519 static const struct default_rules default_table[] = {
1520 	{
1521 		.mandatory_fields = {IB_FLOW_SPEC_IPV4},
1522 		.mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1523 		.rules_create_list = {IB_FLOW_SPEC_IB},
1524 		.link_layer = IB_LINK_LAYER_INFINIBAND
1525 	}
1526 };
1527 
1528 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1529 					 struct ib_flow_attr *flow_attr)
1530 {
1531 	int i, j, k;
1532 	void *ib_flow;
1533 	const struct default_rules *pdefault_rules = default_table;
1534 	u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1535 
1536 	for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1537 		__u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1538 		memset(&field_types, 0, sizeof(field_types));
1539 
1540 		if (link_layer != pdefault_rules->link_layer)
1541 			continue;
1542 
1543 		ib_flow = flow_attr + 1;
1544 		/* we assume the specs are sorted */
1545 		for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1546 		     j < flow_attr->num_of_specs; k++) {
1547 			union ib_flow_spec *current_flow =
1548 				(union ib_flow_spec *)ib_flow;
1549 
1550 			/* same layer but different type */
1551 			if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1552 			     (pdefault_rules->mandatory_fields[k] &
1553 			      IB_FLOW_SPEC_LAYER_MASK)) &&
1554 			    (current_flow->type !=
1555 			     pdefault_rules->mandatory_fields[k]))
1556 				goto out;
1557 
1558 			/* same layer, try match next one */
1559 			if (current_flow->type ==
1560 			    pdefault_rules->mandatory_fields[k]) {
1561 				j++;
1562 				ib_flow +=
1563 					((union ib_flow_spec *)ib_flow)->size;
1564 			}
1565 		}
1566 
1567 		ib_flow = flow_attr + 1;
1568 		for (j = 0; j < flow_attr->num_of_specs;
1569 		     j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1570 			for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1571 				/* same layer and same type */
1572 				if (((union ib_flow_spec *)ib_flow)->type ==
1573 				    pdefault_rules->mandatory_not_fields[k])
1574 					goto out;
1575 
1576 		return i;
1577 	}
1578 out:
1579 	return -1;
1580 }
1581 
1582 static int __mlx4_ib_create_default_rules(
1583 		struct mlx4_ib_dev *mdev,
1584 		struct ib_qp *qp,
1585 		const struct default_rules *pdefault_rules,
1586 		struct _rule_hw *mlx4_spec) {
1587 	int size = 0;
1588 	int i;
1589 
1590 	for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1591 		int ret;
1592 		union ib_flow_spec ib_spec;
1593 		switch (pdefault_rules->rules_create_list[i]) {
1594 		case 0:
1595 			/* no rule */
1596 			continue;
1597 		case IB_FLOW_SPEC_IB:
1598 			ib_spec.type = IB_FLOW_SPEC_IB;
1599 			ib_spec.size = sizeof(struct ib_flow_spec_ib);
1600 
1601 			break;
1602 		default:
1603 			/* invalid rule */
1604 			return -EINVAL;
1605 		}
1606 		/* We must put empty rule, qpn is being ignored */
1607 		ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1608 				      mlx4_spec);
1609 		if (ret < 0) {
1610 			pr_info("invalid parsing\n");
1611 			return -EINVAL;
1612 		}
1613 
1614 		mlx4_spec = (void *)mlx4_spec + ret;
1615 		size += ret;
1616 	}
1617 	return size;
1618 }
1619 
1620 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1621 			  int domain,
1622 			  enum mlx4_net_trans_promisc_mode flow_type,
1623 			  u64 *reg_id)
1624 {
1625 	int ret, i;
1626 	int size = 0;
1627 	void *ib_flow;
1628 	struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1629 	struct mlx4_cmd_mailbox *mailbox;
1630 	struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1631 	int default_flow;
1632 
1633 	static const u16 __mlx4_domain[] = {
1634 		[IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1635 		[IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1636 		[IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1637 		[IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1638 	};
1639 
1640 	if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1641 		pr_err("Invalid priority value %d\n", flow_attr->priority);
1642 		return -EINVAL;
1643 	}
1644 
1645 	if (domain >= IB_FLOW_DOMAIN_NUM) {
1646 		pr_err("Invalid domain value %d\n", domain);
1647 		return -EINVAL;
1648 	}
1649 
1650 	if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1651 		return -EINVAL;
1652 
1653 	mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1654 	if (IS_ERR(mailbox))
1655 		return PTR_ERR(mailbox);
1656 	ctrl = mailbox->buf;
1657 
1658 	ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1659 				 flow_attr->priority);
1660 	ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1661 	ctrl->port = flow_attr->port;
1662 	ctrl->qpn = cpu_to_be32(qp->qp_num);
1663 
1664 	ib_flow = flow_attr + 1;
1665 	size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1666 	/* Add default flows */
1667 	default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1668 	if (default_flow >= 0) {
1669 		ret = __mlx4_ib_create_default_rules(
1670 				mdev, qp, default_table + default_flow,
1671 				mailbox->buf + size);
1672 		if (ret < 0) {
1673 			mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1674 			return -EINVAL;
1675 		}
1676 		size += ret;
1677 	}
1678 	for (i = 0; i < flow_attr->num_of_specs; i++) {
1679 		ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1680 				      mailbox->buf + size);
1681 		if (ret < 0) {
1682 			mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1683 			return -EINVAL;
1684 		}
1685 		ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1686 		size += ret;
1687 	}
1688 
1689 	ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1690 			   MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1691 			   MLX4_CMD_WRAPPED);
1692 	if (ret == -ENOMEM)
1693 		pr_err("mcg table is full. Fail to register network rule.\n");
1694 	else if (ret == -ENXIO)
1695 		pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1696 	else if (ret)
1697 		pr_err("Invalid argument. Fail to register network rule.\n");
1698 
1699 	mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1700 	return ret;
1701 }
1702 
1703 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1704 {
1705 	int err;
1706 	err = mlx4_cmd(dev, reg_id, 0, 0,
1707 		       MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1708 		       MLX4_CMD_WRAPPED);
1709 	if (err)
1710 		pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1711 		       (long long)reg_id);
1712 	return err;
1713 }
1714 
1715 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1716 				    u64 *reg_id)
1717 {
1718 	void *ib_flow;
1719 	union ib_flow_spec *ib_spec;
1720 	struct mlx4_dev	*dev = to_mdev(qp->device)->dev;
1721 	int err = 0;
1722 
1723 	if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1724 	    dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1725 		return 0; /* do nothing */
1726 
1727 	ib_flow = flow_attr + 1;
1728 	ib_spec = (union ib_flow_spec *)ib_flow;
1729 
1730 	if (ib_spec->type !=  IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1731 		return 0; /* do nothing */
1732 
1733 	err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1734 				    flow_attr->port, qp->qp_num,
1735 				    MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1736 				    reg_id);
1737 	return err;
1738 }
1739 
1740 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1741 				      struct ib_flow_attr *flow_attr,
1742 				      enum mlx4_net_trans_promisc_mode *type)
1743 {
1744 	int err = 0;
1745 
1746 	if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1747 	    (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1748 	    (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1749 		return -EOPNOTSUPP;
1750 	}
1751 
1752 	if (flow_attr->num_of_specs == 0) {
1753 		type[0] = MLX4_FS_MC_SNIFFER;
1754 		type[1] = MLX4_FS_UC_SNIFFER;
1755 	} else {
1756 		union ib_flow_spec *ib_spec;
1757 
1758 		ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1759 		if (ib_spec->type !=  IB_FLOW_SPEC_ETH)
1760 			return -EINVAL;
1761 
1762 		/* if all is zero than MC and UC */
1763 		if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1764 			type[0] = MLX4_FS_MC_SNIFFER;
1765 			type[1] = MLX4_FS_UC_SNIFFER;
1766 		} else {
1767 			u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1768 					    ib_spec->eth.mask.dst_mac[1],
1769 					    ib_spec->eth.mask.dst_mac[2],
1770 					    ib_spec->eth.mask.dst_mac[3],
1771 					    ib_spec->eth.mask.dst_mac[4],
1772 					    ib_spec->eth.mask.dst_mac[5]};
1773 
1774 			/* Above xor was only on MC bit, non empty mask is valid
1775 			 * only if this bit is set and rest are zero.
1776 			 */
1777 			if (!is_zero_ether_addr(&mac[0]))
1778 				return -EINVAL;
1779 
1780 			if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1781 				type[0] = MLX4_FS_MC_SNIFFER;
1782 			else
1783 				type[0] = MLX4_FS_UC_SNIFFER;
1784 		}
1785 	}
1786 
1787 	return err;
1788 }
1789 
1790 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1791 				    struct ib_flow_attr *flow_attr,
1792 				    int domain)
1793 {
1794 	int err = 0, i = 0, j = 0;
1795 	struct mlx4_ib_flow *mflow;
1796 	enum mlx4_net_trans_promisc_mode type[2];
1797 	struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1798 	int is_bonded = mlx4_is_bonded(dev);
1799 
1800 	if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1801 		return ERR_PTR(-EINVAL);
1802 
1803 	if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1804 	    (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1805 		return ERR_PTR(-EOPNOTSUPP);
1806 
1807 	memset(type, 0, sizeof(type));
1808 
1809 	mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1810 	if (!mflow) {
1811 		err = -ENOMEM;
1812 		goto err_free;
1813 	}
1814 
1815 	switch (flow_attr->type) {
1816 	case IB_FLOW_ATTR_NORMAL:
1817 		/* If dont trap flag (continue match) is set, under specific
1818 		 * condition traffic be replicated to given qp,
1819 		 * without stealing it
1820 		 */
1821 		if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1822 			err = mlx4_ib_add_dont_trap_rule(dev,
1823 							 flow_attr,
1824 							 type);
1825 			if (err)
1826 				goto err_free;
1827 		} else {
1828 			type[0] = MLX4_FS_REGULAR;
1829 		}
1830 		break;
1831 
1832 	case IB_FLOW_ATTR_ALL_DEFAULT:
1833 		type[0] = MLX4_FS_ALL_DEFAULT;
1834 		break;
1835 
1836 	case IB_FLOW_ATTR_MC_DEFAULT:
1837 		type[0] = MLX4_FS_MC_DEFAULT;
1838 		break;
1839 
1840 	case IB_FLOW_ATTR_SNIFFER:
1841 		type[0] = MLX4_FS_MIRROR_RX_PORT;
1842 		type[1] = MLX4_FS_MIRROR_SX_PORT;
1843 		break;
1844 
1845 	default:
1846 		err = -EINVAL;
1847 		goto err_free;
1848 	}
1849 
1850 	while (i < ARRAY_SIZE(type) && type[i]) {
1851 		err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1852 					    &mflow->reg_id[i].id);
1853 		if (err)
1854 			goto err_create_flow;
1855 		if (is_bonded) {
1856 			/* Application always sees one port so the mirror rule
1857 			 * must be on port #2
1858 			 */
1859 			flow_attr->port = 2;
1860 			err = __mlx4_ib_create_flow(qp, flow_attr,
1861 						    domain, type[j],
1862 						    &mflow->reg_id[j].mirror);
1863 			flow_attr->port = 1;
1864 			if (err)
1865 				goto err_create_flow;
1866 			j++;
1867 		}
1868 
1869 		i++;
1870 	}
1871 
1872 	if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1873 		err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1874 					       &mflow->reg_id[i].id);
1875 		if (err)
1876 			goto err_create_flow;
1877 
1878 		if (is_bonded) {
1879 			flow_attr->port = 2;
1880 			err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1881 						       &mflow->reg_id[j].mirror);
1882 			flow_attr->port = 1;
1883 			if (err)
1884 				goto err_create_flow;
1885 			j++;
1886 		}
1887 		/* function to create mirror rule */
1888 		i++;
1889 	}
1890 
1891 	return &mflow->ibflow;
1892 
1893 err_create_flow:
1894 	while (i) {
1895 		(void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1896 					     mflow->reg_id[i].id);
1897 		i--;
1898 	}
1899 
1900 	while (j) {
1901 		(void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1902 					     mflow->reg_id[j].mirror);
1903 		j--;
1904 	}
1905 err_free:
1906 	kfree(mflow);
1907 	return ERR_PTR(err);
1908 }
1909 
1910 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1911 {
1912 	int err, ret = 0;
1913 	int i = 0;
1914 	struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1915 	struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1916 
1917 	while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1918 		err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1919 		if (err)
1920 			ret = err;
1921 		if (mflow->reg_id[i].mirror) {
1922 			err = __mlx4_ib_destroy_flow(mdev->dev,
1923 						     mflow->reg_id[i].mirror);
1924 			if (err)
1925 				ret = err;
1926 		}
1927 		i++;
1928 	}
1929 
1930 	kfree(mflow);
1931 	return ret;
1932 }
1933 
1934 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1935 {
1936 	int err;
1937 	struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1938 	struct mlx4_dev	*dev = mdev->dev;
1939 	struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1940 	struct mlx4_ib_steering *ib_steering = NULL;
1941 	enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1942 	struct mlx4_flow_reg_id	reg_id;
1943 
1944 	if (mdev->dev->caps.steering_mode ==
1945 	    MLX4_STEERING_MODE_DEVICE_MANAGED) {
1946 		ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1947 		if (!ib_steering)
1948 			return -ENOMEM;
1949 	}
1950 
1951 	err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1952 				    !!(mqp->flags &
1953 				       MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1954 				    prot, &reg_id.id);
1955 	if (err) {
1956 		pr_err("multicast attach op failed, err %d\n", err);
1957 		goto err_malloc;
1958 	}
1959 
1960 	reg_id.mirror = 0;
1961 	if (mlx4_is_bonded(dev)) {
1962 		err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1963 					    (mqp->port == 1) ? 2 : 1,
1964 					    !!(mqp->flags &
1965 					    MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1966 					    prot, &reg_id.mirror);
1967 		if (err)
1968 			goto err_add;
1969 	}
1970 
1971 	err = add_gid_entry(ibqp, gid);
1972 	if (err)
1973 		goto err_add;
1974 
1975 	if (ib_steering) {
1976 		memcpy(ib_steering->gid.raw, gid->raw, 16);
1977 		ib_steering->reg_id = reg_id;
1978 		mutex_lock(&mqp->mutex);
1979 		list_add(&ib_steering->list, &mqp->steering_rules);
1980 		mutex_unlock(&mqp->mutex);
1981 	}
1982 	return 0;
1983 
1984 err_add:
1985 	mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1986 			      prot, reg_id.id);
1987 	if (reg_id.mirror)
1988 		mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1989 				      prot, reg_id.mirror);
1990 err_malloc:
1991 	kfree(ib_steering);
1992 
1993 	return err;
1994 }
1995 
1996 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1997 {
1998 	struct mlx4_ib_gid_entry *ge;
1999 	struct mlx4_ib_gid_entry *tmp;
2000 	struct mlx4_ib_gid_entry *ret = NULL;
2001 
2002 	list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
2003 		if (!memcmp(raw, ge->gid.raw, 16)) {
2004 			ret = ge;
2005 			break;
2006 		}
2007 	}
2008 
2009 	return ret;
2010 }
2011 
2012 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
2013 {
2014 	int err;
2015 	struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
2016 	struct mlx4_dev *dev = mdev->dev;
2017 	struct mlx4_ib_qp *mqp = to_mqp(ibqp);
2018 	struct net_device *ndev;
2019 	struct mlx4_ib_gid_entry *ge;
2020 	struct mlx4_flow_reg_id reg_id = {0, 0};
2021 	enum mlx4_protocol prot =  MLX4_PROT_IB_IPV6;
2022 
2023 	if (mdev->dev->caps.steering_mode ==
2024 	    MLX4_STEERING_MODE_DEVICE_MANAGED) {
2025 		struct mlx4_ib_steering *ib_steering;
2026 
2027 		mutex_lock(&mqp->mutex);
2028 		list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
2029 			if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
2030 				list_del(&ib_steering->list);
2031 				break;
2032 			}
2033 		}
2034 		mutex_unlock(&mqp->mutex);
2035 		if (&ib_steering->list == &mqp->steering_rules) {
2036 			pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
2037 			return -EINVAL;
2038 		}
2039 		reg_id = ib_steering->reg_id;
2040 		kfree(ib_steering);
2041 	}
2042 
2043 	err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2044 				    prot, reg_id.id);
2045 	if (err)
2046 		return err;
2047 
2048 	if (mlx4_is_bonded(dev)) {
2049 		err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
2050 					    prot, reg_id.mirror);
2051 		if (err)
2052 			return err;
2053 	}
2054 
2055 	mutex_lock(&mqp->mutex);
2056 	ge = find_gid_entry(mqp, gid->raw);
2057 	if (ge) {
2058 		spin_lock_bh(&mdev->iboe.lock);
2059 		ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
2060 		if (ndev)
2061 			dev_hold(ndev);
2062 		spin_unlock_bh(&mdev->iboe.lock);
2063 		if (ndev)
2064 			dev_put(ndev);
2065 		list_del(&ge->list);
2066 		kfree(ge);
2067 	} else
2068 		pr_warn("could not find mgid entry\n");
2069 
2070 	mutex_unlock(&mqp->mutex);
2071 
2072 	return 0;
2073 }
2074 
2075 static int init_node_data(struct mlx4_ib_dev *dev)
2076 {
2077 	struct ib_smp *in_mad  = NULL;
2078 	struct ib_smp *out_mad = NULL;
2079 	int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2080 	int err = -ENOMEM;
2081 
2082 	in_mad  = kzalloc(sizeof *in_mad, GFP_KERNEL);
2083 	out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2084 	if (!in_mad || !out_mad)
2085 		goto out;
2086 
2087 	init_query_mad(in_mad);
2088 	in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2089 	if (mlx4_is_master(dev->dev))
2090 		mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2091 
2092 	err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2093 	if (err)
2094 		goto out;
2095 
2096 	memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2097 
2098 	in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2099 
2100 	err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2101 	if (err)
2102 		goto out;
2103 
2104 	dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2105 	memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2106 
2107 out:
2108 	kfree(in_mad);
2109 	kfree(out_mad);
2110 	return err;
2111 }
2112 
2113 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
2114 			char *buf)
2115 {
2116 	struct mlx4_ib_dev *dev =
2117 		container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2118 	return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2119 }
2120 
2121 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
2122 			char *buf)
2123 {
2124 	struct mlx4_ib_dev *dev =
2125 		container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2126 	return sprintf(buf, "%x\n", dev->dev->rev_id);
2127 }
2128 
2129 static ssize_t show_board(struct device *device, struct device_attribute *attr,
2130 			  char *buf)
2131 {
2132 	struct mlx4_ib_dev *dev =
2133 		container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2134 	return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2135 		       dev->dev->board_id);
2136 }
2137 
2138 static DEVICE_ATTR(hw_rev,   S_IRUGO, show_rev,    NULL);
2139 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca,    NULL);
2140 static DEVICE_ATTR(board_id, S_IRUGO, show_board,  NULL);
2141 
2142 static struct device_attribute *mlx4_class_attributes[] = {
2143 	&dev_attr_hw_rev,
2144 	&dev_attr_hca_type,
2145 	&dev_attr_board_id
2146 };
2147 
2148 struct diag_counter {
2149 	const char *name;
2150 	u32 offset;
2151 };
2152 
2153 #define DIAG_COUNTER(_name, _offset)			\
2154 	{ .name = #_name, .offset = _offset }
2155 
2156 static const struct diag_counter diag_basic[] = {
2157 	DIAG_COUNTER(rq_num_lle, 0x00),
2158 	DIAG_COUNTER(sq_num_lle, 0x04),
2159 	DIAG_COUNTER(rq_num_lqpoe, 0x08),
2160 	DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2161 	DIAG_COUNTER(rq_num_lpe, 0x18),
2162 	DIAG_COUNTER(sq_num_lpe, 0x1C),
2163 	DIAG_COUNTER(rq_num_wrfe, 0x20),
2164 	DIAG_COUNTER(sq_num_wrfe, 0x24),
2165 	DIAG_COUNTER(sq_num_mwbe, 0x2C),
2166 	DIAG_COUNTER(sq_num_bre, 0x34),
2167 	DIAG_COUNTER(sq_num_rire, 0x44),
2168 	DIAG_COUNTER(rq_num_rire, 0x48),
2169 	DIAG_COUNTER(sq_num_rae, 0x4C),
2170 	DIAG_COUNTER(rq_num_rae, 0x50),
2171 	DIAG_COUNTER(sq_num_roe, 0x54),
2172 	DIAG_COUNTER(sq_num_tree, 0x5C),
2173 	DIAG_COUNTER(sq_num_rree, 0x64),
2174 	DIAG_COUNTER(rq_num_rnr, 0x68),
2175 	DIAG_COUNTER(sq_num_rnr, 0x6C),
2176 	DIAG_COUNTER(rq_num_oos, 0x100),
2177 	DIAG_COUNTER(sq_num_oos, 0x104),
2178 };
2179 
2180 static const struct diag_counter diag_ext[] = {
2181 	DIAG_COUNTER(rq_num_dup, 0x130),
2182 	DIAG_COUNTER(sq_num_to, 0x134),
2183 };
2184 
2185 static const struct diag_counter diag_device_only[] = {
2186 	DIAG_COUNTER(num_cqovf, 0x1A0),
2187 	DIAG_COUNTER(rq_num_udsdprd, 0x118),
2188 };
2189 
2190 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2191 						    u8 port_num)
2192 {
2193 	struct mlx4_ib_dev *dev = to_mdev(ibdev);
2194 	struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2195 
2196 	if (!diag[!!port_num].name)
2197 		return NULL;
2198 
2199 	return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2200 					  diag[!!port_num].num_counters,
2201 					  RDMA_HW_STATS_DEFAULT_LIFESPAN);
2202 }
2203 
2204 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2205 				struct rdma_hw_stats *stats,
2206 				u8 port, int index)
2207 {
2208 	struct mlx4_ib_dev *dev = to_mdev(ibdev);
2209 	struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2210 	u32 hw_value[ARRAY_SIZE(diag_device_only) +
2211 		ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2212 	int ret;
2213 	int i;
2214 
2215 	ret = mlx4_query_diag_counters(dev->dev,
2216 				       MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2217 				       diag[!!port].offset, hw_value,
2218 				       diag[!!port].num_counters, port);
2219 
2220 	if (ret)
2221 		return ret;
2222 
2223 	for (i = 0; i < diag[!!port].num_counters; i++)
2224 		stats->value[i] = hw_value[i];
2225 
2226 	return diag[!!port].num_counters;
2227 }
2228 
2229 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2230 					 const char ***name,
2231 					 u32 **offset,
2232 					 u32 *num,
2233 					 bool port)
2234 {
2235 	u32 num_counters;
2236 
2237 	num_counters = ARRAY_SIZE(diag_basic);
2238 
2239 	if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2240 		num_counters += ARRAY_SIZE(diag_ext);
2241 
2242 	if (!port)
2243 		num_counters += ARRAY_SIZE(diag_device_only);
2244 
2245 	*name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2246 	if (!*name)
2247 		return -ENOMEM;
2248 
2249 	*offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2250 	if (!*offset)
2251 		goto err_name;
2252 
2253 	*num = num_counters;
2254 
2255 	return 0;
2256 
2257 err_name:
2258 	kfree(*name);
2259 	return -ENOMEM;
2260 }
2261 
2262 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2263 				       const char **name,
2264 				       u32 *offset,
2265 				       bool port)
2266 {
2267 	int i;
2268 	int j;
2269 
2270 	for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2271 		name[i] = diag_basic[i].name;
2272 		offset[i] = diag_basic[i].offset;
2273 	}
2274 
2275 	if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2276 		for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2277 			name[j] = diag_ext[i].name;
2278 			offset[j] = diag_ext[i].offset;
2279 		}
2280 	}
2281 
2282 	if (!port) {
2283 		for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2284 			name[j] = diag_device_only[i].name;
2285 			offset[j] = diag_device_only[i].offset;
2286 		}
2287 	}
2288 }
2289 
2290 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2291 {
2292 	struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2293 	int i;
2294 	int ret;
2295 	bool per_port = !!(ibdev->dev->caps.flags2 &
2296 		MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2297 
2298 	if (mlx4_is_slave(ibdev->dev))
2299 		return 0;
2300 
2301 	for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2302 		/* i == 1 means we are building port counters */
2303 		if (i && !per_port)
2304 			continue;
2305 
2306 		ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2307 						    &diag[i].offset,
2308 						    &diag[i].num_counters, i);
2309 		if (ret)
2310 			goto err_alloc;
2311 
2312 		mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2313 					   diag[i].offset, i);
2314 	}
2315 
2316 	ibdev->ib_dev.get_hw_stats	= mlx4_ib_get_hw_stats;
2317 	ibdev->ib_dev.alloc_hw_stats	= mlx4_ib_alloc_hw_stats;
2318 
2319 	return 0;
2320 
2321 err_alloc:
2322 	if (i) {
2323 		kfree(diag[i - 1].name);
2324 		kfree(diag[i - 1].offset);
2325 	}
2326 
2327 	return ret;
2328 }
2329 
2330 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2331 {
2332 	int i;
2333 
2334 	for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2335 		kfree(ibdev->diag_counters[i].offset);
2336 		kfree(ibdev->diag_counters[i].name);
2337 	}
2338 }
2339 
2340 #define MLX4_IB_INVALID_MAC	((u64)-1)
2341 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2342 			       struct net_device *dev,
2343 			       int port)
2344 {
2345 	u64 new_smac = 0;
2346 	u64 release_mac = MLX4_IB_INVALID_MAC;
2347 	struct mlx4_ib_qp *qp;
2348 
2349 	new_smac = mlx4_mac_to_u64(IF_LLADDR(dev));
2350 
2351 	atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2352 
2353 	/* no need for update QP1 and mac registration in non-SRIOV */
2354 	if (!mlx4_is_mfunc(ibdev->dev))
2355 		return;
2356 
2357 	mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2358 	qp = ibdev->qp1_proxy[port - 1];
2359 	if (qp) {
2360 		int new_smac_index;
2361 		u64 old_smac;
2362 		struct mlx4_update_qp_params update_params;
2363 
2364 		mutex_lock(&qp->mutex);
2365 		old_smac = qp->pri.smac;
2366 		if (new_smac == old_smac)
2367 			goto unlock;
2368 
2369 		new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2370 
2371 		if (new_smac_index < 0)
2372 			goto unlock;
2373 
2374 		update_params.smac_index = new_smac_index;
2375 		if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2376 				   &update_params)) {
2377 			release_mac = new_smac;
2378 			goto unlock;
2379 		}
2380 		/* if old port was zero, no mac was yet registered for this QP */
2381 		if (qp->pri.smac_port)
2382 			release_mac = old_smac;
2383 		qp->pri.smac = new_smac;
2384 		qp->pri.smac_port = port;
2385 		qp->pri.smac_index = new_smac_index;
2386 	}
2387 
2388 unlock:
2389 	if (release_mac != MLX4_IB_INVALID_MAC)
2390 		mlx4_unregister_mac(ibdev->dev, port, release_mac);
2391 	if (qp)
2392 		mutex_unlock(&qp->mutex);
2393 	mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2394 }
2395 
2396 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2397 				 struct net_device *dev,
2398 				 unsigned long event)
2399 
2400 {
2401 	struct mlx4_ib_iboe *iboe;
2402 	int update_qps_port = -1;
2403 	int port;
2404 
2405 	iboe = &ibdev->iboe;
2406 
2407 	spin_lock_bh(&iboe->lock);
2408 	mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2409 
2410 		iboe->netdevs[port - 1] =
2411 			mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2412 
2413 		if (dev == iboe->netdevs[port - 1] &&
2414 		    (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2415 		     event == NETDEV_UP || event == NETDEV_CHANGE))
2416 			update_qps_port = port;
2417 
2418 	}
2419 	spin_unlock_bh(&iboe->lock);
2420 
2421 	if (update_qps_port > 0)
2422 		mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2423 }
2424 
2425 static int mlx4_ib_netdev_event(struct notifier_block *this,
2426 				unsigned long event, void *ptr)
2427 {
2428 	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2429 	struct mlx4_ib_dev *ibdev;
2430 
2431 	if (!net_eq(dev_net(dev), &init_net))
2432 		return NOTIFY_DONE;
2433 
2434 	ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2435 	mlx4_ib_scan_netdevs(ibdev, dev, event);
2436 
2437 	return NOTIFY_DONE;
2438 }
2439 
2440 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2441 {
2442 	int port;
2443 	int slave;
2444 	int i;
2445 
2446 	if (mlx4_is_master(ibdev->dev)) {
2447 		for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2448 		     ++slave) {
2449 			for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2450 				for (i = 0;
2451 				     i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2452 				     ++i) {
2453 					ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2454 					/* master has the identity virt2phys pkey mapping */
2455 						(slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2456 							ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2457 					mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2458 							     ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2459 				}
2460 			}
2461 		}
2462 		/* initialize pkey cache */
2463 		for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2464 			for (i = 0;
2465 			     i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2466 			     ++i)
2467 				ibdev->pkeys.phys_pkey_cache[port-1][i] =
2468 					(i) ? 0 : 0xFFFF;
2469 		}
2470 	}
2471 }
2472 
2473 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2474 {
2475 	int i, j, eq = 0, total_eqs = 0;
2476 
2477 	ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2478 				  sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2479 	if (!ibdev->eq_table)
2480 		return;
2481 
2482 	for (i = 1; i <= dev->caps.num_ports; i++) {
2483 		for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2484 		     j++, total_eqs++) {
2485 			if (i > 1 &&  mlx4_is_eq_shared(dev, total_eqs))
2486 				continue;
2487 			ibdev->eq_table[eq] = total_eqs;
2488 			if (!mlx4_assign_eq(dev, i,
2489 					    &ibdev->eq_table[eq]))
2490 				eq++;
2491 			else
2492 				ibdev->eq_table[eq] = -1;
2493 		}
2494 	}
2495 
2496 	for (i = eq; i < dev->caps.num_comp_vectors;
2497 	     ibdev->eq_table[i++] = -1)
2498 		;
2499 
2500 	/* Advertise the new number of EQs to clients */
2501 	ibdev->ib_dev.num_comp_vectors = eq;
2502 }
2503 
2504 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2505 {
2506 	int i;
2507 	int total_eqs = ibdev->ib_dev.num_comp_vectors;
2508 
2509 	/* no eqs were allocated */
2510 	if (!ibdev->eq_table)
2511 		return;
2512 
2513 	/* Reset the advertised EQ number */
2514 	ibdev->ib_dev.num_comp_vectors = 0;
2515 
2516 	for (i = 0; i < total_eqs; i++)
2517 		mlx4_release_eq(dev, ibdev->eq_table[i]);
2518 
2519 	kfree(ibdev->eq_table);
2520 	ibdev->eq_table = NULL;
2521 }
2522 
2523 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2524 			       struct ib_port_immutable *immutable)
2525 {
2526 	struct ib_port_attr attr;
2527 	struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2528 	int err;
2529 
2530 	err = mlx4_ib_query_port(ibdev, port_num, &attr);
2531 	if (err)
2532 		return err;
2533 
2534 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
2535 	immutable->gid_tbl_len = attr.gid_tbl_len;
2536 
2537 	if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2538 		immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2539 	} else {
2540 		if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2541 			immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2542 		if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2543 			immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2544 				RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2545 	}
2546 
2547 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2548 
2549 	return 0;
2550 }
2551 
2552 static void get_fw_ver_str(struct ib_device *device, char *str,
2553 			   size_t str_len)
2554 {
2555 	struct mlx4_ib_dev *dev =
2556 		container_of(device, struct mlx4_ib_dev, ib_dev);
2557 	snprintf(str, str_len, "%d.%d.%d",
2558 		 (int) (dev->dev->caps.fw_ver >> 32),
2559 		 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2560 		 (int) dev->dev->caps.fw_ver & 0xffff);
2561 }
2562 
2563 static void *mlx4_ib_add(struct mlx4_dev *dev)
2564 {
2565 	struct mlx4_ib_dev *ibdev;
2566 	int num_ports;
2567 	int i, j;
2568 	int err;
2569 	struct mlx4_ib_iboe *iboe;
2570 	int ib_num_ports = 0;
2571 	int num_req_counters;
2572 	int allocated;
2573 	u32 counter_index;
2574 	struct counter_index *new_counter_index = NULL;
2575 
2576 	pr_info_once("%s", mlx4_ib_version);
2577 
2578 	num_ports = 0;
2579 	mlx4_foreach_ib_transport_port(i, dev)
2580 		num_ports++;
2581 
2582 	/* No point in registering a device with no ports... */
2583 	if (num_ports == 0)
2584 		return NULL;
2585 
2586 	ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2587 	if (!ibdev) {
2588 		dev_err(&dev->persist->pdev->dev,
2589 			"Device struct alloc failed\n");
2590 		return NULL;
2591 	}
2592 
2593 	iboe = &ibdev->iboe;
2594 
2595 	if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2596 		goto err_dealloc;
2597 
2598 	if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2599 		goto err_pd;
2600 
2601 	ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2602 				 PAGE_SIZE);
2603 	if (!ibdev->uar_map)
2604 		goto err_uar;
2605 	MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2606 
2607 	ibdev->dev = dev;
2608 	ibdev->bond_next_port	= 0;
2609 
2610 	strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2611 	ibdev->ib_dev.owner		= THIS_MODULE;
2612 	ibdev->ib_dev.node_type		= RDMA_NODE_IB_CA;
2613 	ibdev->ib_dev.local_dma_lkey	= dev->caps.reserved_lkey;
2614 	ibdev->num_ports		= num_ports;
2615 	ibdev->ib_dev.phys_port_cnt     = mlx4_is_bonded(dev) ?
2616 						1 : ibdev->num_ports;
2617 	ibdev->ib_dev.num_comp_vectors	= dev->caps.num_comp_vectors;
2618 	ibdev->ib_dev.dma_device	= &dev->persist->pdev->dev;
2619 	ibdev->ib_dev.get_netdev	= mlx4_ib_get_netdev;
2620 	ibdev->ib_dev.add_gid		= mlx4_ib_add_gid;
2621 	ibdev->ib_dev.del_gid		= mlx4_ib_del_gid;
2622 
2623 	if (dev->caps.userspace_caps)
2624 		ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2625 	else
2626 		ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2627 
2628 	ibdev->ib_dev.uverbs_cmd_mask	=
2629 		(1ull << IB_USER_VERBS_CMD_GET_CONTEXT)		|
2630 		(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)	|
2631 		(1ull << IB_USER_VERBS_CMD_QUERY_PORT)		|
2632 		(1ull << IB_USER_VERBS_CMD_ALLOC_PD)		|
2633 		(1ull << IB_USER_VERBS_CMD_DEALLOC_PD)		|
2634 		(1ull << IB_USER_VERBS_CMD_REG_MR)		|
2635 		(1ull << IB_USER_VERBS_CMD_REREG_MR)		|
2636 		(1ull << IB_USER_VERBS_CMD_DEREG_MR)		|
2637 		(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL)	|
2638 		(1ull << IB_USER_VERBS_CMD_CREATE_CQ)		|
2639 		(1ull << IB_USER_VERBS_CMD_RESIZE_CQ)		|
2640 		(1ull << IB_USER_VERBS_CMD_DESTROY_CQ)		|
2641 		(1ull << IB_USER_VERBS_CMD_CREATE_QP)		|
2642 		(1ull << IB_USER_VERBS_CMD_MODIFY_QP)		|
2643 		(1ull << IB_USER_VERBS_CMD_QUERY_QP)		|
2644 		(1ull << IB_USER_VERBS_CMD_DESTROY_QP)		|
2645 		(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)	|
2646 		(1ull << IB_USER_VERBS_CMD_DETACH_MCAST)	|
2647 		(1ull << IB_USER_VERBS_CMD_CREATE_SRQ)		|
2648 		(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)		|
2649 		(1ull << IB_USER_VERBS_CMD_QUERY_SRQ)		|
2650 		(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)		|
2651 		(1ull << IB_USER_VERBS_CMD_CREATE_XSRQ)		|
2652 		(1ull << IB_USER_VERBS_CMD_OPEN_QP);
2653 
2654 	ibdev->ib_dev.query_device	= mlx4_ib_query_device;
2655 	ibdev->ib_dev.query_port	= mlx4_ib_query_port;
2656 	ibdev->ib_dev.get_link_layer	= mlx4_ib_port_link_layer;
2657 	ibdev->ib_dev.query_gid		= mlx4_ib_query_gid;
2658 	ibdev->ib_dev.query_pkey	= mlx4_ib_query_pkey;
2659 	ibdev->ib_dev.modify_device	= mlx4_ib_modify_device;
2660 	ibdev->ib_dev.modify_port	= mlx4_ib_modify_port;
2661 	ibdev->ib_dev.alloc_ucontext	= mlx4_ib_alloc_ucontext;
2662 	ibdev->ib_dev.dealloc_ucontext	= mlx4_ib_dealloc_ucontext;
2663 	ibdev->ib_dev.mmap		= mlx4_ib_mmap;
2664 	ibdev->ib_dev.alloc_pd		= mlx4_ib_alloc_pd;
2665 	ibdev->ib_dev.dealloc_pd	= mlx4_ib_dealloc_pd;
2666 	ibdev->ib_dev.create_ah		= mlx4_ib_create_ah;
2667 	ibdev->ib_dev.query_ah		= mlx4_ib_query_ah;
2668 	ibdev->ib_dev.destroy_ah	= mlx4_ib_destroy_ah;
2669 	ibdev->ib_dev.create_srq	= mlx4_ib_create_srq;
2670 	ibdev->ib_dev.modify_srq	= mlx4_ib_modify_srq;
2671 	ibdev->ib_dev.query_srq		= mlx4_ib_query_srq;
2672 	ibdev->ib_dev.destroy_srq	= mlx4_ib_destroy_srq;
2673 	ibdev->ib_dev.post_srq_recv	= mlx4_ib_post_srq_recv;
2674 	ibdev->ib_dev.create_qp		= mlx4_ib_create_qp;
2675 	ibdev->ib_dev.modify_qp		= mlx4_ib_modify_qp;
2676 	ibdev->ib_dev.query_qp		= mlx4_ib_query_qp;
2677 	ibdev->ib_dev.destroy_qp	= mlx4_ib_destroy_qp;
2678 	ibdev->ib_dev.post_send		= mlx4_ib_post_send;
2679 	ibdev->ib_dev.post_recv		= mlx4_ib_post_recv;
2680 	ibdev->ib_dev.create_cq		= mlx4_ib_create_cq;
2681 	ibdev->ib_dev.modify_cq		= mlx4_ib_modify_cq;
2682 	ibdev->ib_dev.resize_cq		= mlx4_ib_resize_cq;
2683 	ibdev->ib_dev.destroy_cq	= mlx4_ib_destroy_cq;
2684 	ibdev->ib_dev.poll_cq		= mlx4_ib_poll_cq;
2685 	ibdev->ib_dev.req_notify_cq	= mlx4_ib_arm_cq;
2686 	ibdev->ib_dev.get_dma_mr	= mlx4_ib_get_dma_mr;
2687 	ibdev->ib_dev.reg_user_mr	= mlx4_ib_reg_user_mr;
2688 	ibdev->ib_dev.rereg_user_mr	= mlx4_ib_rereg_user_mr;
2689 	ibdev->ib_dev.dereg_mr		= mlx4_ib_dereg_mr;
2690 	ibdev->ib_dev.alloc_mr		= mlx4_ib_alloc_mr;
2691 	ibdev->ib_dev.map_mr_sg		= mlx4_ib_map_mr_sg;
2692 	ibdev->ib_dev.attach_mcast	= mlx4_ib_mcg_attach;
2693 	ibdev->ib_dev.detach_mcast	= mlx4_ib_mcg_detach;
2694 	ibdev->ib_dev.process_mad	= mlx4_ib_process_mad;
2695 	ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2696 	ibdev->ib_dev.get_dev_fw_str    = get_fw_ver_str;
2697 	ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext;
2698 
2699 	if (!mlx4_is_slave(ibdev->dev)) {
2700 		ibdev->ib_dev.alloc_fmr		= mlx4_ib_fmr_alloc;
2701 		ibdev->ib_dev.map_phys_fmr	= mlx4_ib_map_phys_fmr;
2702 		ibdev->ib_dev.unmap_fmr		= mlx4_ib_unmap_fmr;
2703 		ibdev->ib_dev.dealloc_fmr	= mlx4_ib_fmr_dealloc;
2704 	}
2705 
2706 	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2707 	    dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2708 		ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2709 		ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2710 
2711 		ibdev->ib_dev.uverbs_cmd_mask |=
2712 			(1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2713 			(1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2714 	}
2715 
2716 	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2717 		ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2718 		ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2719 		ibdev->ib_dev.uverbs_cmd_mask |=
2720 			(1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2721 			(1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2722 	}
2723 
2724 	if (check_flow_steering_support(dev)) {
2725 		ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2726 		ibdev->ib_dev.create_flow	= mlx4_ib_create_flow;
2727 		ibdev->ib_dev.destroy_flow	= mlx4_ib_destroy_flow;
2728 
2729 		ibdev->ib_dev.uverbs_ex_cmd_mask	|=
2730 			(1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2731 			(1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2732 	}
2733 
2734 	ibdev->ib_dev.uverbs_ex_cmd_mask |=
2735 		(1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2736 		(1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2737 		(1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2738 
2739 	mlx4_ib_alloc_eqs(dev, ibdev);
2740 
2741 	spin_lock_init(&iboe->lock);
2742 
2743 	if (init_node_data(ibdev))
2744 		goto err_map;
2745 	mlx4_init_sl2vl_tbl(ibdev);
2746 
2747 	for (i = 0; i < ibdev->num_ports; ++i) {
2748 		mutex_init(&ibdev->counters_table[i].mutex);
2749 		INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2750 	}
2751 
2752 	num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2753 	for (i = 0; i < num_req_counters; ++i) {
2754 		mutex_init(&ibdev->qp1_proxy_lock[i]);
2755 		allocated = 0;
2756 		if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2757 						IB_LINK_LAYER_ETHERNET) {
2758 			err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2759 			/* if failed to allocate a new counter, use default */
2760 			if (err)
2761 				counter_index =
2762 					mlx4_get_default_counter_index(dev,
2763 								       i + 1);
2764 			else
2765 				allocated = 1;
2766 		} else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2767 			counter_index = mlx4_get_default_counter_index(dev,
2768 								       i + 1);
2769 		}
2770 		new_counter_index = kmalloc(sizeof(*new_counter_index),
2771 					    GFP_KERNEL);
2772 		if (!new_counter_index) {
2773 			if (allocated)
2774 				mlx4_counter_free(ibdev->dev, counter_index);
2775 			goto err_counter;
2776 		}
2777 		new_counter_index->index = counter_index;
2778 		new_counter_index->allocated = allocated;
2779 		list_add_tail(&new_counter_index->list,
2780 			      &ibdev->counters_table[i].counters_list);
2781 		ibdev->counters_table[i].default_counter = counter_index;
2782 		pr_info("counter index %d for port %d allocated %d\n",
2783 			counter_index, i + 1, allocated);
2784 	}
2785 	if (mlx4_is_bonded(dev))
2786 		for (i = 1; i < ibdev->num_ports ; ++i) {
2787 			new_counter_index =
2788 					kmalloc(sizeof(struct counter_index),
2789 						GFP_KERNEL);
2790 			if (!new_counter_index)
2791 				goto err_counter;
2792 			new_counter_index->index = counter_index;
2793 			new_counter_index->allocated = 0;
2794 			list_add_tail(&new_counter_index->list,
2795 				      &ibdev->counters_table[i].counters_list);
2796 			ibdev->counters_table[i].default_counter =
2797 								counter_index;
2798 		}
2799 
2800 	mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2801 		ib_num_ports++;
2802 
2803 	spin_lock_init(&ibdev->sm_lock);
2804 	mutex_init(&ibdev->cap_mask_mutex);
2805 	INIT_LIST_HEAD(&ibdev->qp_list);
2806 	spin_lock_init(&ibdev->reset_flow_resource_lock);
2807 
2808 	if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2809 	    ib_num_ports) {
2810 		ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2811 		err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2812 					    MLX4_IB_UC_STEER_QPN_ALIGN,
2813 					    &ibdev->steer_qpn_base, 0);
2814 		if (err)
2815 			goto err_counter;
2816 
2817 		ibdev->ib_uc_qpns_bitmap =
2818 			kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2819 				sizeof(long),
2820 				GFP_KERNEL);
2821 		if (!ibdev->ib_uc_qpns_bitmap) {
2822 			dev_err(&dev->persist->pdev->dev,
2823 				"bit map alloc failed\n");
2824 			goto err_steer_qp_release;
2825 		}
2826 
2827 		bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2828 
2829 		err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2830 				dev, ibdev->steer_qpn_base,
2831 				ibdev->steer_qpn_base +
2832 				ibdev->steer_qpn_count - 1);
2833 		if (err)
2834 			goto err_steer_free_bitmap;
2835 	}
2836 
2837 	for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2838 		atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2839 
2840 	if (mlx4_ib_alloc_diag_counters(ibdev))
2841 		goto err_steer_free_bitmap;
2842 
2843 	if (ib_register_device(&ibdev->ib_dev, NULL))
2844 		goto err_diag_counters;
2845 
2846 	if (mlx4_ib_mad_init(ibdev))
2847 		goto err_reg;
2848 
2849 	if (mlx4_ib_init_sriov(ibdev))
2850 		goto err_mad;
2851 
2852 	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2853 	    dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2854 		if (!iboe->nb.notifier_call) {
2855 			iboe->nb.notifier_call = mlx4_ib_netdev_event;
2856 			err = register_netdevice_notifier(&iboe->nb);
2857 			if (err) {
2858 				iboe->nb.notifier_call = NULL;
2859 				goto err_notif;
2860 			}
2861 		}
2862 		if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2863 			err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2864 			if (err) {
2865 				goto err_notif;
2866 			}
2867 		}
2868 	}
2869 
2870 	for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2871 		if (device_create_file(&ibdev->ib_dev.dev,
2872 				       mlx4_class_attributes[j]))
2873 			goto err_notif;
2874 	}
2875 
2876 	ibdev->ib_active = true;
2877 
2878 	if (mlx4_is_mfunc(ibdev->dev))
2879 		init_pkeys(ibdev);
2880 
2881 	/* create paravirt contexts for any VFs which are active */
2882 	if (mlx4_is_master(ibdev->dev)) {
2883 		for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2884 			if (j == mlx4_master_func_num(ibdev->dev))
2885 				continue;
2886 			if (mlx4_is_slave_active(ibdev->dev, j))
2887 				do_slave_init(ibdev, j, 1);
2888 		}
2889 	}
2890 	return ibdev;
2891 
2892 err_notif:
2893 	if (ibdev->iboe.nb.notifier_call) {
2894 		if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2895 			pr_warn("failure unregistering notifier\n");
2896 		ibdev->iboe.nb.notifier_call = NULL;
2897 	}
2898 	flush_workqueue(wq);
2899 
2900 	mlx4_ib_close_sriov(ibdev);
2901 
2902 err_mad:
2903 	mlx4_ib_mad_cleanup(ibdev);
2904 
2905 err_reg:
2906 	ib_unregister_device(&ibdev->ib_dev);
2907 
2908 err_diag_counters:
2909 	mlx4_ib_diag_cleanup(ibdev);
2910 
2911 err_steer_free_bitmap:
2912 	kfree(ibdev->ib_uc_qpns_bitmap);
2913 
2914 err_steer_qp_release:
2915 	if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2916 		mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2917 				      ibdev->steer_qpn_count);
2918 err_counter:
2919 	for (i = 0; i < ibdev->num_ports; ++i)
2920 		mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2921 
2922 err_map:
2923 	iounmap(ibdev->uar_map);
2924 
2925 err_uar:
2926 	mlx4_uar_free(dev, &ibdev->priv_uar);
2927 
2928 err_pd:
2929 	mlx4_pd_free(dev, ibdev->priv_pdn);
2930 
2931 err_dealloc:
2932 	ib_dealloc_device(&ibdev->ib_dev);
2933 
2934 	return NULL;
2935 }
2936 
2937 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2938 {
2939 	int offset;
2940 
2941 	WARN_ON(!dev->ib_uc_qpns_bitmap);
2942 
2943 	offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2944 					 dev->steer_qpn_count,
2945 					 get_count_order(count));
2946 	if (offset < 0)
2947 		return offset;
2948 
2949 	*qpn = dev->steer_qpn_base + offset;
2950 	return 0;
2951 }
2952 
2953 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2954 {
2955 	if (!qpn ||
2956 	    dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2957 		return;
2958 
2959 	BUG_ON(qpn < dev->steer_qpn_base);
2960 
2961 	bitmap_release_region(dev->ib_uc_qpns_bitmap,
2962 			      qpn - dev->steer_qpn_base,
2963 			      get_count_order(count));
2964 }
2965 
2966 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2967 			 int is_attach)
2968 {
2969 	int err;
2970 	size_t flow_size;
2971 	struct ib_flow_attr *flow = NULL;
2972 	struct ib_flow_spec_ib *ib_spec;
2973 
2974 	if (is_attach) {
2975 		flow_size = sizeof(struct ib_flow_attr) +
2976 			    sizeof(struct ib_flow_spec_ib);
2977 		flow = kzalloc(flow_size, GFP_KERNEL);
2978 		if (!flow)
2979 			return -ENOMEM;
2980 		flow->port = mqp->port;
2981 		flow->num_of_specs = 1;
2982 		flow->size = flow_size;
2983 		ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2984 		ib_spec->type = IB_FLOW_SPEC_IB;
2985 		ib_spec->size = sizeof(struct ib_flow_spec_ib);
2986 		/* Add an empty rule for IB L2 */
2987 		memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2988 
2989 		err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2990 					    IB_FLOW_DOMAIN_NIC,
2991 					    MLX4_FS_REGULAR,
2992 					    &mqp->reg_id);
2993 	} else {
2994 		err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2995 	}
2996 	kfree(flow);
2997 	return err;
2998 }
2999 
3000 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
3001 {
3002 	struct mlx4_ib_dev *ibdev = ibdev_ptr;
3003 	int p;
3004 
3005 	ibdev->ib_active = false;
3006 	flush_workqueue(wq);
3007 
3008 	mlx4_ib_close_sriov(ibdev);
3009 	mlx4_ib_mad_cleanup(ibdev);
3010 	ib_unregister_device(&ibdev->ib_dev);
3011 	mlx4_ib_diag_cleanup(ibdev);
3012 	if (ibdev->iboe.nb.notifier_call) {
3013 		if (unregister_netdevice_notifier(&ibdev->iboe.nb))
3014 			pr_warn("failure unregistering notifier\n");
3015 		ibdev->iboe.nb.notifier_call = NULL;
3016 	}
3017 
3018 	if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
3019 		mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
3020 				      ibdev->steer_qpn_count);
3021 		kfree(ibdev->ib_uc_qpns_bitmap);
3022 	}
3023 
3024 	iounmap(ibdev->uar_map);
3025 	for (p = 0; p < ibdev->num_ports; ++p)
3026 		mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
3027 
3028 	mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
3029 		mlx4_CLOSE_PORT(dev, p);
3030 
3031 	mlx4_ib_free_eqs(dev, ibdev);
3032 
3033 	mlx4_uar_free(dev, &ibdev->priv_uar);
3034 	mlx4_pd_free(dev, ibdev->priv_pdn);
3035 	ib_dealloc_device(&ibdev->ib_dev);
3036 }
3037 
3038 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
3039 {
3040 	struct mlx4_ib_demux_work **dm = NULL;
3041 	struct mlx4_dev *dev = ibdev->dev;
3042 	int i;
3043 	unsigned long flags;
3044 	struct mlx4_active_ports actv_ports;
3045 	unsigned int ports;
3046 	unsigned int first_port;
3047 
3048 	if (!mlx4_is_master(dev))
3049 		return;
3050 
3051 	actv_ports = mlx4_get_active_ports(dev, slave);
3052 	ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3053 	first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3054 
3055 	dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3056 	if (!dm) {
3057 		pr_err("failed to allocate memory for tunneling qp update\n");
3058 		return;
3059 	}
3060 
3061 	for (i = 0; i < ports; i++) {
3062 		dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3063 		if (!dm[i]) {
3064 			pr_err("failed to allocate memory for tunneling qp update work struct\n");
3065 			while (--i >= 0)
3066 				kfree(dm[i]);
3067 			goto out;
3068 		}
3069 		INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3070 		dm[i]->port = first_port + i + 1;
3071 		dm[i]->slave = slave;
3072 		dm[i]->do_init = do_init;
3073 		dm[i]->dev = ibdev;
3074 	}
3075 	/* initialize or tear down tunnel QPs for the slave */
3076 	spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3077 	if (!ibdev->sriov.is_going_down) {
3078 		for (i = 0; i < ports; i++)
3079 			queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3080 		spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3081 	} else {
3082 		spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3083 		for (i = 0; i < ports; i++)
3084 			kfree(dm[i]);
3085 	}
3086 out:
3087 	kfree(dm);
3088 	return;
3089 }
3090 
3091 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3092 {
3093 	struct mlx4_ib_qp *mqp;
3094 	unsigned long flags_qp;
3095 	unsigned long flags_cq;
3096 	struct mlx4_ib_cq *send_mcq, *recv_mcq;
3097 	struct list_head    cq_notify_list;
3098 	struct mlx4_cq *mcq;
3099 	unsigned long flags;
3100 
3101 	pr_warn("mlx4_ib_handle_catas_error was started\n");
3102 	INIT_LIST_HEAD(&cq_notify_list);
3103 
3104 	/* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3105 	spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3106 
3107 	list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3108 		spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3109 		if (mqp->sq.tail != mqp->sq.head) {
3110 			send_mcq = to_mcq(mqp->ibqp.send_cq);
3111 			spin_lock_irqsave(&send_mcq->lock, flags_cq);
3112 			if (send_mcq->mcq.comp &&
3113 			    mqp->ibqp.send_cq->comp_handler) {
3114 				if (!send_mcq->mcq.reset_notify_added) {
3115 					send_mcq->mcq.reset_notify_added = 1;
3116 					list_add_tail(&send_mcq->mcq.reset_notify,
3117 						      &cq_notify_list);
3118 				}
3119 			}
3120 			spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3121 		}
3122 		spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3123 		/* Now, handle the QP's receive queue */
3124 		spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3125 		/* no handling is needed for SRQ */
3126 		if (!mqp->ibqp.srq) {
3127 			if (mqp->rq.tail != mqp->rq.head) {
3128 				recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3129 				spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3130 				if (recv_mcq->mcq.comp &&
3131 				    mqp->ibqp.recv_cq->comp_handler) {
3132 					if (!recv_mcq->mcq.reset_notify_added) {
3133 						recv_mcq->mcq.reset_notify_added = 1;
3134 						list_add_tail(&recv_mcq->mcq.reset_notify,
3135 							      &cq_notify_list);
3136 					}
3137 				}
3138 				spin_unlock_irqrestore(&recv_mcq->lock,
3139 						       flags_cq);
3140 			}
3141 		}
3142 		spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3143 	}
3144 
3145 	list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3146 		mcq->comp(mcq);
3147 	}
3148 	spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3149 	pr_warn("mlx4_ib_handle_catas_error ended\n");
3150 }
3151 
3152 static void handle_bonded_port_state_event(struct work_struct *work)
3153 {
3154 	struct ib_event_work *ew =
3155 		container_of(work, struct ib_event_work, work);
3156 	struct mlx4_ib_dev *ibdev = ew->ib_dev;
3157 	enum ib_port_state bonded_port_state = IB_PORT_NOP;
3158 	int i;
3159 	struct ib_event ibev;
3160 
3161 	kfree(ew);
3162 	spin_lock_bh(&ibdev->iboe.lock);
3163 	for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3164 		struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3165 		enum ib_port_state curr_port_state;
3166 
3167 		if (!curr_netdev)
3168 			continue;
3169 
3170 		curr_port_state =
3171 			(netif_running(curr_netdev) &&
3172 			 netif_carrier_ok(curr_netdev)) ?
3173 			IB_PORT_ACTIVE : IB_PORT_DOWN;
3174 
3175 		bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3176 			curr_port_state : IB_PORT_ACTIVE;
3177 	}
3178 	spin_unlock_bh(&ibdev->iboe.lock);
3179 
3180 	ibev.device = &ibdev->ib_dev;
3181 	ibev.element.port_num = 1;
3182 	ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3183 		IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3184 
3185 	ib_dispatch_event(&ibev);
3186 }
3187 
3188 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3189 {
3190 	u64 sl2vl;
3191 	int err;
3192 
3193 	err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3194 	if (err) {
3195 		pr_err("Unable to get current sl to vl mapping for port %d.  Using all zeroes (%d)\n",
3196 		       port, err);
3197 		sl2vl = 0;
3198 	}
3199 	atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3200 }
3201 
3202 static void ib_sl2vl_update_work(struct work_struct *work)
3203 {
3204 	struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3205 	struct mlx4_ib_dev *mdev = ew->ib_dev;
3206 	int port = ew->port;
3207 
3208 	mlx4_ib_sl2vl_update(mdev, port);
3209 
3210 	kfree(ew);
3211 }
3212 
3213 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3214 				     int port)
3215 {
3216 	struct ib_event_work *ew;
3217 
3218 	ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3219 	if (ew) {
3220 		INIT_WORK(&ew->work, ib_sl2vl_update_work);
3221 		ew->port = port;
3222 		ew->ib_dev = ibdev;
3223 		queue_work(wq, &ew->work);
3224 	} else {
3225 		pr_err("failed to allocate memory for sl2vl update work\n");
3226 	}
3227 }
3228 
3229 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3230 			  enum mlx4_dev_event event, unsigned long param)
3231 {
3232 	struct ib_event ibev;
3233 	struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3234 	struct mlx4_eqe *eqe = NULL;
3235 	struct ib_event_work *ew;
3236 	int p = 0;
3237 
3238 	if (mlx4_is_bonded(dev) &&
3239 	    ((event == MLX4_DEV_EVENT_PORT_UP) ||
3240 	    (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3241 		ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3242 		if (!ew)
3243 			return;
3244 		INIT_WORK(&ew->work, handle_bonded_port_state_event);
3245 		ew->ib_dev = ibdev;
3246 		queue_work(wq, &ew->work);
3247 		return;
3248 	}
3249 
3250 	if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3251 		eqe = (struct mlx4_eqe *)param;
3252 	else
3253 		p = (int) param;
3254 
3255 	switch (event) {
3256 	case MLX4_DEV_EVENT_PORT_UP:
3257 		if (p > ibdev->num_ports)
3258 			return;
3259 		if (!mlx4_is_slave(dev) &&
3260 		    rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3261 			IB_LINK_LAYER_INFINIBAND) {
3262 			if (mlx4_is_master(dev))
3263 				mlx4_ib_invalidate_all_guid_record(ibdev, p);
3264 			if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3265 			    !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3266 				mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3267 		}
3268 		ibev.event = IB_EVENT_PORT_ACTIVE;
3269 		break;
3270 
3271 	case MLX4_DEV_EVENT_PORT_DOWN:
3272 		if (p > ibdev->num_ports)
3273 			return;
3274 		ibev.event = IB_EVENT_PORT_ERR;
3275 		break;
3276 
3277 	case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3278 		ibdev->ib_active = false;
3279 		ibev.event = IB_EVENT_DEVICE_FATAL;
3280 		mlx4_ib_handle_catas_error(ibdev);
3281 		break;
3282 
3283 	case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3284 		ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3285 		if (!ew) {
3286 			pr_err("failed to allocate memory for events work\n");
3287 			break;
3288 		}
3289 
3290 		INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3291 		memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3292 		ew->ib_dev = ibdev;
3293 		/* need to queue only for port owner, which uses GEN_EQE */
3294 		if (mlx4_is_master(dev))
3295 			queue_work(wq, &ew->work);
3296 		else
3297 			handle_port_mgmt_change_event(&ew->work);
3298 		return;
3299 
3300 	case MLX4_DEV_EVENT_SLAVE_INIT:
3301 		/* here, p is the slave id */
3302 		do_slave_init(ibdev, p, 1);
3303 		if (mlx4_is_master(dev)) {
3304 			int i;
3305 
3306 			for (i = 1; i <= ibdev->num_ports; i++) {
3307 				if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3308 					== IB_LINK_LAYER_INFINIBAND)
3309 					mlx4_ib_slave_alias_guid_event(ibdev,
3310 								       p, i,
3311 								       1);
3312 			}
3313 		}
3314 		return;
3315 
3316 	case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3317 		if (mlx4_is_master(dev)) {
3318 			int i;
3319 
3320 			for (i = 1; i <= ibdev->num_ports; i++) {
3321 				if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3322 					== IB_LINK_LAYER_INFINIBAND)
3323 					mlx4_ib_slave_alias_guid_event(ibdev,
3324 								       p, i,
3325 								       0);
3326 			}
3327 		}
3328 		/* here, p is the slave id */
3329 		do_slave_init(ibdev, p, 0);
3330 		return;
3331 
3332 	default:
3333 		return;
3334 	}
3335 
3336 	ibev.device	      = ibdev_ptr;
3337 	ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3338 
3339 	ib_dispatch_event(&ibev);
3340 }
3341 
3342 static struct mlx4_interface mlx4_ib_interface = {
3343 	.add		= mlx4_ib_add,
3344 	.remove		= mlx4_ib_remove,
3345 	.event		= mlx4_ib_event,
3346 	.protocol	= MLX4_PROT_IB_IPV6,
3347 	.flags		= MLX4_INTFF_BONDING
3348 };
3349 
3350 static int __init mlx4_ib_init(void)
3351 {
3352 	int err;
3353 
3354 	wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3355 	if (!wq)
3356 		return -ENOMEM;
3357 
3358 	err = mlx4_ib_mcg_init();
3359 	if (err)
3360 		goto clean_wq;
3361 
3362 	err = mlx4_register_interface(&mlx4_ib_interface);
3363 	if (err)
3364 		goto clean_mcg;
3365 
3366 	return 0;
3367 
3368 clean_mcg:
3369 	mlx4_ib_mcg_destroy();
3370 
3371 clean_wq:
3372 	destroy_workqueue(wq);
3373 	return err;
3374 }
3375 
3376 static void __exit mlx4_ib_cleanup(void)
3377 {
3378 	mlx4_unregister_interface(&mlx4_ib_interface);
3379 	mlx4_ib_mcg_destroy();
3380 	destroy_workqueue(wq);
3381 }
3382 
3383 module_init_order(mlx4_ib_init, SI_ORDER_MIDDLE);
3384 module_exit(mlx4_ib_cleanup);
3385 
3386 static int
3387 mlx4ib_evhand(module_t mod, int event, void *arg)
3388 {
3389 	return (0);
3390 }
3391 
3392 static moduledata_t mlx4ib_mod = {
3393 	.name = "mlx4ib",
3394 	.evhand = mlx4ib_evhand,
3395 };
3396 
3397 DECLARE_MODULE(mlx4ib, mlx4ib_mod, SI_SUB_LAST, SI_ORDER_ANY);
3398 MODULE_DEPEND(mlx4ib, mlx4, 1, 1, 1);
3399 MODULE_DEPEND(mlx4ib, ibcore, 1, 1, 1);
3400 MODULE_DEPEND(mlx4ib, linuxkpi, 1, 1, 1);
3401