1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #define LINUXKPI_PARAM_PREFIX mlx4_ 35 36 #include <linux/module.h> 37 #include <linux/slab.h> 38 #include <linux/errno.h> 39 #include <linux/etherdevice.h> 40 #include <linux/netdevice.h> 41 #include <linux/if_vlan.h> 42 #include <linux/fs.h> 43 #include <linux/rcupdate.h> 44 #include <linux/notifier.h> 45 #include <linux/delay.h> 46 47 #include <net/ipv6.h> 48 49 #include <rdma/ib_smi.h> 50 #include <rdma/ib_user_verbs.h> 51 #include <rdma/ib_addr.h> 52 #include <rdma/ib_cache.h> 53 54 #include <dev/mlx4/driver.h> 55 #include <dev/mlx4/cmd.h> 56 #include <dev/mlx4/qp.h> 57 #include <linux/sched.h> 58 #include <linux/page.h> 59 #include <linux/printk.h> 60 #include "mlx4_ib.h" 61 #include <rdma/mlx4-abi.h> 62 #include "wc.h" 63 64 #define DRV_NAME MLX4_IB_DRV_NAME 65 #ifndef DRV_VERSION 66 #define DRV_VERSION "3.6.0" 67 #endif 68 #define DRV_RELDATE "December 2020" 69 70 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 71 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 72 #define MLX4_IB_CARD_REV_A0 0xA0 73 74 MODULE_AUTHOR("Roland Dreier"); 75 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 76 MODULE_LICENSE("Dual BSD/GPL"); 77 78 int mlx4_ib_sm_guid_assign = 0; 79 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 80 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 81 82 static const char mlx4_ib_version[] = 83 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 84 DRV_VERSION " (" DRV_RELDATE ")\n"; 85 86 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 87 88 static struct workqueue_struct *wq; 89 90 static void init_query_mad(struct ib_smp *mad) 91 { 92 mad->base_version = 1; 93 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 94 mad->class_version = 1; 95 mad->method = IB_MGMT_METHOD_GET; 96 } 97 98 static int check_flow_steering_support(struct mlx4_dev *dev) 99 { 100 int eth_num_ports = 0; 101 int ib_num_ports = 0; 102 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 104 105 if (dmfs) { 106 int i; 107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 108 eth_num_ports++; 109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 110 ib_num_ports++; 111 dmfs &= (!ib_num_ports || 112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 113 (!eth_num_ports || 114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 115 if (ib_num_ports && mlx4_is_mfunc(dev)) { 116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 117 dmfs = 0; 118 } 119 } 120 return dmfs; 121 } 122 123 static int num_ib_ports(struct mlx4_dev *dev) 124 { 125 int ib_ports = 0; 126 int i; 127 128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 129 ib_ports++; 130 131 return ib_ports; 132 } 133 134 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num) 135 { 136 struct mlx4_ib_dev *ibdev = to_mdev(device); 137 struct net_device *dev; 138 139 rcu_read_lock(); 140 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num); 141 142 #if 0 143 if (dev) { 144 if (mlx4_is_bonded(ibdev->dev)) { 145 struct net_device *upper = NULL; 146 147 upper = netdev_master_upper_dev_get_rcu(dev); 148 if (upper) { 149 struct net_device *active; 150 151 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 152 if (active) 153 dev = active; 154 } 155 } 156 } 157 #endif 158 if (dev) 159 dev_hold(dev); 160 161 rcu_read_unlock(); 162 return dev; 163 } 164 165 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 166 struct mlx4_ib_dev *ibdev, 167 u8 port_num) 168 { 169 struct mlx4_cmd_mailbox *mailbox; 170 int err; 171 struct mlx4_dev *dev = ibdev->dev; 172 int i; 173 union ib_gid *gid_tbl; 174 175 mailbox = mlx4_alloc_cmd_mailbox(dev); 176 if (IS_ERR(mailbox)) 177 return -ENOMEM; 178 179 gid_tbl = mailbox->buf; 180 181 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 182 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 183 184 err = mlx4_cmd(dev, mailbox->dma, 185 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 186 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 187 MLX4_CMD_WRAPPED); 188 if (mlx4_is_bonded(dev)) 189 err += mlx4_cmd(dev, mailbox->dma, 190 MLX4_SET_PORT_GID_TABLE << 8 | 2, 191 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 192 MLX4_CMD_WRAPPED); 193 194 mlx4_free_cmd_mailbox(dev, mailbox); 195 return err; 196 } 197 198 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 199 struct mlx4_ib_dev *ibdev, 200 u8 port_num) 201 { 202 struct mlx4_cmd_mailbox *mailbox; 203 int err; 204 struct mlx4_dev *dev = ibdev->dev; 205 int i; 206 struct { 207 union ib_gid gid; 208 __be32 rsrvd1[2]; 209 __be16 rsrvd2; 210 u8 type; 211 u8 version; 212 __be32 rsrvd3; 213 } *gid_tbl; 214 215 mailbox = mlx4_alloc_cmd_mailbox(dev); 216 if (IS_ERR(mailbox)) 217 return -ENOMEM; 218 219 gid_tbl = mailbox->buf; 220 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 221 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 222 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 223 gid_tbl[i].version = 2; 224 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 225 gid_tbl[i].type = 1; 226 else 227 memset(&gid_tbl[i].gid, 0, 12); 228 } 229 } 230 231 err = mlx4_cmd(dev, mailbox->dma, 232 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 233 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 234 MLX4_CMD_WRAPPED); 235 if (mlx4_is_bonded(dev)) 236 err += mlx4_cmd(dev, mailbox->dma, 237 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 238 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 239 MLX4_CMD_WRAPPED); 240 241 mlx4_free_cmd_mailbox(dev, mailbox); 242 return err; 243 } 244 245 static int mlx4_ib_update_gids(struct gid_entry *gids, 246 struct mlx4_ib_dev *ibdev, 247 u8 port_num) 248 { 249 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 250 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 251 252 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 253 } 254 255 static int mlx4_ib_add_gid(struct ib_device *device, 256 u8 port_num, 257 unsigned int index, 258 const union ib_gid *gid, 259 const struct ib_gid_attr *attr, 260 void **context) 261 { 262 struct mlx4_ib_dev *ibdev = to_mdev(device); 263 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 264 struct mlx4_port_gid_table *port_gid_table; 265 int free = -1, found = -1; 266 int ret = 0; 267 int hw_update = 0; 268 int i; 269 struct gid_entry *gids = NULL; 270 271 if (!rdma_cap_roce_gid_table(device, port_num)) 272 return -EINVAL; 273 274 if (port_num > MLX4_MAX_PORTS) 275 return -EINVAL; 276 277 if (!context) 278 return -EINVAL; 279 280 port_gid_table = &iboe->gids[port_num - 1]; 281 spin_lock_bh(&iboe->lock); 282 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 283 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) && 284 (port_gid_table->gids[i].gid_type == attr->gid_type)) { 285 found = i; 286 break; 287 } 288 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid))) 289 free = i; /* HW has space */ 290 } 291 292 if (found < 0) { 293 if (free < 0) { 294 ret = -ENOSPC; 295 } else { 296 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 297 if (!port_gid_table->gids[free].ctx) { 298 ret = -ENOMEM; 299 } else { 300 *context = port_gid_table->gids[free].ctx; 301 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid)); 302 port_gid_table->gids[free].gid_type = attr->gid_type; 303 port_gid_table->gids[free].ctx->real_index = free; 304 port_gid_table->gids[free].ctx->refcount = 1; 305 hw_update = 1; 306 } 307 } 308 } else { 309 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 310 *context = ctx; 311 ctx->refcount++; 312 } 313 if (!ret && hw_update) { 314 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 315 if (!gids) { 316 ret = -ENOMEM; 317 } else { 318 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 319 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 320 gids[i].gid_type = port_gid_table->gids[i].gid_type; 321 } 322 } 323 } 324 spin_unlock_bh(&iboe->lock); 325 326 if (!ret && hw_update) { 327 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 328 kfree(gids); 329 } 330 331 return ret; 332 } 333 334 static int mlx4_ib_del_gid(struct ib_device *device, 335 u8 port_num, 336 unsigned int index, 337 void **context) 338 { 339 struct gid_cache_context *ctx = *context; 340 struct mlx4_ib_dev *ibdev = to_mdev(device); 341 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 342 struct mlx4_port_gid_table *port_gid_table; 343 int ret = 0; 344 int hw_update = 0; 345 struct gid_entry *gids = NULL; 346 347 if (!rdma_cap_roce_gid_table(device, port_num)) 348 return -EINVAL; 349 350 if (port_num > MLX4_MAX_PORTS) 351 return -EINVAL; 352 353 port_gid_table = &iboe->gids[port_num - 1]; 354 spin_lock_bh(&iboe->lock); 355 if (ctx) { 356 ctx->refcount--; 357 if (!ctx->refcount) { 358 unsigned int real_index = ctx->real_index; 359 360 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid)); 361 kfree(port_gid_table->gids[real_index].ctx); 362 port_gid_table->gids[real_index].ctx = NULL; 363 hw_update = 1; 364 } 365 } 366 if (!ret && hw_update) { 367 int i; 368 369 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 370 if (!gids) { 371 ret = -ENOMEM; 372 } else { 373 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 374 memcpy(&gids[i].gid, 375 &port_gid_table->gids[i].gid, 376 sizeof(union ib_gid)); 377 gids[i].gid_type = 378 port_gid_table->gids[i].gid_type; 379 } 380 } 381 } 382 spin_unlock_bh(&iboe->lock); 383 384 if (!ret && hw_update) { 385 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 386 kfree(gids); 387 } 388 return ret; 389 } 390 391 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 392 u8 port_num, int index) 393 { 394 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 395 struct gid_cache_context *ctx = NULL; 396 union ib_gid gid; 397 struct mlx4_port_gid_table *port_gid_table; 398 int real_index = -EINVAL; 399 int i; 400 int ret; 401 unsigned long flags; 402 struct ib_gid_attr attr; 403 404 if (port_num > MLX4_MAX_PORTS) 405 return -EINVAL; 406 407 if (mlx4_is_bonded(ibdev->dev)) 408 port_num = 1; 409 410 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 411 return index; 412 413 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr); 414 if (ret) 415 return ret; 416 417 if (attr.ndev) 418 dev_put(attr.ndev); 419 420 if (!memcmp(&gid, &zgid, sizeof(gid))) 421 return -EINVAL; 422 423 spin_lock_irqsave(&iboe->lock, flags); 424 port_gid_table = &iboe->gids[port_num - 1]; 425 426 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 427 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) && 428 attr.gid_type == port_gid_table->gids[i].gid_type) { 429 ctx = port_gid_table->gids[i].ctx; 430 break; 431 } 432 if (ctx) 433 real_index = ctx->real_index; 434 spin_unlock_irqrestore(&iboe->lock, flags); 435 return real_index; 436 } 437 438 static int mlx4_ib_query_device(struct ib_device *ibdev, 439 struct ib_device_attr *props, 440 struct ib_udata *uhw) 441 { 442 struct mlx4_ib_dev *dev = to_mdev(ibdev); 443 struct ib_smp *in_mad = NULL; 444 struct ib_smp *out_mad = NULL; 445 int err = -ENOMEM; 446 int have_ib_ports; 447 struct mlx4_uverbs_ex_query_device cmd; 448 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0}; 449 struct mlx4_clock_params clock_params; 450 451 if (uhw->inlen) { 452 if (uhw->inlen < sizeof(cmd)) 453 return -EINVAL; 454 455 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 456 if (err) 457 return err; 458 459 if (cmd.comp_mask) 460 return -EINVAL; 461 462 if (cmd.reserved) 463 return -EINVAL; 464 } 465 466 resp.response_length = offsetof(typeof(resp), response_length) + 467 sizeof(resp.response_length); 468 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 469 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 470 if (!in_mad || !out_mad) 471 goto out; 472 473 init_query_mad(in_mad); 474 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 475 476 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 477 1, NULL, NULL, in_mad, out_mad); 478 if (err) 479 goto out; 480 481 memset(props, 0, sizeof *props); 482 483 have_ib_ports = num_ib_ports(dev->dev); 484 485 props->fw_ver = dev->dev->caps.fw_ver; 486 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 487 IB_DEVICE_PORT_ACTIVE_EVENT | 488 IB_DEVICE_SYS_IMAGE_GUID | 489 IB_DEVICE_RC_RNR_NAK_GEN | 490 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 491 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 492 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 493 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 494 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 495 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 496 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 497 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 498 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 499 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 500 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 501 if (dev->dev->caps.max_gso_sz && 502 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 503 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 504 props->device_cap_flags |= IB_DEVICE_UD_TSO; 505 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 506 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 507 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 508 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 510 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 511 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 512 props->device_cap_flags |= IB_DEVICE_XRC; 513 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 514 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 515 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 517 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 518 else 519 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 520 } 521 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 522 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 523 524 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 525 526 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 527 0xffffff; 528 props->vendor_part_id = dev->dev->persist->pdev->device; 529 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 530 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 531 532 props->max_mr_size = ~0ull; 533 props->page_size_cap = dev->dev->caps.page_size_cap; 534 props->max_qp = dev->dev->quotas.qp; 535 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 536 props->max_sge = min(dev->dev->caps.max_sq_sg, 537 dev->dev->caps.max_rq_sg); 538 props->max_sge_rd = MLX4_MAX_SGE_RD; 539 props->max_cq = dev->dev->quotas.cq; 540 props->max_cqe = dev->dev->caps.max_cqes; 541 props->max_mr = dev->dev->quotas.mpt; 542 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 543 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 544 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 545 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 546 props->max_srq = dev->dev->quotas.srq; 547 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 548 props->max_srq_sge = dev->dev->caps.max_srq_sge; 549 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 550 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 551 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 552 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 553 props->masked_atomic_cap = props->atomic_cap; 554 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 555 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 556 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 557 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 558 props->max_mcast_grp; 559 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps; 560 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 561 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 562 563 if (!mlx4_is_slave(dev->dev)) 564 err = mlx4_get_internal_clock_params(dev->dev, &clock_params); 565 566 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 567 resp.response_length += sizeof(resp.hca_core_clock_offset); 568 if (!err && !mlx4_is_slave(dev->dev)) { 569 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP; 570 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 571 } 572 } 573 574 if (uhw->outlen) { 575 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 576 if (err) 577 goto out; 578 } 579 out: 580 kfree(in_mad); 581 kfree(out_mad); 582 583 return err; 584 } 585 586 static enum rdma_link_layer 587 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 588 { 589 struct mlx4_dev *dev = to_mdev(device)->dev; 590 591 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 592 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 593 } 594 595 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 596 struct ib_port_attr *props, int netw_view) 597 { 598 struct ib_smp *in_mad = NULL; 599 struct ib_smp *out_mad = NULL; 600 int ext_active_speed; 601 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 602 int err = -ENOMEM; 603 604 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 605 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 606 if (!in_mad || !out_mad) 607 goto out; 608 609 init_query_mad(in_mad); 610 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 611 in_mad->attr_mod = cpu_to_be32(port); 612 613 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 614 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 615 616 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 617 in_mad, out_mad); 618 if (err) 619 goto out; 620 621 622 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 623 props->lmc = out_mad->data[34] & 0x7; 624 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 625 props->sm_sl = out_mad->data[36] & 0xf; 626 props->state = out_mad->data[32] & 0xf; 627 props->phys_state = out_mad->data[33] >> 4; 628 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 629 if (netw_view) 630 props->gid_tbl_len = out_mad->data[50]; 631 else 632 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 633 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 634 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 635 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 636 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 637 props->active_width = out_mad->data[31] & 0xf; 638 props->active_speed = out_mad->data[35] >> 4; 639 props->max_mtu = out_mad->data[41] & 0xf; 640 props->active_mtu = out_mad->data[36] >> 4; 641 props->subnet_timeout = out_mad->data[51] & 0x1f; 642 props->max_vl_num = out_mad->data[37] >> 4; 643 props->init_type_reply = out_mad->data[41] >> 4; 644 645 /* Check if extended speeds (EDR/FDR/...) are supported */ 646 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 647 ext_active_speed = out_mad->data[62] >> 4; 648 649 switch (ext_active_speed) { 650 case 1: 651 props->active_speed = IB_SPEED_FDR; 652 break; 653 case 2: 654 props->active_speed = IB_SPEED_EDR; 655 break; 656 } 657 } 658 659 /* If reported active speed is QDR, check if is FDR-10 */ 660 if (props->active_speed == IB_SPEED_QDR) { 661 init_query_mad(in_mad); 662 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 663 in_mad->attr_mod = cpu_to_be32(port); 664 665 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 666 NULL, NULL, in_mad, out_mad); 667 if (err) 668 goto out; 669 670 /* Checking LinkSpeedActive for FDR-10 */ 671 if (out_mad->data[15] & 0x1) 672 props->active_speed = IB_SPEED_FDR10; 673 } 674 675 /* Avoid wrong speed value returned by FW if the IB link is down. */ 676 if (props->state == IB_PORT_DOWN) 677 props->active_speed = IB_SPEED_SDR; 678 679 out: 680 kfree(in_mad); 681 kfree(out_mad); 682 return err; 683 } 684 685 static u8 state_to_phys_state(enum ib_port_state state) 686 { 687 return state == IB_PORT_ACTIVE ? 5 : 3; 688 } 689 690 static int eth_link_query_port(struct ib_device *ibdev, u8 port, 691 struct ib_port_attr *props, int netw_view) 692 { 693 694 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 695 struct mlx4_ib_iboe *iboe = &mdev->iboe; 696 struct net_device *ndev; 697 enum ib_mtu tmp; 698 struct mlx4_cmd_mailbox *mailbox; 699 int err = 0; 700 int is_bonded = mlx4_is_bonded(mdev->dev); 701 702 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 703 if (IS_ERR(mailbox)) 704 return PTR_ERR(mailbox); 705 706 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 707 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 708 MLX4_CMD_WRAPPED); 709 if (err) 710 goto out; 711 712 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ? 713 IB_WIDTH_4X : IB_WIDTH_1X; 714 props->active_speed = IB_SPEED_QDR; 715 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS; 716 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 717 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 718 props->pkey_tbl_len = 1; 719 props->max_mtu = IB_MTU_4096; 720 props->max_vl_num = 2; 721 props->state = IB_PORT_DOWN; 722 props->phys_state = state_to_phys_state(props->state); 723 props->active_mtu = IB_MTU_256; 724 spin_lock_bh(&iboe->lock); 725 ndev = iboe->netdevs[port - 1]; 726 if (ndev && is_bonded) { 727 #if 0 728 rcu_read_lock(); /* required to get upper dev */ 729 ndev = netdev_master_upper_dev_get_rcu(ndev); 730 rcu_read_unlock(); 731 #endif 732 } 733 if (!ndev) 734 goto out_unlock; 735 736 tmp = iboe_get_mtu(ndev->if_mtu); 737 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 738 739 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 740 IB_PORT_ACTIVE : IB_PORT_DOWN; 741 props->phys_state = state_to_phys_state(props->state); 742 out_unlock: 743 spin_unlock_bh(&iboe->lock); 744 out: 745 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 746 return err; 747 } 748 749 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 750 struct ib_port_attr *props, int netw_view) 751 { 752 int err; 753 754 memset(props, 0, sizeof *props); 755 756 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 757 ib_link_query_port(ibdev, port, props, netw_view) : 758 eth_link_query_port(ibdev, port, props, netw_view); 759 760 return err; 761 } 762 763 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 764 struct ib_port_attr *props) 765 { 766 /* returns host view */ 767 return __mlx4_ib_query_port(ibdev, port, props, 0); 768 } 769 770 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 771 union ib_gid *gid, int netw_view) 772 { 773 struct ib_smp *in_mad = NULL; 774 struct ib_smp *out_mad = NULL; 775 int err = -ENOMEM; 776 struct mlx4_ib_dev *dev = to_mdev(ibdev); 777 int clear = 0; 778 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 779 780 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 781 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 782 if (!in_mad || !out_mad) 783 goto out; 784 785 init_query_mad(in_mad); 786 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 787 in_mad->attr_mod = cpu_to_be32(port); 788 789 if (mlx4_is_mfunc(dev->dev) && netw_view) 790 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 791 792 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 793 if (err) 794 goto out; 795 796 memcpy(gid->raw, out_mad->data + 8, 8); 797 798 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 799 if (index) { 800 /* For any index > 0, return the null guid */ 801 err = 0; 802 clear = 1; 803 goto out; 804 } 805 } 806 807 init_query_mad(in_mad); 808 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 809 in_mad->attr_mod = cpu_to_be32(index / 8); 810 811 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 812 NULL, NULL, in_mad, out_mad); 813 if (err) 814 goto out; 815 816 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 817 818 out: 819 if (clear) 820 memset(gid->raw + 8, 0, 8); 821 kfree(in_mad); 822 kfree(out_mad); 823 return err; 824 } 825 826 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 827 union ib_gid *gid) 828 { 829 int ret; 830 831 if (rdma_protocol_ib(ibdev, port)) 832 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 833 834 if (!rdma_protocol_roce(ibdev, port)) 835 return -ENODEV; 836 837 if (!rdma_cap_roce_gid_table(ibdev, port)) 838 return -ENODEV; 839 840 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL); 841 if (ret == -EAGAIN) { 842 memcpy(gid, &zgid, sizeof(*gid)); 843 return 0; 844 } 845 846 return ret; 847 } 848 849 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl) 850 { 851 union sl2vl_tbl_to_u64 sl2vl64; 852 struct ib_smp *in_mad = NULL; 853 struct ib_smp *out_mad = NULL; 854 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 855 int err = -ENOMEM; 856 int jj; 857 858 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 859 *sl2vl_tbl = 0; 860 return 0; 861 } 862 863 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 864 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 865 if (!in_mad || !out_mad) 866 goto out; 867 868 init_query_mad(in_mad); 869 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 870 in_mad->attr_mod = 0; 871 872 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 873 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 874 875 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 876 in_mad, out_mad); 877 if (err) 878 goto out; 879 880 for (jj = 0; jj < 8; jj++) 881 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 882 *sl2vl_tbl = sl2vl64.sl64; 883 884 out: 885 kfree(in_mad); 886 kfree(out_mad); 887 return err; 888 } 889 890 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 891 { 892 u64 sl2vl; 893 int i; 894 int err; 895 896 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 897 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 898 continue; 899 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 900 if (err) { 901 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 902 i, err); 903 sl2vl = 0; 904 } 905 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 906 } 907 } 908 909 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 910 u16 *pkey, int netw_view) 911 { 912 struct ib_smp *in_mad = NULL; 913 struct ib_smp *out_mad = NULL; 914 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 915 int err = -ENOMEM; 916 917 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 918 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 919 if (!in_mad || !out_mad) 920 goto out; 921 922 init_query_mad(in_mad); 923 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 924 in_mad->attr_mod = cpu_to_be32(index / 32); 925 926 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 927 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 928 929 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 930 in_mad, out_mad); 931 if (err) 932 goto out; 933 934 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 935 936 out: 937 kfree(in_mad); 938 kfree(out_mad); 939 return err; 940 } 941 942 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 943 { 944 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 945 } 946 947 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 948 struct ib_device_modify *props) 949 { 950 struct mlx4_cmd_mailbox *mailbox; 951 unsigned long flags; 952 953 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 954 return -EOPNOTSUPP; 955 956 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 957 return 0; 958 959 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 960 return -EOPNOTSUPP; 961 962 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 963 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 964 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 965 966 /* 967 * If possible, pass node desc to FW, so it can generate 968 * a 144 trap. If cmd fails, just ignore. 969 */ 970 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 971 if (IS_ERR(mailbox)) 972 return 0; 973 974 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 975 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 976 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 977 978 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 979 980 return 0; 981 } 982 983 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, 984 u32 cap_mask) 985 { 986 struct mlx4_cmd_mailbox *mailbox; 987 int err; 988 989 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 990 if (IS_ERR(mailbox)) 991 return PTR_ERR(mailbox); 992 993 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 994 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 995 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 996 } else { 997 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 998 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 999 } 1000 1001 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 1002 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1003 MLX4_CMD_WRAPPED); 1004 1005 mlx4_free_cmd_mailbox(dev->dev, mailbox); 1006 return err; 1007 } 1008 1009 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 1010 struct ib_port_modify *props) 1011 { 1012 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1013 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1014 struct ib_port_attr attr; 1015 u32 cap_mask; 1016 int err; 1017 1018 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1019 * of whether port link layer is ETH or IB. For ETH ports, qkey 1020 * violations and port capabilities are not meaningful. 1021 */ 1022 if (is_eth) 1023 return 0; 1024 1025 mutex_lock(&mdev->cap_mask_mutex); 1026 1027 err = mlx4_ib_query_port(ibdev, port, &attr); 1028 if (err) 1029 goto out; 1030 1031 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1032 ~props->clr_port_cap_mask; 1033 1034 err = mlx4_ib_SET_PORT(mdev, port, 1035 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1036 cap_mask); 1037 1038 out: 1039 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1040 return err; 1041 } 1042 1043 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev, 1044 struct ib_udata *udata) 1045 { 1046 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1047 struct mlx4_ib_ucontext *context; 1048 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1049 struct mlx4_ib_alloc_ucontext_resp resp; 1050 int err; 1051 1052 if (!dev->ib_active) 1053 return ERR_PTR(-EAGAIN); 1054 1055 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1056 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1057 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1058 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1059 } else { 1060 resp.dev_caps = dev->dev->caps.userspace_caps; 1061 resp.qp_tab_size = dev->dev->caps.num_qps; 1062 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1063 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1064 resp.cqe_size = dev->dev->caps.cqe_size; 1065 } 1066 1067 context = kzalloc(sizeof(*context), GFP_KERNEL); 1068 if (!context) 1069 return ERR_PTR(-ENOMEM); 1070 1071 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1072 if (err) { 1073 kfree(context); 1074 return ERR_PTR(err); 1075 } 1076 1077 INIT_LIST_HEAD(&context->db_page_list); 1078 mutex_init(&context->db_page_mutex); 1079 1080 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1081 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1082 else 1083 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1084 1085 if (err) { 1086 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1087 kfree(context); 1088 return ERR_PTR(-EFAULT); 1089 } 1090 1091 return &context->ibucontext; 1092 } 1093 1094 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1095 { 1096 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1097 1098 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1099 kfree(context); 1100 1101 return 0; 1102 } 1103 1104 static void mlx4_ib_vma_open(struct vm_area_struct *area) 1105 { 1106 /* vma_open is called when a new VMA is created on top of our VMA. 1107 * This is done through either mremap flow or split_vma (usually due 1108 * to mlock, madvise, munmap, etc.). We do not support a clone of the 1109 * vma, as this VMA is strongly hardware related. Therefore we set the 1110 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from 1111 * calling us again and trying to do incorrect actions. We assume that 1112 * the original vma size is exactly a single page that there will be no 1113 * "splitting" operations on. 1114 */ 1115 area->vm_ops = NULL; 1116 } 1117 1118 static void mlx4_ib_vma_close(struct vm_area_struct *area) 1119 { 1120 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data; 1121 1122 /* It's guaranteed that all VMAs opened on a FD are closed before the 1123 * file itself is closed, therefore no sync is needed with the regular 1124 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync 1125 * with accessing the vma as part of mlx4_ib_disassociate_ucontext. 1126 * The close operation is usually called under mm->mmap_sem except when 1127 * process is exiting. The exiting case is handled explicitly as part 1128 * of mlx4_ib_disassociate_ucontext. 1129 */ 1130 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *) 1131 area->vm_private_data; 1132 1133 /* set the vma context pointer to null in the mlx4_ib driver's private 1134 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext(). 1135 */ 1136 mlx4_ib_vma_priv_data->vma = NULL; 1137 } 1138 1139 static const struct vm_operations_struct mlx4_ib_vm_ops = { 1140 .open = mlx4_ib_vma_open, 1141 .close = mlx4_ib_vma_close 1142 }; 1143 1144 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma, 1145 struct mlx4_ib_vma_private_data *vma_private_data) 1146 { 1147 vma_private_data->vma = vma; 1148 vma->vm_private_data = vma_private_data; 1149 vma->vm_ops = &mlx4_ib_vm_ops; 1150 } 1151 1152 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1153 { 1154 struct mlx4_ib_dev *dev = to_mdev(context->device); 1155 struct mlx4_ib_ucontext *mucontext = to_mucontext(context); 1156 1157 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1158 return -EINVAL; 1159 1160 if (vma->vm_pgoff == 0) { 1161 /* We prevent double mmaping on same context */ 1162 if (mucontext->hw_bar_info[HW_BAR_DB].vma) 1163 return -EINVAL; 1164 1165 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1166 1167 if (io_remap_pfn_range(vma, vma->vm_start, 1168 to_mucontext(context)->uar.pfn, 1169 PAGE_SIZE, vma->vm_page_prot)) 1170 return -EAGAIN; 1171 1172 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]); 1173 1174 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) { 1175 /* We prevent double mmaping on same context */ 1176 if (mucontext->hw_bar_info[HW_BAR_BF].vma) 1177 return -EINVAL; 1178 1179 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 1180 1181 if (io_remap_pfn_range(vma, vma->vm_start, 1182 to_mucontext(context)->uar.pfn + 1183 dev->dev->caps.num_uars, 1184 PAGE_SIZE, vma->vm_page_prot)) 1185 return -EAGAIN; 1186 1187 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]); 1188 1189 } else if (vma->vm_pgoff == 3) { 1190 struct mlx4_clock_params params; 1191 int ret; 1192 1193 /* We prevent double mmaping on same context */ 1194 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma) 1195 return -EINVAL; 1196 1197 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1198 1199 if (ret) 1200 return ret; 1201 1202 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1203 if (io_remap_pfn_range(vma, vma->vm_start, 1204 (pci_resource_start(dev->dev->persist->pdev, 1205 params.bar) + 1206 params.offset) 1207 >> PAGE_SHIFT, 1208 PAGE_SIZE, vma->vm_page_prot)) 1209 return -EAGAIN; 1210 1211 mlx4_ib_set_vma_data(vma, 1212 &mucontext->hw_bar_info[HW_BAR_CLOCK]); 1213 } else { 1214 return -EINVAL; 1215 } 1216 1217 return 0; 1218 } 1219 1220 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev, 1221 struct ib_ucontext *context, 1222 struct ib_udata *udata) 1223 { 1224 struct mlx4_ib_pd *pd; 1225 int err; 1226 1227 pd = kmalloc(sizeof *pd, GFP_KERNEL); 1228 if (!pd) 1229 return ERR_PTR(-ENOMEM); 1230 1231 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1232 if (err) { 1233 kfree(pd); 1234 return ERR_PTR(err); 1235 } 1236 1237 if (context) 1238 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) { 1239 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1240 kfree(pd); 1241 return ERR_PTR(-EFAULT); 1242 } 1243 1244 return &pd->ibpd; 1245 } 1246 1247 static int mlx4_ib_dealloc_pd(struct ib_pd *pd) 1248 { 1249 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1250 kfree(pd); 1251 1252 return 0; 1253 } 1254 1255 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 1256 struct ib_ucontext *context, 1257 struct ib_udata *udata) 1258 { 1259 struct mlx4_ib_xrcd *xrcd; 1260 struct ib_cq_init_attr cq_attr = {}; 1261 int err; 1262 1263 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1264 return ERR_PTR(-ENOSYS); 1265 1266 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 1267 if (!xrcd) 1268 return ERR_PTR(-ENOMEM); 1269 1270 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 1271 if (err) 1272 goto err1; 1273 1274 xrcd->pd = ib_alloc_pd(ibdev, 0); 1275 if (IS_ERR(xrcd->pd)) { 1276 err = PTR_ERR(xrcd->pd); 1277 goto err2; 1278 } 1279 1280 cq_attr.cqe = 1; 1281 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr); 1282 if (IS_ERR(xrcd->cq)) { 1283 err = PTR_ERR(xrcd->cq); 1284 goto err3; 1285 } 1286 1287 return &xrcd->ibxrcd; 1288 1289 err3: 1290 ib_dealloc_pd(xrcd->pd); 1291 err2: 1292 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 1293 err1: 1294 kfree(xrcd); 1295 return ERR_PTR(err); 1296 } 1297 1298 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 1299 { 1300 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1301 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1302 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1303 kfree(xrcd); 1304 1305 return 0; 1306 } 1307 1308 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1309 { 1310 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1311 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1312 struct mlx4_ib_gid_entry *ge; 1313 1314 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1315 if (!ge) 1316 return -ENOMEM; 1317 1318 ge->gid = *gid; 1319 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1320 ge->port = mqp->port; 1321 ge->added = 1; 1322 } 1323 1324 mutex_lock(&mqp->mutex); 1325 list_add_tail(&ge->list, &mqp->gid_list); 1326 mutex_unlock(&mqp->mutex); 1327 1328 return 0; 1329 } 1330 1331 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1332 struct mlx4_ib_counters *ctr_table) 1333 { 1334 struct counter_index *counter, *tmp_count; 1335 1336 mutex_lock(&ctr_table->mutex); 1337 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1338 list) { 1339 if (counter->allocated) 1340 mlx4_counter_free(ibdev->dev, counter->index); 1341 list_del(&counter->list); 1342 kfree(counter); 1343 } 1344 mutex_unlock(&ctr_table->mutex); 1345 } 1346 1347 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1348 union ib_gid *gid) 1349 { 1350 struct net_device *ndev; 1351 int ret = 0; 1352 1353 if (!mqp->port) 1354 return 0; 1355 1356 spin_lock_bh(&mdev->iboe.lock); 1357 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1358 if (ndev) 1359 dev_hold(ndev); 1360 spin_unlock_bh(&mdev->iboe.lock); 1361 1362 if (ndev) { 1363 ret = 1; 1364 dev_put(ndev); 1365 } 1366 1367 return ret; 1368 } 1369 1370 struct mlx4_ib_steering { 1371 struct list_head list; 1372 struct mlx4_flow_reg_id reg_id; 1373 union ib_gid gid; 1374 }; 1375 1376 #define LAST_ETH_FIELD vlan_tag 1377 #define LAST_IB_FIELD sl 1378 #define LAST_IPV4_FIELD dst_ip 1379 #define LAST_TCP_UDP_FIELD src_port 1380 1381 /* Field is the last supported field */ 1382 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1383 memchr_inv((void *)&filter.field +\ 1384 sizeof(filter.field), 0,\ 1385 sizeof(filter) -\ 1386 offsetof(typeof(filter), field) -\ 1387 sizeof(filter.field)) 1388 1389 static int parse_flow_attr(struct mlx4_dev *dev, 1390 u32 qp_num, 1391 union ib_flow_spec *ib_spec, 1392 struct _rule_hw *mlx4_spec) 1393 { 1394 enum mlx4_net_trans_rule_id type; 1395 1396 switch (ib_spec->type) { 1397 case IB_FLOW_SPEC_ETH: 1398 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1399 return -ENOTSUPP; 1400 1401 type = MLX4_NET_TRANS_RULE_ID_ETH; 1402 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1403 ETH_ALEN); 1404 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1405 ETH_ALEN); 1406 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1407 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1408 break; 1409 case IB_FLOW_SPEC_IB: 1410 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1411 return -ENOTSUPP; 1412 1413 type = MLX4_NET_TRANS_RULE_ID_IB; 1414 mlx4_spec->ib.l3_qpn = 1415 cpu_to_be32(qp_num); 1416 mlx4_spec->ib.qpn_mask = 1417 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1418 break; 1419 1420 1421 case IB_FLOW_SPEC_IPV4: 1422 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1423 return -ENOTSUPP; 1424 1425 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1426 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1427 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1428 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1429 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1430 break; 1431 1432 case IB_FLOW_SPEC_TCP: 1433 case IB_FLOW_SPEC_UDP: 1434 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1435 return -ENOTSUPP; 1436 1437 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1438 MLX4_NET_TRANS_RULE_ID_TCP : 1439 MLX4_NET_TRANS_RULE_ID_UDP; 1440 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1441 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1442 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1443 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1444 break; 1445 1446 default: 1447 return -EINVAL; 1448 } 1449 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1450 mlx4_hw_rule_sz(dev, type) < 0) 1451 return -EINVAL; 1452 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1453 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1454 return mlx4_hw_rule_sz(dev, type); 1455 } 1456 1457 struct default_rules { 1458 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1459 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1460 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1461 __u8 link_layer; 1462 }; 1463 static const struct default_rules default_table[] = { 1464 { 1465 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1466 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1467 .rules_create_list = {IB_FLOW_SPEC_IB}, 1468 .link_layer = IB_LINK_LAYER_INFINIBAND 1469 } 1470 }; 1471 1472 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1473 struct ib_flow_attr *flow_attr) 1474 { 1475 int i, j, k; 1476 void *ib_flow; 1477 const struct default_rules *pdefault_rules = default_table; 1478 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1479 1480 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1481 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1482 memset(&field_types, 0, sizeof(field_types)); 1483 1484 if (link_layer != pdefault_rules->link_layer) 1485 continue; 1486 1487 ib_flow = flow_attr + 1; 1488 /* we assume the specs are sorted */ 1489 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1490 j < flow_attr->num_of_specs; k++) { 1491 union ib_flow_spec *current_flow = 1492 (union ib_flow_spec *)ib_flow; 1493 1494 /* same layer but different type */ 1495 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1496 (pdefault_rules->mandatory_fields[k] & 1497 IB_FLOW_SPEC_LAYER_MASK)) && 1498 (current_flow->type != 1499 pdefault_rules->mandatory_fields[k])) 1500 goto out; 1501 1502 /* same layer, try match next one */ 1503 if (current_flow->type == 1504 pdefault_rules->mandatory_fields[k]) { 1505 j++; 1506 ib_flow += 1507 ((union ib_flow_spec *)ib_flow)->size; 1508 } 1509 } 1510 1511 ib_flow = flow_attr + 1; 1512 for (j = 0; j < flow_attr->num_of_specs; 1513 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1514 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1515 /* same layer and same type */ 1516 if (((union ib_flow_spec *)ib_flow)->type == 1517 pdefault_rules->mandatory_not_fields[k]) 1518 goto out; 1519 1520 return i; 1521 } 1522 out: 1523 return -1; 1524 } 1525 1526 static int __mlx4_ib_create_default_rules( 1527 struct mlx4_ib_dev *mdev, 1528 struct ib_qp *qp, 1529 const struct default_rules *pdefault_rules, 1530 struct _rule_hw *mlx4_spec) { 1531 int size = 0; 1532 int i; 1533 1534 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1535 int ret; 1536 union ib_flow_spec ib_spec; 1537 switch (pdefault_rules->rules_create_list[i]) { 1538 case 0: 1539 /* no rule */ 1540 continue; 1541 case IB_FLOW_SPEC_IB: 1542 ib_spec.type = IB_FLOW_SPEC_IB; 1543 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1544 1545 break; 1546 default: 1547 /* invalid rule */ 1548 return -EINVAL; 1549 } 1550 /* We must put empty rule, qpn is being ignored */ 1551 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1552 mlx4_spec); 1553 if (ret < 0) { 1554 pr_info("invalid parsing\n"); 1555 return -EINVAL; 1556 } 1557 1558 mlx4_spec = (void *)mlx4_spec + ret; 1559 size += ret; 1560 } 1561 return size; 1562 } 1563 1564 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1565 int domain, 1566 enum mlx4_net_trans_promisc_mode flow_type, 1567 u64 *reg_id) 1568 { 1569 int ret, i; 1570 int size = 0; 1571 void *ib_flow; 1572 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1573 struct mlx4_cmd_mailbox *mailbox; 1574 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1575 int default_flow; 1576 1577 static const u16 __mlx4_domain[] = { 1578 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 1579 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL, 1580 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS, 1581 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC, 1582 }; 1583 1584 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1585 pr_err("Invalid priority value %d\n", flow_attr->priority); 1586 return -EINVAL; 1587 } 1588 1589 if (domain >= IB_FLOW_DOMAIN_NUM) { 1590 pr_err("Invalid domain value %d\n", domain); 1591 return -EINVAL; 1592 } 1593 1594 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1595 return -EINVAL; 1596 1597 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1598 if (IS_ERR(mailbox)) 1599 return PTR_ERR(mailbox); 1600 ctrl = mailbox->buf; 1601 1602 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 1603 flow_attr->priority); 1604 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1605 ctrl->port = flow_attr->port; 1606 ctrl->qpn = cpu_to_be32(qp->qp_num); 1607 1608 ib_flow = flow_attr + 1; 1609 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1610 /* Add default flows */ 1611 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1612 if (default_flow >= 0) { 1613 ret = __mlx4_ib_create_default_rules( 1614 mdev, qp, default_table + default_flow, 1615 mailbox->buf + size); 1616 if (ret < 0) { 1617 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1618 return -EINVAL; 1619 } 1620 size += ret; 1621 } 1622 for (i = 0; i < flow_attr->num_of_specs; i++) { 1623 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1624 mailbox->buf + size); 1625 if (ret < 0) { 1626 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1627 return -EINVAL; 1628 } 1629 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1630 size += ret; 1631 } 1632 1633 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1634 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1635 MLX4_CMD_WRAPPED); 1636 if (ret == -ENOMEM) 1637 pr_err("mcg table is full. Fail to register network rule.\n"); 1638 else if (ret == -ENXIO) 1639 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1640 else if (ret) 1641 pr_err("Invalid argument. Fail to register network rule.\n"); 1642 1643 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1644 return ret; 1645 } 1646 1647 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1648 { 1649 int err; 1650 err = mlx4_cmd(dev, reg_id, 0, 0, 1651 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1652 MLX4_CMD_WRAPPED); 1653 if (err) 1654 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1655 (long long)reg_id); 1656 return err; 1657 } 1658 1659 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1660 u64 *reg_id) 1661 { 1662 void *ib_flow; 1663 union ib_flow_spec *ib_spec; 1664 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1665 int err = 0; 1666 1667 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1668 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1669 return 0; /* do nothing */ 1670 1671 ib_flow = flow_attr + 1; 1672 ib_spec = (union ib_flow_spec *)ib_flow; 1673 1674 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1675 return 0; /* do nothing */ 1676 1677 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1678 flow_attr->port, qp->qp_num, 1679 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1680 reg_id); 1681 return err; 1682 } 1683 1684 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1685 struct ib_flow_attr *flow_attr, 1686 enum mlx4_net_trans_promisc_mode *type) 1687 { 1688 int err = 0; 1689 1690 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1691 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1692 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1693 return -EOPNOTSUPP; 1694 } 1695 1696 if (flow_attr->num_of_specs == 0) { 1697 type[0] = MLX4_FS_MC_SNIFFER; 1698 type[1] = MLX4_FS_UC_SNIFFER; 1699 } else { 1700 union ib_flow_spec *ib_spec; 1701 1702 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1703 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1704 return -EINVAL; 1705 1706 /* if all is zero than MC and UC */ 1707 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1708 type[0] = MLX4_FS_MC_SNIFFER; 1709 type[1] = MLX4_FS_UC_SNIFFER; 1710 } else { 1711 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1712 ib_spec->eth.mask.dst_mac[1], 1713 ib_spec->eth.mask.dst_mac[2], 1714 ib_spec->eth.mask.dst_mac[3], 1715 ib_spec->eth.mask.dst_mac[4], 1716 ib_spec->eth.mask.dst_mac[5]}; 1717 1718 /* Above xor was only on MC bit, non empty mask is valid 1719 * only if this bit is set and rest are zero. 1720 */ 1721 if (!is_zero_ether_addr(&mac[0])) 1722 return -EINVAL; 1723 1724 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1725 type[0] = MLX4_FS_MC_SNIFFER; 1726 else 1727 type[0] = MLX4_FS_UC_SNIFFER; 1728 } 1729 } 1730 1731 return err; 1732 } 1733 1734 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1735 struct ib_flow_attr *flow_attr, 1736 int domain) 1737 { 1738 int err = 0, i = 0, j = 0; 1739 struct mlx4_ib_flow *mflow; 1740 enum mlx4_net_trans_promisc_mode type[2]; 1741 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1742 int is_bonded = mlx4_is_bonded(dev); 1743 1744 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt) 1745 return ERR_PTR(-EINVAL); 1746 1747 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1748 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1749 return ERR_PTR(-EOPNOTSUPP); 1750 1751 memset(type, 0, sizeof(type)); 1752 1753 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1754 if (!mflow) { 1755 err = -ENOMEM; 1756 goto err_free; 1757 } 1758 1759 switch (flow_attr->type) { 1760 case IB_FLOW_ATTR_NORMAL: 1761 /* If dont trap flag (continue match) is set, under specific 1762 * condition traffic be replicated to given qp, 1763 * without stealing it 1764 */ 1765 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1766 err = mlx4_ib_add_dont_trap_rule(dev, 1767 flow_attr, 1768 type); 1769 if (err) 1770 goto err_free; 1771 } else { 1772 type[0] = MLX4_FS_REGULAR; 1773 } 1774 break; 1775 1776 case IB_FLOW_ATTR_ALL_DEFAULT: 1777 type[0] = MLX4_FS_ALL_DEFAULT; 1778 break; 1779 1780 case IB_FLOW_ATTR_MC_DEFAULT: 1781 type[0] = MLX4_FS_MC_DEFAULT; 1782 break; 1783 1784 case IB_FLOW_ATTR_SNIFFER: 1785 type[0] = MLX4_FS_MIRROR_RX_PORT; 1786 type[1] = MLX4_FS_MIRROR_SX_PORT; 1787 break; 1788 1789 default: 1790 err = -EINVAL; 1791 goto err_free; 1792 } 1793 1794 while (i < ARRAY_SIZE(type) && type[i]) { 1795 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i], 1796 &mflow->reg_id[i].id); 1797 if (err) 1798 goto err_create_flow; 1799 if (is_bonded) { 1800 /* Application always sees one port so the mirror rule 1801 * must be on port #2 1802 */ 1803 flow_attr->port = 2; 1804 err = __mlx4_ib_create_flow(qp, flow_attr, 1805 domain, type[j], 1806 &mflow->reg_id[j].mirror); 1807 flow_attr->port = 1; 1808 if (err) 1809 goto err_create_flow; 1810 j++; 1811 } 1812 1813 i++; 1814 } 1815 1816 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1817 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1818 &mflow->reg_id[i].id); 1819 if (err) 1820 goto err_create_flow; 1821 1822 if (is_bonded) { 1823 flow_attr->port = 2; 1824 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1825 &mflow->reg_id[j].mirror); 1826 flow_attr->port = 1; 1827 if (err) 1828 goto err_create_flow; 1829 j++; 1830 } 1831 /* function to create mirror rule */ 1832 i++; 1833 } 1834 1835 return &mflow->ibflow; 1836 1837 err_create_flow: 1838 while (i) { 1839 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1840 mflow->reg_id[i].id); 1841 i--; 1842 } 1843 1844 while (j) { 1845 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1846 mflow->reg_id[j].mirror); 1847 j--; 1848 } 1849 err_free: 1850 kfree(mflow); 1851 return ERR_PTR(err); 1852 } 1853 1854 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1855 { 1856 int err, ret = 0; 1857 int i = 0; 1858 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1859 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1860 1861 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1862 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1863 if (err) 1864 ret = err; 1865 if (mflow->reg_id[i].mirror) { 1866 err = __mlx4_ib_destroy_flow(mdev->dev, 1867 mflow->reg_id[i].mirror); 1868 if (err) 1869 ret = err; 1870 } 1871 i++; 1872 } 1873 1874 kfree(mflow); 1875 return ret; 1876 } 1877 1878 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1879 { 1880 int err; 1881 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1882 struct mlx4_dev *dev = mdev->dev; 1883 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1884 struct mlx4_ib_steering *ib_steering = NULL; 1885 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1886 struct mlx4_flow_reg_id reg_id; 1887 1888 if (mdev->dev->caps.steering_mode == 1889 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1890 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1891 if (!ib_steering) 1892 return -ENOMEM; 1893 } 1894 1895 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1896 !!(mqp->flags & 1897 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1898 prot, ®_id.id); 1899 if (err) { 1900 pr_err("multicast attach op failed, err %d\n", err); 1901 goto err_malloc; 1902 } 1903 1904 reg_id.mirror = 0; 1905 if (mlx4_is_bonded(dev)) { 1906 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1907 (mqp->port == 1) ? 2 : 1, 1908 !!(mqp->flags & 1909 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1910 prot, ®_id.mirror); 1911 if (err) 1912 goto err_add; 1913 } 1914 1915 err = add_gid_entry(ibqp, gid); 1916 if (err) 1917 goto err_add; 1918 1919 if (ib_steering) { 1920 memcpy(ib_steering->gid.raw, gid->raw, 16); 1921 ib_steering->reg_id = reg_id; 1922 mutex_lock(&mqp->mutex); 1923 list_add(&ib_steering->list, &mqp->steering_rules); 1924 mutex_unlock(&mqp->mutex); 1925 } 1926 return 0; 1927 1928 err_add: 1929 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1930 prot, reg_id.id); 1931 if (reg_id.mirror) 1932 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1933 prot, reg_id.mirror); 1934 err_malloc: 1935 kfree(ib_steering); 1936 1937 return err; 1938 } 1939 1940 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1941 { 1942 struct mlx4_ib_gid_entry *ge; 1943 struct mlx4_ib_gid_entry *tmp; 1944 struct mlx4_ib_gid_entry *ret = NULL; 1945 1946 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1947 if (!memcmp(raw, ge->gid.raw, 16)) { 1948 ret = ge; 1949 break; 1950 } 1951 } 1952 1953 return ret; 1954 } 1955 1956 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1957 { 1958 int err; 1959 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1960 struct mlx4_dev *dev = mdev->dev; 1961 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1962 struct net_device *ndev; 1963 struct mlx4_ib_gid_entry *ge; 1964 struct mlx4_flow_reg_id reg_id = {0, 0}; 1965 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1966 1967 if (mdev->dev->caps.steering_mode == 1968 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1969 struct mlx4_ib_steering *ib_steering; 1970 1971 mutex_lock(&mqp->mutex); 1972 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 1973 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 1974 list_del(&ib_steering->list); 1975 break; 1976 } 1977 } 1978 mutex_unlock(&mqp->mutex); 1979 if (&ib_steering->list == &mqp->steering_rules) { 1980 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 1981 return -EINVAL; 1982 } 1983 reg_id = ib_steering->reg_id; 1984 kfree(ib_steering); 1985 } 1986 1987 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1988 prot, reg_id.id); 1989 if (err) 1990 return err; 1991 1992 if (mlx4_is_bonded(dev)) { 1993 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1994 prot, reg_id.mirror); 1995 if (err) 1996 return err; 1997 } 1998 1999 mutex_lock(&mqp->mutex); 2000 ge = find_gid_entry(mqp, gid->raw); 2001 if (ge) { 2002 spin_lock_bh(&mdev->iboe.lock); 2003 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 2004 if (ndev) 2005 dev_hold(ndev); 2006 spin_unlock_bh(&mdev->iboe.lock); 2007 if (ndev) 2008 dev_put(ndev); 2009 list_del(&ge->list); 2010 kfree(ge); 2011 } else 2012 pr_warn("could not find mgid entry\n"); 2013 2014 mutex_unlock(&mqp->mutex); 2015 2016 return 0; 2017 } 2018 2019 static int init_node_data(struct mlx4_ib_dev *dev) 2020 { 2021 struct ib_smp *in_mad = NULL; 2022 struct ib_smp *out_mad = NULL; 2023 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 2024 int err = -ENOMEM; 2025 2026 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 2027 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 2028 if (!in_mad || !out_mad) 2029 goto out; 2030 2031 init_query_mad(in_mad); 2032 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 2033 if (mlx4_is_master(dev->dev)) 2034 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 2035 2036 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2037 if (err) 2038 goto out; 2039 2040 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 2041 2042 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 2043 2044 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2045 if (err) 2046 goto out; 2047 2048 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2049 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2050 2051 out: 2052 kfree(in_mad); 2053 kfree(out_mad); 2054 return err; 2055 } 2056 2057 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 2058 char *buf) 2059 { 2060 struct mlx4_ib_dev *dev = 2061 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2062 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device); 2063 } 2064 2065 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 2066 char *buf) 2067 { 2068 struct mlx4_ib_dev *dev = 2069 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2070 return sprintf(buf, "%x\n", dev->dev->rev_id); 2071 } 2072 2073 static ssize_t show_board(struct device *device, struct device_attribute *attr, 2074 char *buf) 2075 { 2076 struct mlx4_ib_dev *dev = 2077 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2078 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN, 2079 dev->dev->board_id); 2080 } 2081 2082 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 2083 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 2084 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 2085 2086 static struct device_attribute *mlx4_class_attributes[] = { 2087 &dev_attr_hw_rev, 2088 &dev_attr_hca_type, 2089 &dev_attr_board_id 2090 }; 2091 2092 struct diag_counter { 2093 const char *name; 2094 u32 offset; 2095 }; 2096 2097 #define DIAG_COUNTER(_name, _offset) \ 2098 { .name = #_name, .offset = _offset } 2099 2100 static const struct diag_counter diag_basic[] = { 2101 DIAG_COUNTER(rq_num_lle, 0x00), 2102 DIAG_COUNTER(sq_num_lle, 0x04), 2103 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2104 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2105 DIAG_COUNTER(rq_num_lpe, 0x18), 2106 DIAG_COUNTER(sq_num_lpe, 0x1C), 2107 DIAG_COUNTER(rq_num_wrfe, 0x20), 2108 DIAG_COUNTER(sq_num_wrfe, 0x24), 2109 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2110 DIAG_COUNTER(sq_num_bre, 0x34), 2111 DIAG_COUNTER(sq_num_rire, 0x44), 2112 DIAG_COUNTER(rq_num_rire, 0x48), 2113 DIAG_COUNTER(sq_num_rae, 0x4C), 2114 DIAG_COUNTER(rq_num_rae, 0x50), 2115 DIAG_COUNTER(sq_num_roe, 0x54), 2116 DIAG_COUNTER(sq_num_tree, 0x5C), 2117 DIAG_COUNTER(sq_num_rree, 0x64), 2118 DIAG_COUNTER(rq_num_rnr, 0x68), 2119 DIAG_COUNTER(sq_num_rnr, 0x6C), 2120 DIAG_COUNTER(rq_num_oos, 0x100), 2121 DIAG_COUNTER(sq_num_oos, 0x104), 2122 }; 2123 2124 static const struct diag_counter diag_ext[] = { 2125 DIAG_COUNTER(rq_num_dup, 0x130), 2126 DIAG_COUNTER(sq_num_to, 0x134), 2127 }; 2128 2129 static const struct diag_counter diag_device_only[] = { 2130 DIAG_COUNTER(num_cqovf, 0x1A0), 2131 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2132 }; 2133 2134 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev, 2135 u8 port_num) 2136 { 2137 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2138 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2139 2140 if (!diag[!!port_num].name) 2141 return NULL; 2142 2143 return rdma_alloc_hw_stats_struct(diag[!!port_num].name, 2144 diag[!!port_num].num_counters, 2145 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2146 } 2147 2148 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2149 struct rdma_hw_stats *stats, 2150 u8 port, int index) 2151 { 2152 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2153 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2154 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2155 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2156 int ret; 2157 int i; 2158 2159 ret = mlx4_query_diag_counters(dev->dev, 2160 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2161 diag[!!port].offset, hw_value, 2162 diag[!!port].num_counters, port); 2163 2164 if (ret) 2165 return ret; 2166 2167 for (i = 0; i < diag[!!port].num_counters; i++) 2168 stats->value[i] = hw_value[i]; 2169 2170 return diag[!!port].num_counters; 2171 } 2172 2173 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2174 const char ***name, 2175 u32 **offset, 2176 u32 *num, 2177 bool port) 2178 { 2179 u32 num_counters; 2180 2181 num_counters = ARRAY_SIZE(diag_basic); 2182 2183 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2184 num_counters += ARRAY_SIZE(diag_ext); 2185 2186 if (!port) 2187 num_counters += ARRAY_SIZE(diag_device_only); 2188 2189 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL); 2190 if (!*name) 2191 return -ENOMEM; 2192 2193 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2194 if (!*offset) 2195 goto err_name; 2196 2197 *num = num_counters; 2198 2199 return 0; 2200 2201 err_name: 2202 kfree(*name); 2203 return -ENOMEM; 2204 } 2205 2206 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2207 const char **name, 2208 u32 *offset, 2209 bool port) 2210 { 2211 int i; 2212 int j; 2213 2214 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2215 name[i] = diag_basic[i].name; 2216 offset[i] = diag_basic[i].offset; 2217 } 2218 2219 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2220 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2221 name[j] = diag_ext[i].name; 2222 offset[j] = diag_ext[i].offset; 2223 } 2224 } 2225 2226 if (!port) { 2227 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2228 name[j] = diag_device_only[i].name; 2229 offset[j] = diag_device_only[i].offset; 2230 } 2231 } 2232 } 2233 2234 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2235 { 2236 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2237 int i; 2238 int ret; 2239 bool per_port = !!(ibdev->dev->caps.flags2 & 2240 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2241 2242 if (mlx4_is_slave(ibdev->dev)) 2243 return 0; 2244 2245 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2246 /* i == 1 means we are building port counters */ 2247 if (i && !per_port) 2248 continue; 2249 2250 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name, 2251 &diag[i].offset, 2252 &diag[i].num_counters, i); 2253 if (ret) 2254 goto err_alloc; 2255 2256 mlx4_ib_fill_diag_counters(ibdev, diag[i].name, 2257 diag[i].offset, i); 2258 } 2259 2260 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats; 2261 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats; 2262 2263 return 0; 2264 2265 err_alloc: 2266 if (i) { 2267 kfree(diag[i - 1].name); 2268 kfree(diag[i - 1].offset); 2269 } 2270 2271 return ret; 2272 } 2273 2274 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2275 { 2276 int i; 2277 2278 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2279 kfree(ibdev->diag_counters[i].offset); 2280 kfree(ibdev->diag_counters[i].name); 2281 } 2282 } 2283 2284 #define MLX4_IB_INVALID_MAC ((u64)-1) 2285 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2286 struct net_device *dev, 2287 int port) 2288 { 2289 u64 new_smac = 0; 2290 u64 release_mac = MLX4_IB_INVALID_MAC; 2291 struct mlx4_ib_qp *qp; 2292 2293 new_smac = mlx4_mac_to_u64(IF_LLADDR(dev)); 2294 2295 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2296 2297 /* no need for update QP1 and mac registration in non-SRIOV */ 2298 if (!mlx4_is_mfunc(ibdev->dev)) 2299 return; 2300 2301 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2302 qp = ibdev->qp1_proxy[port - 1]; 2303 if (qp) { 2304 int new_smac_index; 2305 u64 old_smac; 2306 struct mlx4_update_qp_params update_params; 2307 2308 mutex_lock(&qp->mutex); 2309 old_smac = qp->pri.smac; 2310 if (new_smac == old_smac) 2311 goto unlock; 2312 2313 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2314 2315 if (new_smac_index < 0) 2316 goto unlock; 2317 2318 update_params.smac_index = new_smac_index; 2319 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2320 &update_params)) { 2321 release_mac = new_smac; 2322 goto unlock; 2323 } 2324 /* if old port was zero, no mac was yet registered for this QP */ 2325 if (qp->pri.smac_port) 2326 release_mac = old_smac; 2327 qp->pri.smac = new_smac; 2328 qp->pri.smac_port = port; 2329 qp->pri.smac_index = new_smac_index; 2330 } 2331 2332 unlock: 2333 if (release_mac != MLX4_IB_INVALID_MAC) 2334 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2335 if (qp) 2336 mutex_unlock(&qp->mutex); 2337 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2338 } 2339 2340 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 2341 struct net_device *dev, 2342 unsigned long event) 2343 2344 { 2345 struct mlx4_ib_iboe *iboe; 2346 int update_qps_port = -1; 2347 int port; 2348 2349 iboe = &ibdev->iboe; 2350 2351 spin_lock_bh(&iboe->lock); 2352 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 2353 2354 iboe->netdevs[port - 1] = 2355 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 2356 2357 if (dev == iboe->netdevs[port - 1] && 2358 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2359 event == NETDEV_UP || event == NETDEV_CHANGE)) 2360 update_qps_port = port; 2361 2362 } 2363 spin_unlock_bh(&iboe->lock); 2364 2365 if (update_qps_port > 0) 2366 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2367 } 2368 2369 static int mlx4_ib_netdev_event(struct notifier_block *this, 2370 unsigned long event, void *ptr) 2371 { 2372 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2373 struct mlx4_ib_dev *ibdev; 2374 2375 if (!net_eq(dev_net(dev), &init_net)) 2376 return NOTIFY_DONE; 2377 2378 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2379 mlx4_ib_scan_netdevs(ibdev, dev, event); 2380 2381 return NOTIFY_DONE; 2382 } 2383 2384 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2385 { 2386 int port; 2387 int slave; 2388 int i; 2389 2390 if (mlx4_is_master(ibdev->dev)) { 2391 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2392 ++slave) { 2393 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2394 for (i = 0; 2395 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2396 ++i) { 2397 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2398 /* master has the identity virt2phys pkey mapping */ 2399 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2400 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2401 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2402 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2403 } 2404 } 2405 } 2406 /* initialize pkey cache */ 2407 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2408 for (i = 0; 2409 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2410 ++i) 2411 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2412 (i) ? 0 : 0xFFFF; 2413 } 2414 } 2415 } 2416 2417 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2418 { 2419 int i, j, eq = 0, total_eqs = 0; 2420 2421 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2422 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2423 if (!ibdev->eq_table) 2424 return; 2425 2426 for (i = 1; i <= dev->caps.num_ports; i++) { 2427 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2428 j++, total_eqs++) { 2429 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2430 continue; 2431 ibdev->eq_table[eq] = total_eqs; 2432 if (!mlx4_assign_eq(dev, i, 2433 &ibdev->eq_table[eq])) 2434 eq++; 2435 else 2436 ibdev->eq_table[eq] = -1; 2437 } 2438 } 2439 2440 for (i = eq; i < dev->caps.num_comp_vectors; 2441 ibdev->eq_table[i++] = -1) 2442 ; 2443 2444 /* Advertise the new number of EQs to clients */ 2445 ibdev->ib_dev.num_comp_vectors = eq; 2446 } 2447 2448 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2449 { 2450 int i; 2451 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2452 2453 /* no eqs were allocated */ 2454 if (!ibdev->eq_table) 2455 return; 2456 2457 /* Reset the advertised EQ number */ 2458 ibdev->ib_dev.num_comp_vectors = 0; 2459 2460 for (i = 0; i < total_eqs; i++) 2461 mlx4_release_eq(dev, ibdev->eq_table[i]); 2462 2463 kfree(ibdev->eq_table); 2464 ibdev->eq_table = NULL; 2465 } 2466 2467 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, 2468 struct ib_port_immutable *immutable) 2469 { 2470 struct ib_port_attr attr; 2471 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2472 int err; 2473 2474 err = mlx4_ib_query_port(ibdev, port_num, &attr); 2475 if (err) 2476 return err; 2477 2478 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2479 immutable->gid_tbl_len = attr.gid_tbl_len; 2480 2481 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2482 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2483 } else { 2484 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2485 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2486 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2487 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2488 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2489 } 2490 2491 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2492 2493 return 0; 2494 } 2495 2496 static void get_fw_ver_str(struct ib_device *device, char *str, 2497 size_t str_len) 2498 { 2499 struct mlx4_ib_dev *dev = 2500 container_of(device, struct mlx4_ib_dev, ib_dev); 2501 snprintf(str, str_len, "%d.%d.%d", 2502 (int) (dev->dev->caps.fw_ver >> 32), 2503 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2504 (int) dev->dev->caps.fw_ver & 0xffff); 2505 } 2506 2507 static void *mlx4_ib_add(struct mlx4_dev *dev) 2508 { 2509 struct mlx4_ib_dev *ibdev; 2510 int num_ports; 2511 int i, j; 2512 int err; 2513 struct mlx4_ib_iboe *iboe; 2514 int ib_num_ports = 0; 2515 int num_req_counters; 2516 int allocated; 2517 u32 counter_index; 2518 struct counter_index *new_counter_index = NULL; 2519 2520 pr_info_once("%s", mlx4_ib_version); 2521 2522 num_ports = 0; 2523 mlx4_foreach_ib_transport_port(i, dev) 2524 num_ports++; 2525 2526 /* No point in registering a device with no ports... */ 2527 if (num_ports == 0) 2528 return NULL; 2529 2530 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev); 2531 if (!ibdev) { 2532 dev_err(&dev->persist->pdev->dev, 2533 "Device struct alloc failed\n"); 2534 return NULL; 2535 } 2536 2537 iboe = &ibdev->iboe; 2538 2539 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2540 goto err_dealloc; 2541 2542 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2543 goto err_pd; 2544 2545 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2546 PAGE_SIZE); 2547 if (!ibdev->uar_map) 2548 goto err_uar; 2549 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2550 2551 ibdev->dev = dev; 2552 ibdev->bond_next_port = 0; 2553 2554 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX); 2555 ibdev->ib_dev.owner = THIS_MODULE; 2556 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2557 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2558 ibdev->num_ports = num_ports; 2559 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2560 1 : ibdev->num_ports; 2561 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2562 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev; 2563 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev; 2564 ibdev->ib_dev.add_gid = mlx4_ib_add_gid; 2565 ibdev->ib_dev.del_gid = mlx4_ib_del_gid; 2566 2567 if (dev->caps.userspace_caps) 2568 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION; 2569 else 2570 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2571 2572 ibdev->ib_dev.uverbs_cmd_mask = 2573 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2574 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2575 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2576 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2577 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2578 (1ull << IB_USER_VERBS_CMD_REG_MR) | 2579 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2580 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2581 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2582 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2583 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2584 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2585 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2586 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 2587 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 2588 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 2589 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 2590 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 2591 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 2592 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 2593 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 2594 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 2595 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 2596 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 2597 2598 ibdev->ib_dev.query_device = mlx4_ib_query_device; 2599 ibdev->ib_dev.query_port = mlx4_ib_query_port; 2600 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; 2601 ibdev->ib_dev.query_gid = mlx4_ib_query_gid; 2602 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; 2603 ibdev->ib_dev.modify_device = mlx4_ib_modify_device; 2604 ibdev->ib_dev.modify_port = mlx4_ib_modify_port; 2605 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext; 2606 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext; 2607 ibdev->ib_dev.mmap = mlx4_ib_mmap; 2608 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd; 2609 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd; 2610 ibdev->ib_dev.create_ah = mlx4_ib_create_ah; 2611 ibdev->ib_dev.query_ah = mlx4_ib_query_ah; 2612 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah; 2613 ibdev->ib_dev.create_srq = mlx4_ib_create_srq; 2614 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq; 2615 ibdev->ib_dev.query_srq = mlx4_ib_query_srq; 2616 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq; 2617 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv; 2618 ibdev->ib_dev.create_qp = mlx4_ib_create_qp; 2619 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp; 2620 ibdev->ib_dev.query_qp = mlx4_ib_query_qp; 2621 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp; 2622 ibdev->ib_dev.post_send = mlx4_ib_post_send; 2623 ibdev->ib_dev.post_recv = mlx4_ib_post_recv; 2624 ibdev->ib_dev.create_cq = mlx4_ib_create_cq; 2625 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq; 2626 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq; 2627 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq; 2628 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq; 2629 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq; 2630 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr; 2631 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr; 2632 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr; 2633 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr; 2634 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr; 2635 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg; 2636 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach; 2637 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach; 2638 ibdev->ib_dev.process_mad = mlx4_ib_process_mad; 2639 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable; 2640 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str; 2641 2642 if (!mlx4_is_slave(ibdev->dev)) { 2643 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc; 2644 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr; 2645 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 2646 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 2647 } 2648 2649 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2650 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 2651 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw; 2652 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw; 2653 2654 ibdev->ib_dev.uverbs_cmd_mask |= 2655 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 2656 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 2657 } 2658 2659 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2660 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd; 2661 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd; 2662 ibdev->ib_dev.uverbs_cmd_mask |= 2663 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 2664 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 2665 } 2666 2667 if (check_flow_steering_support(dev)) { 2668 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2669 ibdev->ib_dev.create_flow = mlx4_ib_create_flow; 2670 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow; 2671 2672 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2673 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 2674 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW); 2675 } 2676 2677 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2678 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 2679 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 2680 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 2681 2682 mlx4_ib_alloc_eqs(dev, ibdev); 2683 2684 spin_lock_init(&iboe->lock); 2685 2686 if (init_node_data(ibdev)) 2687 goto err_map; 2688 mlx4_init_sl2vl_tbl(ibdev); 2689 2690 for (i = 0; i < ibdev->num_ports; ++i) { 2691 mutex_init(&ibdev->counters_table[i].mutex); 2692 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2693 } 2694 2695 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2696 for (i = 0; i < num_req_counters; ++i) { 2697 mutex_init(&ibdev->qp1_proxy_lock[i]); 2698 allocated = 0; 2699 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2700 IB_LINK_LAYER_ETHERNET) { 2701 err = mlx4_counter_alloc(ibdev->dev, &counter_index); 2702 /* if failed to allocate a new counter, use default */ 2703 if (err) 2704 counter_index = 2705 mlx4_get_default_counter_index(dev, 2706 i + 1); 2707 else 2708 allocated = 1; 2709 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2710 counter_index = mlx4_get_default_counter_index(dev, 2711 i + 1); 2712 } 2713 new_counter_index = kmalloc(sizeof(*new_counter_index), 2714 GFP_KERNEL); 2715 if (!new_counter_index) { 2716 if (allocated) 2717 mlx4_counter_free(ibdev->dev, counter_index); 2718 goto err_counter; 2719 } 2720 new_counter_index->index = counter_index; 2721 new_counter_index->allocated = allocated; 2722 list_add_tail(&new_counter_index->list, 2723 &ibdev->counters_table[i].counters_list); 2724 ibdev->counters_table[i].default_counter = counter_index; 2725 pr_info("counter index %d for port %d allocated %d\n", 2726 counter_index, i + 1, allocated); 2727 } 2728 if (mlx4_is_bonded(dev)) 2729 for (i = 1; i < ibdev->num_ports ; ++i) { 2730 new_counter_index = 2731 kmalloc(sizeof(struct counter_index), 2732 GFP_KERNEL); 2733 if (!new_counter_index) 2734 goto err_counter; 2735 new_counter_index->index = counter_index; 2736 new_counter_index->allocated = 0; 2737 list_add_tail(&new_counter_index->list, 2738 &ibdev->counters_table[i].counters_list); 2739 ibdev->counters_table[i].default_counter = 2740 counter_index; 2741 } 2742 2743 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2744 ib_num_ports++; 2745 2746 spin_lock_init(&ibdev->sm_lock); 2747 mutex_init(&ibdev->cap_mask_mutex); 2748 INIT_LIST_HEAD(&ibdev->qp_list); 2749 spin_lock_init(&ibdev->reset_flow_resource_lock); 2750 2751 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2752 ib_num_ports) { 2753 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2754 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2755 MLX4_IB_UC_STEER_QPN_ALIGN, 2756 &ibdev->steer_qpn_base, 0); 2757 if (err) 2758 goto err_counter; 2759 2760 ibdev->ib_uc_qpns_bitmap = 2761 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) * 2762 sizeof(long), 2763 GFP_KERNEL); 2764 if (!ibdev->ib_uc_qpns_bitmap) { 2765 dev_err(&dev->persist->pdev->dev, 2766 "bit map alloc failed\n"); 2767 goto err_steer_qp_release; 2768 } 2769 2770 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count); 2771 2772 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2773 dev, ibdev->steer_qpn_base, 2774 ibdev->steer_qpn_base + 2775 ibdev->steer_qpn_count - 1); 2776 if (err) 2777 goto err_steer_free_bitmap; 2778 } 2779 2780 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2781 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2782 2783 if (mlx4_ib_alloc_diag_counters(ibdev)) 2784 goto err_steer_free_bitmap; 2785 2786 if (ib_register_device(&ibdev->ib_dev, NULL)) 2787 goto err_diag_counters; 2788 2789 if (mlx4_ib_mad_init(ibdev)) 2790 goto err_reg; 2791 2792 if (mlx4_ib_init_sriov(ibdev)) 2793 goto err_mad; 2794 2795 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE || 2796 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2797 if (!iboe->nb.notifier_call) { 2798 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2799 err = register_netdevice_notifier(&iboe->nb); 2800 if (err) { 2801 iboe->nb.notifier_call = NULL; 2802 goto err_notif; 2803 } 2804 } 2805 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2806 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2807 if (err) { 2808 goto err_notif; 2809 } 2810 } 2811 } 2812 2813 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) { 2814 if (device_create_file(&ibdev->ib_dev.dev, 2815 mlx4_class_attributes[j])) 2816 goto err_notif; 2817 } 2818 2819 ibdev->ib_active = true; 2820 2821 if (mlx4_is_mfunc(ibdev->dev)) 2822 init_pkeys(ibdev); 2823 2824 /* create paravirt contexts for any VFs which are active */ 2825 if (mlx4_is_master(ibdev->dev)) { 2826 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2827 if (j == mlx4_master_func_num(ibdev->dev)) 2828 continue; 2829 if (mlx4_is_slave_active(ibdev->dev, j)) 2830 do_slave_init(ibdev, j, 1); 2831 } 2832 } 2833 return ibdev; 2834 2835 err_notif: 2836 if (ibdev->iboe.nb.notifier_call) { 2837 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2838 pr_warn("failure unregistering notifier\n"); 2839 ibdev->iboe.nb.notifier_call = NULL; 2840 } 2841 flush_workqueue(wq); 2842 2843 mlx4_ib_close_sriov(ibdev); 2844 2845 err_mad: 2846 mlx4_ib_mad_cleanup(ibdev); 2847 2848 err_reg: 2849 ib_unregister_device(&ibdev->ib_dev); 2850 2851 err_diag_counters: 2852 mlx4_ib_diag_cleanup(ibdev); 2853 2854 err_steer_free_bitmap: 2855 kfree(ibdev->ib_uc_qpns_bitmap); 2856 2857 err_steer_qp_release: 2858 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 2859 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2860 ibdev->steer_qpn_count); 2861 err_counter: 2862 for (i = 0; i < ibdev->num_ports; ++i) 2863 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2864 2865 err_map: 2866 iounmap(ibdev->uar_map); 2867 2868 err_uar: 2869 mlx4_uar_free(dev, &ibdev->priv_uar); 2870 2871 err_pd: 2872 mlx4_pd_free(dev, ibdev->priv_pdn); 2873 2874 err_dealloc: 2875 ib_dealloc_device(&ibdev->ib_dev); 2876 2877 return NULL; 2878 } 2879 2880 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2881 { 2882 int offset; 2883 2884 WARN_ON(!dev->ib_uc_qpns_bitmap); 2885 2886 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2887 dev->steer_qpn_count, 2888 get_count_order(count)); 2889 if (offset < 0) 2890 return offset; 2891 2892 *qpn = dev->steer_qpn_base + offset; 2893 return 0; 2894 } 2895 2896 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2897 { 2898 if (!qpn || 2899 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2900 return; 2901 2902 BUG_ON(qpn < dev->steer_qpn_base); 2903 2904 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2905 qpn - dev->steer_qpn_base, 2906 get_count_order(count)); 2907 } 2908 2909 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2910 int is_attach) 2911 { 2912 int err; 2913 size_t flow_size; 2914 struct ib_flow_attr *flow = NULL; 2915 struct ib_flow_spec_ib *ib_spec; 2916 2917 if (is_attach) { 2918 flow_size = sizeof(struct ib_flow_attr) + 2919 sizeof(struct ib_flow_spec_ib); 2920 flow = kzalloc(flow_size, GFP_KERNEL); 2921 if (!flow) 2922 return -ENOMEM; 2923 flow->port = mqp->port; 2924 flow->num_of_specs = 1; 2925 flow->size = flow_size; 2926 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2927 ib_spec->type = IB_FLOW_SPEC_IB; 2928 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2929 /* Add an empty rule for IB L2 */ 2930 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2931 2932 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, 2933 IB_FLOW_DOMAIN_NIC, 2934 MLX4_FS_REGULAR, 2935 &mqp->reg_id); 2936 } else { 2937 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 2938 } 2939 kfree(flow); 2940 return err; 2941 } 2942 2943 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 2944 { 2945 struct mlx4_ib_dev *ibdev = ibdev_ptr; 2946 int p; 2947 2948 ibdev->ib_active = false; 2949 flush_workqueue(wq); 2950 2951 mlx4_ib_close_sriov(ibdev); 2952 mlx4_ib_mad_cleanup(ibdev); 2953 ib_unregister_device(&ibdev->ib_dev); 2954 mlx4_ib_diag_cleanup(ibdev); 2955 if (ibdev->iboe.nb.notifier_call) { 2956 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2957 pr_warn("failure unregistering notifier\n"); 2958 ibdev->iboe.nb.notifier_call = NULL; 2959 } 2960 2961 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) { 2962 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2963 ibdev->steer_qpn_count); 2964 kfree(ibdev->ib_uc_qpns_bitmap); 2965 } 2966 2967 iounmap(ibdev->uar_map); 2968 for (p = 0; p < ibdev->num_ports; ++p) 2969 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 2970 2971 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 2972 mlx4_CLOSE_PORT(dev, p); 2973 2974 mlx4_ib_free_eqs(dev, ibdev); 2975 2976 mlx4_uar_free(dev, &ibdev->priv_uar); 2977 mlx4_pd_free(dev, ibdev->priv_pdn); 2978 ib_dealloc_device(&ibdev->ib_dev); 2979 } 2980 2981 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 2982 { 2983 struct mlx4_ib_demux_work **dm = NULL; 2984 struct mlx4_dev *dev = ibdev->dev; 2985 int i; 2986 unsigned long flags; 2987 struct mlx4_active_ports actv_ports; 2988 unsigned int ports; 2989 unsigned int first_port; 2990 2991 if (!mlx4_is_master(dev)) 2992 return; 2993 2994 actv_ports = mlx4_get_active_ports(dev, slave); 2995 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 2996 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 2997 2998 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 2999 if (!dm) { 3000 pr_err("failed to allocate memory for tunneling qp update\n"); 3001 return; 3002 } 3003 3004 for (i = 0; i < ports; i++) { 3005 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3006 if (!dm[i]) { 3007 pr_err("failed to allocate memory for tunneling qp update work struct\n"); 3008 while (--i >= 0) 3009 kfree(dm[i]); 3010 goto out; 3011 } 3012 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3013 dm[i]->port = first_port + i + 1; 3014 dm[i]->slave = slave; 3015 dm[i]->do_init = do_init; 3016 dm[i]->dev = ibdev; 3017 } 3018 /* initialize or tear down tunnel QPs for the slave */ 3019 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3020 if (!ibdev->sriov.is_going_down) { 3021 for (i = 0; i < ports; i++) 3022 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3023 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3024 } else { 3025 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3026 for (i = 0; i < ports; i++) 3027 kfree(dm[i]); 3028 } 3029 out: 3030 kfree(dm); 3031 return; 3032 } 3033 3034 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3035 { 3036 struct mlx4_ib_qp *mqp; 3037 unsigned long flags_qp; 3038 unsigned long flags_cq; 3039 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3040 struct list_head cq_notify_list; 3041 struct mlx4_cq *mcq; 3042 unsigned long flags; 3043 3044 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3045 INIT_LIST_HEAD(&cq_notify_list); 3046 3047 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3048 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3049 3050 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3051 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3052 if (mqp->sq.tail != mqp->sq.head) { 3053 send_mcq = to_mcq(mqp->ibqp.send_cq); 3054 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3055 if (send_mcq->mcq.comp && 3056 mqp->ibqp.send_cq->comp_handler) { 3057 if (!send_mcq->mcq.reset_notify_added) { 3058 send_mcq->mcq.reset_notify_added = 1; 3059 list_add_tail(&send_mcq->mcq.reset_notify, 3060 &cq_notify_list); 3061 } 3062 } 3063 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3064 } 3065 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3066 /* Now, handle the QP's receive queue */ 3067 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3068 /* no handling is needed for SRQ */ 3069 if (!mqp->ibqp.srq) { 3070 if (mqp->rq.tail != mqp->rq.head) { 3071 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3072 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3073 if (recv_mcq->mcq.comp && 3074 mqp->ibqp.recv_cq->comp_handler) { 3075 if (!recv_mcq->mcq.reset_notify_added) { 3076 recv_mcq->mcq.reset_notify_added = 1; 3077 list_add_tail(&recv_mcq->mcq.reset_notify, 3078 &cq_notify_list); 3079 } 3080 } 3081 spin_unlock_irqrestore(&recv_mcq->lock, 3082 flags_cq); 3083 } 3084 } 3085 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3086 } 3087 3088 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3089 mcq->comp(mcq); 3090 } 3091 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3092 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3093 } 3094 3095 static void handle_bonded_port_state_event(struct work_struct *work) 3096 { 3097 struct ib_event_work *ew = 3098 container_of(work, struct ib_event_work, work); 3099 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3100 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3101 int i; 3102 struct ib_event ibev; 3103 3104 kfree(ew); 3105 spin_lock_bh(&ibdev->iboe.lock); 3106 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3107 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3108 enum ib_port_state curr_port_state; 3109 3110 if (!curr_netdev) 3111 continue; 3112 3113 curr_port_state = 3114 (netif_running(curr_netdev) && 3115 netif_carrier_ok(curr_netdev)) ? 3116 IB_PORT_ACTIVE : IB_PORT_DOWN; 3117 3118 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3119 curr_port_state : IB_PORT_ACTIVE; 3120 } 3121 spin_unlock_bh(&ibdev->iboe.lock); 3122 3123 ibev.device = &ibdev->ib_dev; 3124 ibev.element.port_num = 1; 3125 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3126 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3127 3128 ib_dispatch_event(&ibev); 3129 } 3130 3131 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3132 { 3133 u64 sl2vl; 3134 int err; 3135 3136 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3137 if (err) { 3138 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3139 port, err); 3140 sl2vl = 0; 3141 } 3142 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3143 } 3144 3145 static void ib_sl2vl_update_work(struct work_struct *work) 3146 { 3147 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3148 struct mlx4_ib_dev *mdev = ew->ib_dev; 3149 int port = ew->port; 3150 3151 mlx4_ib_sl2vl_update(mdev, port); 3152 3153 kfree(ew); 3154 } 3155 3156 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3157 int port) 3158 { 3159 struct ib_event_work *ew; 3160 3161 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3162 if (ew) { 3163 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3164 ew->port = port; 3165 ew->ib_dev = ibdev; 3166 queue_work(wq, &ew->work); 3167 } else { 3168 pr_err("failed to allocate memory for sl2vl update work\n"); 3169 } 3170 } 3171 3172 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 3173 enum mlx4_dev_event event, unsigned long param) 3174 { 3175 struct ib_event ibev; 3176 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 3177 struct mlx4_eqe *eqe = NULL; 3178 struct ib_event_work *ew; 3179 int p = 0; 3180 3181 if (mlx4_is_bonded(dev) && 3182 ((event == MLX4_DEV_EVENT_PORT_UP) || 3183 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3184 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3185 if (!ew) 3186 return; 3187 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3188 ew->ib_dev = ibdev; 3189 queue_work(wq, &ew->work); 3190 return; 3191 } 3192 3193 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 3194 eqe = (struct mlx4_eqe *)param; 3195 else 3196 p = (int) param; 3197 3198 switch (event) { 3199 case MLX4_DEV_EVENT_PORT_UP: 3200 if (p > ibdev->num_ports) 3201 return; 3202 if (!mlx4_is_slave(dev) && 3203 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3204 IB_LINK_LAYER_INFINIBAND) { 3205 if (mlx4_is_master(dev)) 3206 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3207 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3208 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3209 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3210 } 3211 ibev.event = IB_EVENT_PORT_ACTIVE; 3212 break; 3213 3214 case MLX4_DEV_EVENT_PORT_DOWN: 3215 if (p > ibdev->num_ports) 3216 return; 3217 ibev.event = IB_EVENT_PORT_ERR; 3218 break; 3219 3220 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3221 ibdev->ib_active = false; 3222 ibev.event = IB_EVENT_DEVICE_FATAL; 3223 mlx4_ib_handle_catas_error(ibdev); 3224 break; 3225 3226 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3227 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3228 if (!ew) { 3229 pr_err("failed to allocate memory for events work\n"); 3230 break; 3231 } 3232 3233 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3234 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3235 ew->ib_dev = ibdev; 3236 /* need to queue only for port owner, which uses GEN_EQE */ 3237 if (mlx4_is_master(dev)) 3238 queue_work(wq, &ew->work); 3239 else 3240 handle_port_mgmt_change_event(&ew->work); 3241 return; 3242 3243 case MLX4_DEV_EVENT_SLAVE_INIT: 3244 /* here, p is the slave id */ 3245 do_slave_init(ibdev, p, 1); 3246 if (mlx4_is_master(dev)) { 3247 int i; 3248 3249 for (i = 1; i <= ibdev->num_ports; i++) { 3250 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3251 == IB_LINK_LAYER_INFINIBAND) 3252 mlx4_ib_slave_alias_guid_event(ibdev, 3253 p, i, 3254 1); 3255 } 3256 } 3257 return; 3258 3259 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3260 if (mlx4_is_master(dev)) { 3261 int i; 3262 3263 for (i = 1; i <= ibdev->num_ports; i++) { 3264 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3265 == IB_LINK_LAYER_INFINIBAND) 3266 mlx4_ib_slave_alias_guid_event(ibdev, 3267 p, i, 3268 0); 3269 } 3270 } 3271 /* here, p is the slave id */ 3272 do_slave_init(ibdev, p, 0); 3273 return; 3274 3275 default: 3276 return; 3277 } 3278 3279 ibev.device = ibdev_ptr; 3280 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3281 3282 ib_dispatch_event(&ibev); 3283 } 3284 3285 static struct mlx4_interface mlx4_ib_interface = { 3286 .add = mlx4_ib_add, 3287 .remove = mlx4_ib_remove, 3288 .event = mlx4_ib_event, 3289 .protocol = MLX4_PROT_IB_IPV6, 3290 .flags = MLX4_INTFF_BONDING 3291 }; 3292 3293 static int __init mlx4_ib_init(void) 3294 { 3295 int err; 3296 3297 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3298 if (!wq) 3299 return -ENOMEM; 3300 3301 err = mlx4_ib_mcg_init(); 3302 if (err) 3303 goto clean_wq; 3304 3305 err = mlx4_register_interface(&mlx4_ib_interface); 3306 if (err) 3307 goto clean_mcg; 3308 3309 return 0; 3310 3311 clean_mcg: 3312 mlx4_ib_mcg_destroy(); 3313 3314 clean_wq: 3315 destroy_workqueue(wq); 3316 return err; 3317 } 3318 3319 static void __exit mlx4_ib_cleanup(void) 3320 { 3321 mlx4_unregister_interface(&mlx4_ib_interface); 3322 mlx4_ib_mcg_destroy(); 3323 destroy_workqueue(wq); 3324 } 3325 3326 module_init_order(mlx4_ib_init, SI_ORDER_SEVENTH); 3327 module_exit_order(mlx4_ib_cleanup, SI_ORDER_SEVENTH); 3328 3329 static int 3330 mlx4ib_evhand(module_t mod, int event, void *arg) 3331 { 3332 return (0); 3333 } 3334 3335 static moduledata_t mlx4ib_mod = { 3336 .name = "mlx4ib", 3337 .evhand = mlx4ib_evhand, 3338 }; 3339 3340 DECLARE_MODULE(mlx4ib, mlx4ib_mod, SI_SUB_LAST, SI_ORDER_ANY); 3341 MODULE_DEPEND(mlx4ib, mlx4, 1, 1, 1); 3342 MODULE_DEPEND(mlx4ib, ibcore, 1, 1, 1); 3343 MODULE_DEPEND(mlx4ib, linuxkpi, 1, 1, 1); 3344