xref: /freebsd/sys/dev/mlx4/cmd.h (revision 273c26a3c3bea87a241d6879abd4f991db180bf0)
1 /*
2  * Copyright (c) 2006 Cisco Systems, Inc.  All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #ifndef MLX4_CMD_H
34 #define MLX4_CMD_H
35 
36 #include <linux/dma-mapping.h>
37 #include <linux/types.h>
38 
39 enum {
40 	/* initialization and general commands */
41 	MLX4_CMD_SYS_EN		 = 0x1,
42 	MLX4_CMD_SYS_DIS	 = 0x2,
43 	MLX4_CMD_MAP_FA		 = 0xfff,
44 	MLX4_CMD_UNMAP_FA	 = 0xffe,
45 	MLX4_CMD_RUN_FW		 = 0xff6,
46 	MLX4_CMD_MOD_STAT_CFG	 = 0x34,
47 	MLX4_CMD_QUERY_DEV_CAP	 = 0x3,
48 	MLX4_CMD_QUERY_FW	 = 0x4,
49 	MLX4_CMD_ENABLE_LAM	 = 0xff8,
50 	MLX4_CMD_DISABLE_LAM	 = 0xff7,
51 	MLX4_CMD_QUERY_DDR	 = 0x5,
52 	MLX4_CMD_QUERY_ADAPTER	 = 0x6,
53 	MLX4_CMD_INIT_HCA	 = 0x7,
54 	MLX4_CMD_CLOSE_HCA	 = 0x8,
55 	MLX4_CMD_INIT_PORT	 = 0x9,
56 	MLX4_CMD_CLOSE_PORT	 = 0xa,
57 	MLX4_CMD_QUERY_HCA	 = 0xb,
58 	MLX4_CMD_QUERY_PORT	 = 0x43,
59 	MLX4_CMD_SENSE_PORT	 = 0x4d,
60 	MLX4_CMD_HW_HEALTH_CHECK = 0x50,
61 	MLX4_CMD_SET_PORT	 = 0xc,
62 	MLX4_CMD_SET_NODE	 = 0x5a,
63 	MLX4_CMD_QUERY_FUNC	 = 0x56,
64 	MLX4_CMD_ACCESS_DDR	 = 0x2e,
65 	MLX4_CMD_MAP_ICM	 = 0xffa,
66 	MLX4_CMD_UNMAP_ICM	 = 0xff9,
67 	MLX4_CMD_MAP_ICM_AUX	 = 0xffc,
68 	MLX4_CMD_UNMAP_ICM_AUX	 = 0xffb,
69 	MLX4_CMD_SET_ICM_SIZE	 = 0xffd,
70 	/*master notify fw on finish for slave's flr*/
71 	MLX4_CMD_INFORM_FLR_DONE = 0x5b,
72 	MLX4_CMD_GET_OP_REQ      = 0x59,
73 
74 	/* TPT commands */
75 	MLX4_CMD_SW2HW_MPT	 = 0xd,
76 	MLX4_CMD_QUERY_MPT	 = 0xe,
77 	MLX4_CMD_HW2SW_MPT	 = 0xf,
78 	MLX4_CMD_READ_MTT	 = 0x10,
79 	MLX4_CMD_WRITE_MTT	 = 0x11,
80 	MLX4_CMD_SYNC_TPT	 = 0x2f,
81 
82 	/* EQ commands */
83 	MLX4_CMD_MAP_EQ		 = 0x12,
84 	MLX4_CMD_SW2HW_EQ	 = 0x13,
85 	MLX4_CMD_HW2SW_EQ	 = 0x14,
86 	MLX4_CMD_QUERY_EQ	 = 0x15,
87 
88 	/* CQ commands */
89 	MLX4_CMD_SW2HW_CQ	 = 0x16,
90 	MLX4_CMD_HW2SW_CQ	 = 0x17,
91 	MLX4_CMD_QUERY_CQ	 = 0x18,
92 	MLX4_CMD_MODIFY_CQ	 = 0x2c,
93 
94 	/* SRQ commands */
95 	MLX4_CMD_SW2HW_SRQ	 = 0x35,
96 	MLX4_CMD_HW2SW_SRQ	 = 0x36,
97 	MLX4_CMD_QUERY_SRQ	 = 0x37,
98 	MLX4_CMD_ARM_SRQ	 = 0x40,
99 
100 	/* QP/EE commands */
101 	MLX4_CMD_RST2INIT_QP	 = 0x19,
102 	MLX4_CMD_INIT2RTR_QP	 = 0x1a,
103 	MLX4_CMD_RTR2RTS_QP	 = 0x1b,
104 	MLX4_CMD_RTS2RTS_QP	 = 0x1c,
105 	MLX4_CMD_SQERR2RTS_QP	 = 0x1d,
106 	MLX4_CMD_2ERR_QP	 = 0x1e,
107 	MLX4_CMD_RTS2SQD_QP	 = 0x1f,
108 	MLX4_CMD_SQD2SQD_QP	 = 0x38,
109 	MLX4_CMD_SQD2RTS_QP	 = 0x20,
110 	MLX4_CMD_2RST_QP	 = 0x21,
111 	MLX4_CMD_QUERY_QP	 = 0x22,
112 	MLX4_CMD_INIT2INIT_QP	 = 0x2d,
113 	MLX4_CMD_SUSPEND_QP	 = 0x32,
114 	MLX4_CMD_UNSUSPEND_QP	 = 0x33,
115 	MLX4_CMD_UPDATE_QP	 = 0x61,
116 	/* special QP and management commands */
117 	MLX4_CMD_CONF_SPECIAL_QP = 0x23,
118 	MLX4_CMD_MAD_IFC	 = 0x24,
119 
120 	/* multicast commands */
121 	MLX4_CMD_READ_MCG	 = 0x25,
122 	MLX4_CMD_WRITE_MCG	 = 0x26,
123 	MLX4_CMD_MGID_HASH	 = 0x27,
124 
125 	/* miscellaneous commands */
126 	MLX4_CMD_DIAG_RPRT	 = 0x30,
127 	MLX4_CMD_NOP		 = 0x31,
128 	MLX4_CMD_ACCESS_MEM	 = 0x2e,
129 	MLX4_CMD_SET_VEP	 = 0x52,
130 
131 	/* Ethernet specific commands */
132 	MLX4_CMD_SET_VLAN_FLTR	 = 0x47,
133 	MLX4_CMD_SET_MCAST_FLTR	 = 0x48,
134 	MLX4_CMD_DUMP_ETH_STATS	 = 0x49,
135 
136 	/* Communication channel commands */
137 	MLX4_CMD_ARM_COMM_CHANNEL = 0x57,
138 	MLX4_CMD_GEN_EQE	 = 0x58,
139 
140 	/* virtual commands */
141 	MLX4_CMD_ALLOC_RES	 = 0xf00,
142 	MLX4_CMD_FREE_RES	 = 0xf01,
143 	MLX4_CMD_MCAST_ATTACH	 = 0xf05,
144 	MLX4_CMD_UCAST_ATTACH	 = 0xf06,
145 	MLX4_CMD_PROMISC         = 0xf08,
146 	MLX4_CMD_QUERY_FUNC_CAP  = 0xf0a,
147 	MLX4_CMD_QP_ATTACH	 = 0xf0b,
148 
149 	/* debug commands */
150 	MLX4_CMD_QUERY_DEBUG_MSG = 0x2a,
151 	MLX4_CMD_SET_DEBUG_MSG	 = 0x2b,
152 
153 	/* statistics commands */
154 	MLX4_CMD_QUERY_IF_STAT	 = 0X54,
155 	MLX4_CMD_SET_IF_STAT	 = 0X55,
156 
157 	/* register/delete flow steering network rules */
158 	MLX4_QP_FLOW_STEERING_ATTACH = 0x65,
159 	MLX4_QP_FLOW_STEERING_DETACH = 0x66,
160 	MLX4_FLOW_STEERING_IB_UC_QP_RANGE = 0x64,
161 };
162 
163 enum {
164 	MLX4_CMD_TIME_CLASS_A	= 60000,
165 	MLX4_CMD_TIME_CLASS_B	= 60000,
166 	MLX4_CMD_TIME_CLASS_C	= 60000,
167 };
168 
169 enum {
170 	MLX4_MAILBOX_SIZE	= 4096,
171 	MLX4_ACCESS_MEM_ALIGN	= 256,
172 };
173 
174 enum {
175 	/* set port opcode modifiers */
176 	MLX4_SET_PORT_GENERAL		= 0x0,
177 	MLX4_SET_PORT_RQP_CALC		= 0x1,
178 	MLX4_SET_PORT_MAC_TABLE		= 0x2,
179 	MLX4_SET_PORT_VLAN_TABLE	= 0x3,
180 	MLX4_SET_PORT_PRIO_MAP		= 0x4,
181 	MLX4_SET_PORT_GID_TABLE		= 0x5,
182 	MLX4_SET_PORT_PRIO2TC		= 0x8,
183 	MLX4_SET_PORT_SCHEDULER		= 0x9
184 };
185 
186 enum {
187 	MLX4_CMD_WRAPPED,
188 	MLX4_CMD_NATIVE
189 };
190 
191 struct mlx4_dev;
192 
193 struct mlx4_cmd_mailbox {
194 	void		       *buf;
195 	dma_addr_t		dma;
196 };
197 
198 int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
199 	       int out_is_imm, u32 in_modifier, u8 op_modifier,
200 	       u16 op, unsigned long timeout, int native);
201 
202 /* Invoke a command with no output parameter */
203 static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier,
204 			   u8 op_modifier, u16 op, unsigned long timeout,
205 			   int native)
206 {
207 	return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier,
208 			  op_modifier, op, timeout, native);
209 }
210 
211 /* Invoke a command with an output mailbox */
212 static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param,
213 			       u32 in_modifier, u8 op_modifier, u16 op,
214 			       unsigned long timeout, int native)
215 {
216 	return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier,
217 			  op_modifier, op, timeout, native);
218 }
219 
220 /*
221  * Invoke a command with an immediate output parameter (and copy the
222  * output into the caller's out_param pointer after the command
223  * executes).
224  */
225 static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
226 			       u32 in_modifier, u8 op_modifier, u16 op,
227 			       unsigned long timeout, int native)
228 {
229 	return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier,
230 			  op_modifier, op, timeout, native);
231 }
232 
233 struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);
234 void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
235 
236 u32 mlx4_comm_get_version(void);
237 int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u8 *mac);
238 int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos);
239 int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting);
240 int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state);
241 int mlx4_get_vf_link_state(struct mlx4_dev *dev, int port, int vf);
242 /*
243  * mlx4_get_slave_default_vlan -
244  * retrun true if VST ( default vlan)
245  * if VST will fill vlan & qos (if not NULL)
246  */
247 bool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave, u16 *vlan, u8 *qos);
248 
249 enum {
250 	IFLA_VF_LINK_STATE_AUTO,	/* link state of the uplink */
251 	IFLA_VF_LINK_STATE_ENABLE,	/* link always up */
252 	IFLA_VF_LINK_STATE_DISABLE,	/* link always down */
253 	__IFLA_VF_LINK_STATE_MAX,
254 };
255 
256 #define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8)
257 
258 #endif /* MLX4_CMD_H */
259