xref: /freebsd/sys/dev/mlx/mlx_pci.c (revision 729362425c09cf6b362366aabc6fb547eee8035a)
1 /*-
2  * Copyright (c) 1999 Michael Smith
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  *	$FreeBSD$
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/kernel.h>
32 
33 #include <sys/bus.h>
34 #include <sys/conf.h>
35 #include <sys/disk.h>
36 
37 #include <machine/bus_memio.h>
38 #include <machine/bus_pio.h>
39 #include <machine/bus.h>
40 #include <machine/resource.h>
41 #include <sys/rman.h>
42 
43 #include <pci/pcireg.h>
44 #include <pci/pcivar.h>
45 
46 #include <dev/mlx/mlx_compat.h>
47 #include <dev/mlx/mlxio.h>
48 #include <dev/mlx/mlxvar.h>
49 #include <dev/mlx/mlxreg.h>
50 
51 static int			mlx_pci_probe(device_t dev);
52 static int			mlx_pci_attach(device_t dev);
53 
54 static device_method_t mlx_methods[] = {
55     /* Device interface */
56     DEVMETHOD(device_probe,	mlx_pci_probe),
57     DEVMETHOD(device_attach,	mlx_pci_attach),
58     DEVMETHOD(device_detach,	mlx_detach),
59     DEVMETHOD(device_shutdown,	mlx_shutdown),
60     DEVMETHOD(device_suspend,	mlx_suspend),
61     DEVMETHOD(device_resume,	mlx_resume),
62 
63     DEVMETHOD(bus_print_child,	bus_generic_print_child),
64     DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
65     { 0, 0 }
66 };
67 
68 static driver_t mlx_pci_driver = {
69 	"mlx",
70 	mlx_methods,
71 	sizeof(struct mlx_softc)
72 };
73 
74 DRIVER_MODULE(mlx, pci, mlx_pci_driver, mlx_devclass, 0, 0);
75 
76 struct mlx_ident
77 {
78     u_int16_t	vendor;
79     u_int16_t	device;
80     u_int16_t	subvendor;
81     u_int16_t	subdevice;
82     int		iftype;
83     char	*desc;
84 } mlx_identifiers[] = {
85     {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"},
86     {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
87     {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
88     {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
89     {0, 0, 0, 0, 0, 0}
90 };
91 
92 static int
93 mlx_pci_probe(device_t dev)
94 {
95     struct mlx_ident	*m;
96 
97     debug_called(1);
98 
99     for (m = mlx_identifiers; m->vendor != 0; m++) {
100 	if ((m->vendor == pci_get_vendor(dev)) &&
101 	    (m->device == pci_get_device(dev)) &&
102 	    ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
103 				     (m->subdevice == pci_get_subdevice(dev))))) {
104 
105 	    device_set_desc(dev, m->desc);
106 	    return(-10);	/* allow room to be overridden */
107 	}
108     }
109     return(ENXIO);
110 }
111 
112 static int
113 mlx_pci_attach(device_t dev)
114 {
115     struct mlx_softc	*sc;
116     int			i, error;
117     u_int32_t		command;
118 
119     debug_called(1);
120 
121     /*
122      * Make sure we are going to be able to talk to this board.
123      */
124     command = pci_read_config(dev, PCIR_COMMAND, 2);
125     if ((command & PCIM_CMD_MEMEN) == 0) {
126 	device_printf(dev, "memory window not available\n");
127 	return(ENXIO);
128     }
129     /* force the busmaster enable bit on */
130     command |= PCIM_CMD_BUSMASTEREN;
131     pci_write_config(dev, PCIR_COMMAND, command, 2);
132 
133     /*
134      * Initialise softc.
135      */
136     sc = device_get_softc(dev);
137     bzero(sc, sizeof(*sc));
138     sc->mlx_dev = dev;
139 
140     /*
141      * Work out what sort of adapter this is (we need to know this in order
142      * to map the appropriate interface resources).
143      */
144     sc->mlx_iftype = 0;
145     for (i = 0; mlx_identifiers[i].vendor != 0; i++) {
146 	if ((mlx_identifiers[i].vendor == pci_get_vendor(dev)) &&
147 	    (mlx_identifiers[i].device == pci_get_device(dev))) {
148 	    sc->mlx_iftype = mlx_identifiers[i].iftype;
149 	    break;
150 	}
151     }
152     if (sc->mlx_iftype == 0)		/* shouldn't happen */
153 	return(ENXIO);
154 
155     /*
156      * Allocate the PCI register window.
157      */
158 
159     /* type 2/3 adapters have an I/O region we don't prefer at base 0 */
160     switch(sc->mlx_iftype) {
161     case MLX_IFTYPE_2:
162     case MLX_IFTYPE_3:
163 	sc->mlx_mem_type = SYS_RES_MEMORY;
164 	sc->mlx_mem_rid = MLX_CFG_BASE1;
165 	sc->mlx_mem = bus_alloc_resource(dev, sc->mlx_mem_type, &sc->mlx_mem_rid, 0, ~0, 1, RF_ACTIVE);
166 	if (sc->mlx_mem == NULL) {
167 	    sc->mlx_mem_type = SYS_RES_IOPORT;
168 	    sc->mlx_mem_rid = MLX_CFG_BASE0;
169 	    sc->mlx_mem = bus_alloc_resource(dev, sc->mlx_mem_type, &sc->mlx_mem_rid, 0, ~0, 1, RF_ACTIVE);
170 	}
171 	break;
172     case MLX_IFTYPE_4:
173     case MLX_IFTYPE_5:
174 	sc->mlx_mem_type = SYS_RES_MEMORY;
175 	sc->mlx_mem_rid = MLX_CFG_BASE0;
176 	sc->mlx_mem = bus_alloc_resource(dev, sc->mlx_mem_type, &sc->mlx_mem_rid, 0, ~0, 1, RF_ACTIVE);
177 	break;
178     }
179     if (sc->mlx_mem == NULL) {
180 	device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
181 	mlx_free(sc);
182 	return(ENXIO);
183     }
184     sc->mlx_btag = rman_get_bustag(sc->mlx_mem);
185     sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem);
186 
187     /*
188      * Allocate the parent bus DMA tag appropriate for PCI.
189      */
190     error = bus_dma_tag_create(NULL, 			/* parent */
191 			       1, 0, 			/* alignment, boundary */
192 			       BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
193 			       BUS_SPACE_MAXADDR, 	/* highaddr */
194 			       NULL, NULL, 		/* filter, filterarg */
195 			       MAXBSIZE, MLX_NSEG,	/* maxsize, nsegments */
196 			       BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
197 			       BUS_DMA_ALLOCNOW,	/* flags */
198 			       &sc->mlx_parent_dmat);
199     if (error != 0) {
200 	device_printf(dev, "can't allocate parent DMA tag\n");
201 	mlx_free(sc);
202 	return(ENOMEM);
203     }
204 
205     /*
206      * Do bus-independant initialisation.
207      */
208     error = mlx_attach(sc);
209     if (error != 0) {
210 	mlx_free(sc);
211 	return(error);
212     }
213 
214     /*
215      * Start the controller.
216      */
217     mlx_startup(sc);
218     return(0);
219 }
220