xref: /freebsd/sys/dev/mlx/mlx_pci.c (revision 70e0bbedef95258a4dadc996d641a9bebd3f107d)
1 /*-
2  * Copyright (c) 1999 Michael Smith
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/module.h>
34 
35 #include <sys/bus.h>
36 #include <sys/conf.h>
37 
38 #include <machine/bus.h>
39 #include <machine/resource.h>
40 #include <sys/rman.h>
41 
42 #include <geom/geom_disk.h>
43 
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 
47 #include <dev/mlx/mlx_compat.h>
48 #include <dev/mlx/mlxio.h>
49 #include <dev/mlx/mlxvar.h>
50 #include <dev/mlx/mlxreg.h>
51 
52 static int			mlx_pci_probe(device_t dev);
53 static int			mlx_pci_attach(device_t dev);
54 
55 static device_method_t mlx_methods[] = {
56     /* Device interface */
57     DEVMETHOD(device_probe,	mlx_pci_probe),
58     DEVMETHOD(device_attach,	mlx_pci_attach),
59     DEVMETHOD(device_detach,	mlx_detach),
60     DEVMETHOD(device_shutdown,	mlx_shutdown),
61     DEVMETHOD(device_suspend,	mlx_suspend),
62     DEVMETHOD(device_resume,	mlx_resume),
63 
64     DEVMETHOD_END
65 };
66 
67 static driver_t mlx_pci_driver = {
68 	"mlx",
69 	mlx_methods,
70 	sizeof(struct mlx_softc)
71 };
72 
73 DRIVER_MODULE(mlx, pci, mlx_pci_driver, mlx_devclass, 0, 0);
74 
75 struct mlx_ident
76 {
77     u_int16_t	vendor;
78     u_int16_t	device;
79     u_int16_t	subvendor;
80     u_int16_t	subdevice;
81     int		iftype;
82     char	*desc;
83 } mlx_identifiers[] = {
84     {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"},
85     {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
86     {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
87     {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
88     {0, 0, 0, 0, 0, 0}
89 };
90 
91 static int
92 mlx_pci_probe(device_t dev)
93 {
94     struct mlx_ident	*m;
95 
96     debug_called(1);
97 
98     for (m = mlx_identifiers; m->vendor != 0; m++) {
99 	if ((m->vendor == pci_get_vendor(dev)) &&
100 	    (m->device == pci_get_device(dev)) &&
101 	    ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
102 				     (m->subdevice == pci_get_subdevice(dev))))) {
103 
104 	    device_set_desc(dev, m->desc);
105 	    return(BUS_PROBE_DEFAULT);
106 	}
107     }
108     return(ENXIO);
109 }
110 
111 static int
112 mlx_pci_attach(device_t dev)
113 {
114     struct mlx_softc	*sc;
115     int			i, error;
116     u_int32_t		command;
117 
118     debug_called(1);
119 
120     /*
121      * Make sure we are going to be able to talk to this board.
122      */
123     command = pci_read_config(dev, PCIR_COMMAND, 2);
124     if ((command & PCIM_CMD_MEMEN) == 0) {
125 	device_printf(dev, "memory window not available\n");
126 	return(ENXIO);
127     }
128     /* force the busmaster enable bit on */
129     command |= PCIM_CMD_BUSMASTEREN;
130     pci_write_config(dev, PCIR_COMMAND, command, 2);
131 
132     /*
133      * Initialise softc.
134      */
135     sc = device_get_softc(dev);
136     bzero(sc, sizeof(*sc));
137     sc->mlx_dev = dev;
138 
139     /*
140      * Work out what sort of adapter this is (we need to know this in order
141      * to map the appropriate interface resources).
142      */
143     sc->mlx_iftype = 0;
144     for (i = 0; mlx_identifiers[i].vendor != 0; i++) {
145 	if ((mlx_identifiers[i].vendor == pci_get_vendor(dev)) &&
146 	    (mlx_identifiers[i].device == pci_get_device(dev))) {
147 	    sc->mlx_iftype = mlx_identifiers[i].iftype;
148 	    break;
149 	}
150     }
151     if (sc->mlx_iftype == 0)		/* shouldn't happen */
152 	return(ENXIO);
153 
154     /*
155      * Allocate the PCI register window.
156      */
157 
158     /* type 2/3 adapters have an I/O region we don't prefer at base 0 */
159     switch(sc->mlx_iftype) {
160     case MLX_IFTYPE_2:
161     case MLX_IFTYPE_3:
162 	sc->mlx_mem_type = SYS_RES_MEMORY;
163 	sc->mlx_mem_rid = MLX_CFG_BASE1;
164 	sc->mlx_mem = bus_alloc_resource_any(dev, sc->mlx_mem_type,
165 		&sc->mlx_mem_rid, RF_ACTIVE);
166 	if (sc->mlx_mem == NULL) {
167 	    sc->mlx_mem_type = SYS_RES_IOPORT;
168 	    sc->mlx_mem_rid = MLX_CFG_BASE0;
169 	    sc->mlx_mem = bus_alloc_resource_any(dev, sc->mlx_mem_type,
170 		&sc->mlx_mem_rid, RF_ACTIVE);
171 	}
172 	break;
173     case MLX_IFTYPE_4:
174     case MLX_IFTYPE_5:
175 	sc->mlx_mem_type = SYS_RES_MEMORY;
176 	sc->mlx_mem_rid = MLX_CFG_BASE0;
177 	sc->mlx_mem = bus_alloc_resource_any(dev, sc->mlx_mem_type,
178 		&sc->mlx_mem_rid, RF_ACTIVE);
179 	break;
180     }
181     if (sc->mlx_mem == NULL) {
182 	device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
183 	mlx_free(sc);
184 	return(ENXIO);
185     }
186     sc->mlx_btag = rman_get_bustag(sc->mlx_mem);
187     sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem);
188 
189     /*
190      * Allocate the parent bus DMA tag appropriate for PCI.
191      */
192     error = bus_dma_tag_create(NULL, 			/* parent */
193 			       1, 0, 			/* alignment, boundary */
194 			       BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
195 			       BUS_SPACE_MAXADDR, 	/* highaddr */
196 			       NULL, NULL, 		/* filter, filterarg */
197 			       MAXBSIZE, MLX_NSEG,	/* maxsize, nsegments */
198 			       BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
199 			       BUS_DMA_ALLOCNOW,	/* flags */
200 			       NULL,			/* lockfunc */
201 			       NULL,			/* lockarg */
202 			       &sc->mlx_parent_dmat);
203     if (error != 0) {
204 	device_printf(dev, "can't allocate parent DMA tag\n");
205 	mlx_free(sc);
206 	return(ENOMEM);
207     }
208 
209     /*
210      * Do bus-independant initialisation.
211      */
212     error = mlx_attach(sc);
213     if (error != 0) {
214 	mlx_free(sc);
215 	return(error);
216     }
217 
218     /*
219      * Start the controller.
220      */
221     mlx_startup(sc);
222     return(0);
223 }
224