xref: /freebsd/sys/dev/mlx/mlx_pci.c (revision 2be1a816b9ff69588e55be0a84cbe2a31efc0f2f)
1 /*-
2  * Copyright (c) 1999 Michael Smith
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/module.h>
34 
35 #include <sys/bus.h>
36 #include <sys/conf.h>
37 
38 #include <machine/bus.h>
39 #include <machine/resource.h>
40 #include <sys/rman.h>
41 
42 #include <geom/geom_disk.h>
43 
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 
47 #include <dev/mlx/mlx_compat.h>
48 #include <dev/mlx/mlxio.h>
49 #include <dev/mlx/mlxvar.h>
50 #include <dev/mlx/mlxreg.h>
51 
52 static int			mlx_pci_probe(device_t dev);
53 static int			mlx_pci_attach(device_t dev);
54 
55 static device_method_t mlx_methods[] = {
56     /* Device interface */
57     DEVMETHOD(device_probe,	mlx_pci_probe),
58     DEVMETHOD(device_attach,	mlx_pci_attach),
59     DEVMETHOD(device_detach,	mlx_detach),
60     DEVMETHOD(device_shutdown,	mlx_shutdown),
61     DEVMETHOD(device_suspend,	mlx_suspend),
62     DEVMETHOD(device_resume,	mlx_resume),
63 
64     DEVMETHOD(bus_print_child,	bus_generic_print_child),
65     DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
66     { 0, 0 }
67 };
68 
69 static driver_t mlx_pci_driver = {
70 	"mlx",
71 	mlx_methods,
72 	sizeof(struct mlx_softc)
73 };
74 
75 DRIVER_MODULE(mlx, pci, mlx_pci_driver, mlx_devclass, 0, 0);
76 
77 struct mlx_ident
78 {
79     u_int16_t	vendor;
80     u_int16_t	device;
81     u_int16_t	subvendor;
82     u_int16_t	subdevice;
83     int		iftype;
84     char	*desc;
85 } mlx_identifiers[] = {
86     {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"},
87     {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
88     {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
89     {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
90     {0, 0, 0, 0, 0, 0}
91 };
92 
93 static int
94 mlx_pci_probe(device_t dev)
95 {
96     struct mlx_ident	*m;
97 
98     debug_called(1);
99 
100     for (m = mlx_identifiers; m->vendor != 0; m++) {
101 	if ((m->vendor == pci_get_vendor(dev)) &&
102 	    (m->device == pci_get_device(dev)) &&
103 	    ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
104 				     (m->subdevice == pci_get_subdevice(dev))))) {
105 
106 	    device_set_desc(dev, m->desc);
107 	    return(BUS_PROBE_DEFAULT);
108 	}
109     }
110     return(ENXIO);
111 }
112 
113 static int
114 mlx_pci_attach(device_t dev)
115 {
116     struct mlx_softc	*sc;
117     int			i, error;
118     u_int32_t		command;
119 
120     debug_called(1);
121 
122     /*
123      * Make sure we are going to be able to talk to this board.
124      */
125     command = pci_read_config(dev, PCIR_COMMAND, 2);
126     if ((command & PCIM_CMD_MEMEN) == 0) {
127 	device_printf(dev, "memory window not available\n");
128 	return(ENXIO);
129     }
130     /* force the busmaster enable bit on */
131     command |= PCIM_CMD_BUSMASTEREN;
132     pci_write_config(dev, PCIR_COMMAND, command, 2);
133 
134     /*
135      * Initialise softc.
136      */
137     sc = device_get_softc(dev);
138     bzero(sc, sizeof(*sc));
139     sc->mlx_dev = dev;
140 
141     /*
142      * Work out what sort of adapter this is (we need to know this in order
143      * to map the appropriate interface resources).
144      */
145     sc->mlx_iftype = 0;
146     for (i = 0; mlx_identifiers[i].vendor != 0; i++) {
147 	if ((mlx_identifiers[i].vendor == pci_get_vendor(dev)) &&
148 	    (mlx_identifiers[i].device == pci_get_device(dev))) {
149 	    sc->mlx_iftype = mlx_identifiers[i].iftype;
150 	    break;
151 	}
152     }
153     if (sc->mlx_iftype == 0)		/* shouldn't happen */
154 	return(ENXIO);
155 
156     /*
157      * Allocate the PCI register window.
158      */
159 
160     /* type 2/3 adapters have an I/O region we don't prefer at base 0 */
161     switch(sc->mlx_iftype) {
162     case MLX_IFTYPE_2:
163     case MLX_IFTYPE_3:
164 	sc->mlx_mem_type = SYS_RES_MEMORY;
165 	sc->mlx_mem_rid = MLX_CFG_BASE1;
166 	sc->mlx_mem = bus_alloc_resource_any(dev, sc->mlx_mem_type,
167 		&sc->mlx_mem_rid, RF_ACTIVE);
168 	if (sc->mlx_mem == NULL) {
169 	    sc->mlx_mem_type = SYS_RES_IOPORT;
170 	    sc->mlx_mem_rid = MLX_CFG_BASE0;
171 	    sc->mlx_mem = bus_alloc_resource_any(dev, sc->mlx_mem_type,
172 		&sc->mlx_mem_rid, RF_ACTIVE);
173 	}
174 	break;
175     case MLX_IFTYPE_4:
176     case MLX_IFTYPE_5:
177 	sc->mlx_mem_type = SYS_RES_MEMORY;
178 	sc->mlx_mem_rid = MLX_CFG_BASE0;
179 	sc->mlx_mem = bus_alloc_resource_any(dev, sc->mlx_mem_type,
180 		&sc->mlx_mem_rid, RF_ACTIVE);
181 	break;
182     }
183     if (sc->mlx_mem == NULL) {
184 	device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
185 	mlx_free(sc);
186 	return(ENXIO);
187     }
188     sc->mlx_btag = rman_get_bustag(sc->mlx_mem);
189     sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem);
190 
191     /*
192      * Allocate the parent bus DMA tag appropriate for PCI.
193      */
194     error = bus_dma_tag_create(NULL, 			/* parent */
195 			       1, 0, 			/* alignment, boundary */
196 			       BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
197 			       BUS_SPACE_MAXADDR, 	/* highaddr */
198 			       NULL, NULL, 		/* filter, filterarg */
199 			       MAXBSIZE, MLX_NSEG,	/* maxsize, nsegments */
200 			       BUS_SPACE_MAXSIZE_32BIT,	/* maxsegsize */
201 			       BUS_DMA_ALLOCNOW,	/* flags */
202 			       NULL,			/* lockfunc */
203 			       NULL,			/* lockarg */
204 			       &sc->mlx_parent_dmat);
205     if (error != 0) {
206 	device_printf(dev, "can't allocate parent DMA tag\n");
207 	mlx_free(sc);
208 	return(ENOMEM);
209     }
210 
211     /*
212      * Do bus-independant initialisation.
213      */
214     error = mlx_attach(sc);
215     if (error != 0) {
216 	mlx_free(sc);
217 	return(error);
218     }
219 
220     /*
221      * Start the controller.
222      */
223     mlx_startup(sc);
224     return(0);
225 }
226