xref: /freebsd/sys/dev/mii/truephy.c (revision 1c6d60de932c8553af44629218cb9697bc0f2ef1)
1 /*-
2  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
3  *
4  * This code is derived from software contributed to The DragonFly Project
5  * by Sepherosa Ziehau <sepherosa@gmail.com>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in
15  *    the documentation and/or other materials provided with the
16  *    distribution.
17  * 3. Neither the name of The DragonFly Project nor the names of its
18  *    contributors may be used to endorse or promote products derived
19  *    from this software without specific, prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.3 2008/02/10 07:29:27 sephe Exp $
35  * $FreeBSD$
36  */
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/socket.h>
42 #include <sys/errno.h>
43 #include <sys/module.h>
44 #include <sys/bus.h>
45 
46 #include <net/if.h>
47 #include <net/if_var.h>
48 #include <net/if_media.h>
49 #include <net/if_arp.h>
50 #include <net/ethernet.h>
51 #include <net/if_vlan_var.h>
52 
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include "miidevs.h"
56 
57 #include <dev/mii/truephyreg.h>
58 
59 #include "miibus_if.h"
60 
61 #define	TRUEPHY_FRAMELEN(mtu)	\
62     (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + (mtu) + ETHER_CRC_LEN)
63 
64 static int	truephy_service(struct mii_softc *, struct mii_data *, int);
65 static int	truephy_attach(device_t);
66 static int	truephy_probe(device_t);
67 static void	truephy_reset(struct mii_softc *);
68 static void	truephy_status(struct mii_softc *);
69 
70 static device_method_t truephy_methods[] = {
71 	/* device interface */
72 	DEVMETHOD(device_probe,		truephy_probe),
73 	DEVMETHOD(device_attach,	truephy_attach),
74 	DEVMETHOD(device_detach,	mii_phy_detach),
75 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
76 	DEVMETHOD_END
77 };
78 
79 static const struct mii_phydesc truephys[] = {
80 	MII_PHY_DESC(AGERE,	ET1011),
81 	MII_PHY_DESC(AGERE,	ET1011C),
82 	MII_PHY_END
83 };
84 
85 static devclass_t truephy_devclass;
86 
87 static driver_t truephy_driver = {
88 	"truephy",
89 	truephy_methods,
90 	sizeof(struct mii_softc)
91 };
92 
93 DRIVER_MODULE(truephy, miibus, truephy_driver, truephy_devclass, 0, 0);
94 
95 static const struct mii_phy_funcs truephy_funcs = {
96 	truephy_service,
97 	truephy_status,
98 	truephy_reset
99 };
100 
101 static const struct truephy_dsp {
102 	uint16_t	index;
103 	uint16_t	data;
104 } truephy_dspcode[] = {
105 	{ 0x880b,	0x0926 },	/* AfeIfCreg4B1000Msbs */
106 	{ 0x880c,	0x0926 },	/* AfeIfCreg4B100Msbs */
107 	{ 0x880d,	0x0926 },	/* AfeIfCreg4B10Msbs */
108 
109 	{ 0x880e,	0xb4d3 },	/* AfeIfCreg4B1000Lsbs */
110 	{ 0x880f,	0xb4d3 },	/* AfeIfCreg4B100Lsbs */
111 	{ 0x8810,	0xb4d3 },	/* AfeIfCreg4B10Lsbs */
112 
113 	{ 0x8805,	0xb03e },	/* AfeIfCreg3B1000Msbs */
114 	{ 0x8806,	0xb03e },	/* AfeIfCreg3B100Msbs */
115 	{ 0x8807,	0xff00 },	/* AfeIfCreg3B10Msbs */
116 
117 	{ 0x8808,	0xe090 },	/* AfeIfCreg3B1000Lsbs */
118 	{ 0x8809,	0xe110 },	/* AfeIfCreg3B100Lsbs */
119 	{ 0x880a,	0x0000 },	/* AfeIfCreg3B10Lsbs */
120 
121 	{ 0x300d,	1      },	/* DisableNorm */
122 
123 	{ 0x280c,	0x0180 },	/* LinkHoldEnd */
124 
125 	{ 0x1c21,	0x0002 },	/* AlphaM */
126 
127 	{ 0x3821,	6      },	/* FfeLkgTx0 */
128 	{ 0x381d,	1      },	/* FfeLkg1g4 */
129 	{ 0x381e,	1      },	/* FfeLkg1g5 */
130 	{ 0x381f,	1      },	/* FfeLkg1g6 */
131 	{ 0x3820,	1      },	/* FfeLkg1g7 */
132 
133 	{ 0x8402,	0x01f0 },	/* Btinact */
134 	{ 0x800e,	20     },	/* LftrainTime */
135 	{ 0x800f,	24     },	/* DvguardTime */
136 	{ 0x8010,	46     }	/* IdlguardTime */
137 };
138 
139 static int
140 truephy_probe(device_t dev)
141 {
142 
143 	return (mii_phy_dev_probe(dev, truephys, BUS_PROBE_DEFAULT));
144 }
145 
146 static int
147 truephy_attach(device_t dev)
148 {
149 	struct mii_softc *sc;
150 
151 	sc = device_get_softc(dev);
152 
153 	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
154 	   &truephy_funcs, 0);
155 
156 	PHY_RESET(sc);
157 
158 	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
159 	if (sc->mii_capabilities & BMSR_EXTSTAT) {
160 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
161 		/* No 1000baseT half-duplex support */
162 		sc->mii_extcapabilities &= ~EXTSR_1000THDX;
163 	}
164 
165 	device_printf(dev, " ");
166 	mii_phy_add_media(sc);
167 	printf("\n");
168 
169 	MIIBUS_MEDIAINIT(sc->mii_dev);
170 	return (0);
171 }
172 
173 static int
174 truephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
175 {
176 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
177 	int bmcr;
178 
179 	switch (cmd) {
180 	case MII_POLLSTAT:
181 		break;
182 
183 	case MII_MEDIACHG:
184 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
185 			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
186 			PHY_WRITE(sc, MII_BMCR, bmcr);
187 			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
188 		}
189 
190 		mii_phy_setmedia(sc);
191 
192 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
193 			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
194 			PHY_WRITE(sc, MII_BMCR, bmcr);
195 
196 			if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
197 				PHY_WRITE(sc, MII_BMCR,
198 				    bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
199 			}
200 		}
201 		break;
202 
203 	case MII_TICK:
204 		if (mii_phy_tick(sc) == EJUSTRETURN)
205 			return (0);
206 		break;
207 	}
208 
209 	/* Update the media status. */
210 	PHY_STATUS(sc);
211 
212 	/* Callback if something changed. */
213 	mii_phy_update(sc, cmd);
214 	return (0);
215 }
216 
217 static void
218 truephy_reset(struct mii_softc *sc)
219 {
220 	int i;
221 
222 	if (sc->mii_mpd_model == MII_MODEL_AGERE_ET1011) {
223 		mii_phy_reset(sc);
224 		return;
225 	}
226 
227 	for (i = 0; i < 2; ++i) {
228 		PHY_READ(sc, MII_PHYIDR1);
229 		PHY_READ(sc, MII_PHYIDR2);
230 
231 		PHY_READ(sc, TRUEPHY_CTRL);
232 		PHY_WRITE(sc, TRUEPHY_CTRL,
233 			  TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1);
234 
235 		PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC);
236 		PHY_READ(sc, TRUEPHY_DATA);
237 
238 		PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
239 	}
240 
241 	PHY_READ(sc, MII_BMCR);
242 	PHY_READ(sc, TRUEPHY_CTRL);
243 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
244 	PHY_WRITE(sc, TRUEPHY_CTRL,
245 		  TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0);
246 
247 #define N(arr)	(int)(sizeof(arr) / sizeof(arr[0]))
248 
249 	for (i = 0; i < N(truephy_dspcode); ++i) {
250 		const struct truephy_dsp *dsp = &truephy_dspcode[i];
251 
252 		PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
253 		PHY_WRITE(sc, TRUEPHY_DATA, dsp->data);
254 
255 		PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
256 		PHY_READ(sc, TRUEPHY_DATA);
257 	}
258 
259 #undef N
260 
261 	PHY_READ(sc, MII_BMCR);
262 	PHY_READ(sc, TRUEPHY_CTRL);
263 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN |  BMCR_S1000);
264 	PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
265 
266 	mii_phy_reset(sc);
267 
268 	if (TRUEPHY_FRAMELEN(sc->mii_pdata->mii_ifp->if_mtu) > 2048) {
269 		int conf;
270 
271 		conf = PHY_READ(sc, TRUEPHY_CONF);
272 		conf &= ~TRUEPHY_CONF_TXFIFO_MASK;
273 		conf |= TRUEPHY_CONF_TXFIFO_24;
274 		PHY_WRITE(sc, TRUEPHY_CONF, conf);
275 	}
276 }
277 
278 static void
279 truephy_status(struct mii_softc *sc)
280 {
281 	struct mii_data *mii = sc->mii_pdata;
282 	int bmsr, bmcr, sr;
283 
284 	mii->mii_media_status = IFM_AVALID;
285 	mii->mii_media_active = IFM_ETHER;
286 
287 	sr = PHY_READ(sc, TRUEPHY_SR);
288 	bmcr = PHY_READ(sc, MII_BMCR);
289 
290 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
291 	if (bmsr & BMSR_LINK)
292 		mii->mii_media_status |= IFM_ACTIVE;
293 
294 	if (bmcr & BMCR_AUTOEN) {
295 		if ((bmsr & BMSR_ACOMP) == 0) {
296 			mii->mii_media_active |= IFM_NONE;
297 			return;
298 		}
299 	}
300 
301 	switch (sr & TRUEPHY_SR_SPD_MASK) {
302 	case TRUEPHY_SR_SPD_1000T:
303 		mii->mii_media_active |= IFM_1000_T;
304 		break;
305 	case TRUEPHY_SR_SPD_100TX:
306 		mii->mii_media_active |= IFM_100_TX;
307 		break;
308 	case TRUEPHY_SR_SPD_10T:
309 		mii->mii_media_active |= IFM_10_T;
310 		break;
311 	default:
312 		/* XXX will this ever happen? */
313 		printf("invalid media SR %#x\n", sr);
314 		mii->mii_media_active |= IFM_NONE;
315 		return;
316 	}
317 
318 	if (sr & TRUEPHY_SR_FDX)
319 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
320 	else
321 		mii->mii_media_active |= IFM_HDX;
322 }
323