xref: /freebsd/sys/dev/mii/smcphy.c (revision dd41de95a84d979615a2ef11df6850622bf6184e)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 Benno Rice.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 /*
31  * Driver for the SEEQ 80220 and 84220.
32  * (Originally developed for the internal PHY on the SMSC LAN91C111.)
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/errno.h>
40 #include <sys/module.h>
41 #include <sys/bus.h>
42 #include <sys/malloc.h>
43 
44 #include <machine/bus.h>
45 
46 #include <net/if.h>
47 #include <net/if_media.h>
48 
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
51 #include "miidevs.h"
52 
53 #include "miibus_if.h"
54 
55 static int	smcphy_probe(device_t);
56 static int	smcphy_attach(device_t);
57 
58 static int	smcphy_service(struct mii_softc *, struct mii_data *, int);
59 static void	smcphy_reset(struct mii_softc *);
60 static void	smcphy_auto(struct mii_softc *, int);
61 static void	smcphy_status(struct mii_softc *);
62 
63 static device_method_t smcphy_methods[] = {
64 	/* device interface */
65 	DEVMETHOD(device_probe,		smcphy_probe),
66 	DEVMETHOD(device_attach,	smcphy_attach),
67 	DEVMETHOD(device_detach,	mii_phy_detach),
68 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
69 	DEVMETHOD_END
70 };
71 
72 static devclass_t smcphy_devclass;
73 
74 static driver_t smcphy_driver = {
75 	"smcphy",
76 	smcphy_methods,
77 	sizeof(struct mii_softc)
78 };
79 
80 DRIVER_MODULE(smcphy, miibus, smcphy_driver, smcphy_devclass, 0, 0);
81 
82 static const struct mii_phydesc smcphys[] = {
83 	MII_PHY_DESC(SEEQ, 80220),
84 	MII_PHY_DESC(SEEQ, 84220),
85 	MII_PHY_END
86 };
87 
88 static const struct mii_phy_funcs smcphy80220_funcs = {
89 	smcphy_service,
90 	smcphy_status,
91 	mii_phy_reset
92 };
93 
94 static const struct mii_phy_funcs smcphy_funcs = {
95 	smcphy_service,
96 	smcphy_status,
97 	smcphy_reset
98 };
99 
100 static int
101 smcphy_probe(device_t dev)
102 {
103 
104 	return (mii_phy_dev_probe(dev, smcphys, BUS_PROBE_DEFAULT));
105 }
106 
107 static int
108 smcphy_attach(device_t dev)
109 {
110 	struct mii_softc *sc;
111 	struct mii_attach_args *ma;
112 	const struct mii_phy_funcs *mpf;
113 
114 	sc = device_get_softc(dev);
115 	ma = device_get_ivars(dev);
116 	if (MII_MODEL(ma->mii_id2) == MII_MODEL_SEEQ_80220)
117 		mpf = &smcphy80220_funcs;
118 	else
119 		mpf = &smcphy_funcs;
120 	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, mpf, 1);
121 	mii_phy_setmedia(sc);
122 
123 	return (0);
124 }
125 
126 static int
127 smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
128 {
129         struct	ifmedia_entry *ife;
130         int	reg;
131 
132 	ife = mii->mii_media.ifm_cur;
133 
134         switch (cmd) {
135         case MII_POLLSTAT:
136                 break;
137 
138         case MII_MEDIACHG:
139 		switch (IFM_SUBTYPE(ife->ifm_media)) {
140 		case IFM_AUTO:
141 			smcphy_auto(sc, ife->ifm_media);
142 			break;
143 
144 		default:
145                 	mii_phy_setmedia(sc);
146 			break;
147 		}
148 
149                 break;
150 
151         case MII_TICK:
152 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
153 			break;
154 		}
155 
156 		/* I have no idea why BMCR_ISO gets set. */
157 		reg = PHY_READ(sc, MII_BMCR);
158 		if (reg & BMCR_ISO) {
159 			PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
160 		}
161 
162 		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
163 		if (reg & BMSR_LINK) {
164 			sc->mii_ticks = 0;
165 			break;
166 		}
167 
168 		if (++sc->mii_ticks <= MII_ANEGTICKS) {
169 			break;
170 		}
171 
172 		sc->mii_ticks = 0;
173 		PHY_RESET(sc);
174 		smcphy_auto(sc, ife->ifm_media);
175                 break;
176         }
177 
178         /* Update the media status. */
179         PHY_STATUS(sc);
180 
181         /* Callback if something changed. */
182         mii_phy_update(sc, cmd);
183         return (0);
184 }
185 
186 static void
187 smcphy_reset(struct mii_softc *sc)
188 {
189 	u_int	bmcr;
190 	int	timeout;
191 
192 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
193 
194 	for (timeout = 2; timeout > 0; timeout--) {
195 		DELAY(50000);
196 		bmcr = PHY_READ(sc, MII_BMCR);
197 		if ((bmcr & BMCR_RESET) == 0)
198 			break;
199 	}
200 
201 	if (bmcr & BMCR_RESET)
202 		device_printf(sc->mii_dev, "reset failed\n");
203 
204 	PHY_WRITE(sc, MII_BMCR, 0x3000);
205 
206 	/* Mask interrupts, we poll instead. */
207 	PHY_WRITE(sc, 0x1e, 0xffc0);
208 }
209 
210 static void
211 smcphy_auto(struct mii_softc *sc, int media)
212 {
213 	uint16_t	anar;
214 
215 	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
216 	if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
217 		anar |= ANAR_FC;
218 	PHY_WRITE(sc, MII_ANAR, anar);
219 	/* Apparently this helps. */
220 	anar = PHY_READ(sc, MII_ANAR);
221 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
222 }
223 
224 static void
225 smcphy_status(struct mii_softc *sc)
226 {
227 	struct mii_data *mii;
228 	uint32_t bmcr, bmsr, status;
229 
230 	mii = sc->mii_pdata;
231 	mii->mii_media_status = IFM_AVALID;
232 	mii->mii_media_active = IFM_ETHER;
233 
234 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
235 	if ((bmsr & BMSR_LINK) != 0)
236 		mii->mii_media_status |= IFM_ACTIVE;
237 
238 	bmcr = PHY_READ(sc, MII_BMCR);
239 	if ((bmcr & BMCR_ISO) != 0) {
240 		mii->mii_media_active |= IFM_NONE;
241 		mii->mii_media_status = 0;
242 		return;
243 	}
244 
245 	if ((bmcr & BMCR_LOOP) != 0)
246 		mii->mii_media_active |= IFM_LOOP;
247 
248 	if ((bmcr & BMCR_AUTOEN) != 0) {
249 		if ((bmsr & BMSR_ACOMP) == 0) {
250 			/* Erg, still trying, I guess... */
251 			mii->mii_media_active |= IFM_NONE;
252 			return;
253 		}
254 	}
255 
256 	status = PHY_READ(sc, 0x12);
257 	if (status & 0x0080)
258 		mii->mii_media_active |= IFM_100_TX;
259 	else
260 		mii->mii_media_active |= IFM_10_T;
261 	if (status & 0x0040)
262 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
263 	else
264 		mii->mii_media_active |= IFM_HDX;
265 }
266