xref: /freebsd/sys/dev/mii/smcphy.c (revision af23369a6deaaeb612ab266eb88b8bb8d560c322)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 Benno Rice.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 /*
31  * Driver for the SEEQ 80220 and 84220.
32  * (Originally developed for the internal PHY on the SMSC LAN91C111.)
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/errno.h>
40 #include <sys/module.h>
41 #include <sys/bus.h>
42 #include <sys/malloc.h>
43 
44 #include <machine/bus.h>
45 
46 #include <net/if.h>
47 #include <net/if_media.h>
48 
49 #include <dev/mii/mii.h>
50 #include <dev/mii/miivar.h>
51 #include "miidevs.h"
52 
53 #include "miibus_if.h"
54 
55 static int	smcphy_probe(device_t);
56 static int	smcphy_attach(device_t);
57 
58 static int	smcphy_service(struct mii_softc *, struct mii_data *, int);
59 static void	smcphy_reset(struct mii_softc *);
60 static void	smcphy_auto(struct mii_softc *, int);
61 static void	smcphy_status(struct mii_softc *);
62 
63 static device_method_t smcphy_methods[] = {
64 	/* device interface */
65 	DEVMETHOD(device_probe,		smcphy_probe),
66 	DEVMETHOD(device_attach,	smcphy_attach),
67 	DEVMETHOD(device_detach,	mii_phy_detach),
68 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
69 	DEVMETHOD_END
70 };
71 
72 static driver_t smcphy_driver = {
73 	"smcphy",
74 	smcphy_methods,
75 	sizeof(struct mii_softc)
76 };
77 
78 DRIVER_MODULE(smcphy, miibus, smcphy_driver, 0, 0);
79 
80 static const struct mii_phydesc smcphys[] = {
81 	MII_PHY_DESC(SEEQ, 80220),
82 	MII_PHY_DESC(SEEQ, 84220),
83 	MII_PHY_END
84 };
85 
86 static const struct mii_phy_funcs smcphy80220_funcs = {
87 	smcphy_service,
88 	smcphy_status,
89 	mii_phy_reset
90 };
91 
92 static const struct mii_phy_funcs smcphy_funcs = {
93 	smcphy_service,
94 	smcphy_status,
95 	smcphy_reset
96 };
97 
98 static int
99 smcphy_probe(device_t dev)
100 {
101 
102 	return (mii_phy_dev_probe(dev, smcphys, BUS_PROBE_DEFAULT));
103 }
104 
105 static int
106 smcphy_attach(device_t dev)
107 {
108 	struct mii_softc *sc;
109 	struct mii_attach_args *ma;
110 	const struct mii_phy_funcs *mpf;
111 
112 	sc = device_get_softc(dev);
113 	ma = device_get_ivars(dev);
114 	if (MII_MODEL(ma->mii_id2) == MII_MODEL_SEEQ_80220)
115 		mpf = &smcphy80220_funcs;
116 	else
117 		mpf = &smcphy_funcs;
118 	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, mpf, 1);
119 	mii_phy_setmedia(sc);
120 
121 	return (0);
122 }
123 
124 static int
125 smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
126 {
127         struct	ifmedia_entry *ife;
128         int	reg;
129 
130 	ife = mii->mii_media.ifm_cur;
131 
132         switch (cmd) {
133         case MII_POLLSTAT:
134                 break;
135 
136         case MII_MEDIACHG:
137 		switch (IFM_SUBTYPE(ife->ifm_media)) {
138 		case IFM_AUTO:
139 			smcphy_auto(sc, ife->ifm_media);
140 			break;
141 
142 		default:
143                 	mii_phy_setmedia(sc);
144 			break;
145 		}
146 
147                 break;
148 
149         case MII_TICK:
150 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
151 			break;
152 		}
153 
154 		/* I have no idea why BMCR_ISO gets set. */
155 		reg = PHY_READ(sc, MII_BMCR);
156 		if (reg & BMCR_ISO) {
157 			PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
158 		}
159 
160 		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
161 		if (reg & BMSR_LINK) {
162 			sc->mii_ticks = 0;
163 			break;
164 		}
165 
166 		if (++sc->mii_ticks <= MII_ANEGTICKS) {
167 			break;
168 		}
169 
170 		sc->mii_ticks = 0;
171 		PHY_RESET(sc);
172 		smcphy_auto(sc, ife->ifm_media);
173                 break;
174         }
175 
176         /* Update the media status. */
177         PHY_STATUS(sc);
178 
179         /* Callback if something changed. */
180         mii_phy_update(sc, cmd);
181         return (0);
182 }
183 
184 static void
185 smcphy_reset(struct mii_softc *sc)
186 {
187 	u_int	bmcr;
188 	int	timeout;
189 
190 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
191 
192 	for (timeout = 2; timeout > 0; timeout--) {
193 		DELAY(50000);
194 		bmcr = PHY_READ(sc, MII_BMCR);
195 		if ((bmcr & BMCR_RESET) == 0)
196 			break;
197 	}
198 
199 	if (bmcr & BMCR_RESET)
200 		device_printf(sc->mii_dev, "reset failed\n");
201 
202 	PHY_WRITE(sc, MII_BMCR, 0x3000);
203 
204 	/* Mask interrupts, we poll instead. */
205 	PHY_WRITE(sc, 0x1e, 0xffc0);
206 }
207 
208 static void
209 smcphy_auto(struct mii_softc *sc, int media)
210 {
211 	uint16_t	anar;
212 
213 	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
214 	if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
215 		anar |= ANAR_FC;
216 	PHY_WRITE(sc, MII_ANAR, anar);
217 	/* Apparently this helps. */
218 	anar = PHY_READ(sc, MII_ANAR);
219 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
220 }
221 
222 static void
223 smcphy_status(struct mii_softc *sc)
224 {
225 	struct mii_data *mii;
226 	uint32_t bmcr, bmsr, status;
227 
228 	mii = sc->mii_pdata;
229 	mii->mii_media_status = IFM_AVALID;
230 	mii->mii_media_active = IFM_ETHER;
231 
232 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
233 	if ((bmsr & BMSR_LINK) != 0)
234 		mii->mii_media_status |= IFM_ACTIVE;
235 
236 	bmcr = PHY_READ(sc, MII_BMCR);
237 	if ((bmcr & BMCR_ISO) != 0) {
238 		mii->mii_media_active |= IFM_NONE;
239 		mii->mii_media_status = 0;
240 		return;
241 	}
242 
243 	if ((bmcr & BMCR_LOOP) != 0)
244 		mii->mii_media_active |= IFM_LOOP;
245 
246 	if ((bmcr & BMCR_AUTOEN) != 0) {
247 		if ((bmsr & BMSR_ACOMP) == 0) {
248 			/* Erg, still trying, I guess... */
249 			mii->mii_media_active |= IFM_NONE;
250 			return;
251 		}
252 	}
253 
254 	status = PHY_READ(sc, 0x12);
255 	if (status & 0x0080)
256 		mii->mii_media_active |= IFM_100_TX;
257 	else
258 		mii->mii_media_active |= IFM_10_T;
259 	if (status & 0x0040)
260 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
261 	else
262 		mii->mii_media_active |= IFM_HDX;
263 }
264