xref: /freebsd/sys/dev/mii/smcphy.c (revision 2e3f49888ec8851bafb22011533217487764fdb0)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2006 Benno Rice.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 /*
29  * Driver for the SEEQ 80220 and 84220.
30  * (Originally developed for the internal PHY on the SMSC LAN91C111.)
31  */
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/socket.h>
37 #include <sys/errno.h>
38 #include <sys/module.h>
39 #include <sys/bus.h>
40 #include <sys/malloc.h>
41 
42 #include <machine/bus.h>
43 
44 #include <net/if.h>
45 #include <net/if_media.h>
46 
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
49 #include "miidevs.h"
50 
51 #include "miibus_if.h"
52 
53 static int	smcphy_probe(device_t);
54 static int	smcphy_attach(device_t);
55 
56 static int	smcphy_service(struct mii_softc *, struct mii_data *, int);
57 static void	smcphy_reset(struct mii_softc *);
58 static void	smcphy_auto(struct mii_softc *, int);
59 static void	smcphy_status(struct mii_softc *);
60 
61 static device_method_t smcphy_methods[] = {
62 	/* device interface */
63 	DEVMETHOD(device_probe,		smcphy_probe),
64 	DEVMETHOD(device_attach,	smcphy_attach),
65 	DEVMETHOD(device_detach,	mii_phy_detach),
66 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
67 	DEVMETHOD_END
68 };
69 
70 static driver_t smcphy_driver = {
71 	"smcphy",
72 	smcphy_methods,
73 	sizeof(struct mii_softc)
74 };
75 
76 DRIVER_MODULE(smcphy, miibus, smcphy_driver, 0, 0);
77 
78 static const struct mii_phydesc smcphys[] = {
79 	MII_PHY_DESC(SEEQ, 80220),
80 	MII_PHY_DESC(SEEQ, 84220),
81 	MII_PHY_END
82 };
83 
84 static const struct mii_phy_funcs smcphy80220_funcs = {
85 	smcphy_service,
86 	smcphy_status,
87 	mii_phy_reset
88 };
89 
90 static const struct mii_phy_funcs smcphy_funcs = {
91 	smcphy_service,
92 	smcphy_status,
93 	smcphy_reset
94 };
95 
96 static int
97 smcphy_probe(device_t dev)
98 {
99 
100 	return (mii_phy_dev_probe(dev, smcphys, BUS_PROBE_DEFAULT));
101 }
102 
103 static int
104 smcphy_attach(device_t dev)
105 {
106 	struct mii_softc *sc;
107 	struct mii_attach_args *ma;
108 	const struct mii_phy_funcs *mpf;
109 
110 	sc = device_get_softc(dev);
111 	ma = device_get_ivars(dev);
112 	if (MII_MODEL(ma->mii_id2) == MII_MODEL_SEEQ_80220)
113 		mpf = &smcphy80220_funcs;
114 	else
115 		mpf = &smcphy_funcs;
116 	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, mpf, 1);
117 	mii_phy_setmedia(sc);
118 
119 	return (0);
120 }
121 
122 static int
123 smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
124 {
125         struct	ifmedia_entry *ife;
126         int	reg;
127 
128 	ife = mii->mii_media.ifm_cur;
129 
130         switch (cmd) {
131         case MII_POLLSTAT:
132                 break;
133 
134         case MII_MEDIACHG:
135 		switch (IFM_SUBTYPE(ife->ifm_media)) {
136 		case IFM_AUTO:
137 			smcphy_auto(sc, ife->ifm_media);
138 			break;
139 
140 		default:
141                 	mii_phy_setmedia(sc);
142 			break;
143 		}
144 
145                 break;
146 
147         case MII_TICK:
148 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
149 			break;
150 		}
151 
152 		/* I have no idea why BMCR_ISO gets set. */
153 		reg = PHY_READ(sc, MII_BMCR);
154 		if (reg & BMCR_ISO) {
155 			PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
156 		}
157 
158 		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
159 		if (reg & BMSR_LINK) {
160 			sc->mii_ticks = 0;
161 			break;
162 		}
163 
164 		if (++sc->mii_ticks <= MII_ANEGTICKS) {
165 			break;
166 		}
167 
168 		sc->mii_ticks = 0;
169 		PHY_RESET(sc);
170 		smcphy_auto(sc, ife->ifm_media);
171                 break;
172         }
173 
174         /* Update the media status. */
175         PHY_STATUS(sc);
176 
177         /* Callback if something changed. */
178         mii_phy_update(sc, cmd);
179         return (0);
180 }
181 
182 static void
183 smcphy_reset(struct mii_softc *sc)
184 {
185 	u_int	bmcr;
186 	int	timeout;
187 
188 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
189 
190 	for (timeout = 2; timeout > 0; timeout--) {
191 		DELAY(50000);
192 		bmcr = PHY_READ(sc, MII_BMCR);
193 		if ((bmcr & BMCR_RESET) == 0)
194 			break;
195 	}
196 
197 	if (bmcr & BMCR_RESET)
198 		device_printf(sc->mii_dev, "reset failed\n");
199 
200 	PHY_WRITE(sc, MII_BMCR, 0x3000);
201 
202 	/* Mask interrupts, we poll instead. */
203 	PHY_WRITE(sc, 0x1e, 0xffc0);
204 }
205 
206 static void
207 smcphy_auto(struct mii_softc *sc, int media)
208 {
209 	uint16_t	anar;
210 
211 	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
212 	if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
213 		anar |= ANAR_FC;
214 	PHY_WRITE(sc, MII_ANAR, anar);
215 	/* Apparently this helps. */
216 	anar = PHY_READ(sc, MII_ANAR);
217 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
218 }
219 
220 static void
221 smcphy_status(struct mii_softc *sc)
222 {
223 	struct mii_data *mii;
224 	uint32_t bmcr, bmsr, status;
225 
226 	mii = sc->mii_pdata;
227 	mii->mii_media_status = IFM_AVALID;
228 	mii->mii_media_active = IFM_ETHER;
229 
230 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
231 	if ((bmsr & BMSR_LINK) != 0)
232 		mii->mii_media_status |= IFM_ACTIVE;
233 
234 	bmcr = PHY_READ(sc, MII_BMCR);
235 	if ((bmcr & BMCR_ISO) != 0) {
236 		mii->mii_media_active |= IFM_NONE;
237 		mii->mii_media_status = 0;
238 		return;
239 	}
240 
241 	if ((bmcr & BMCR_LOOP) != 0)
242 		mii->mii_media_active |= IFM_LOOP;
243 
244 	if ((bmcr & BMCR_AUTOEN) != 0) {
245 		if ((bmsr & BMSR_ACOMP) == 0) {
246 			/* Erg, still trying, I guess... */
247 			mii->mii_media_active |= IFM_NONE;
248 			return;
249 		}
250 	}
251 
252 	status = PHY_READ(sc, 0x12);
253 	if (status & 0x0080)
254 		mii->mii_media_active |= IFM_100_TX;
255 	else
256 		mii->mii_media_active |= IFM_10_T;
257 	if (status & 0x0040)
258 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
259 	else
260 		mii->mii_media_active |= IFM_HDX;
261 }
262