1694c6518SBenno Rice /*- 2694c6518SBenno Rice * Copyright (c) 2006 Benno Rice. All rights reserved. 3694c6518SBenno Rice * 4694c6518SBenno Rice * Redistribution and use in source and binary forms, with or without 5694c6518SBenno Rice * modification, are permitted provided that the following conditions 6694c6518SBenno Rice * are met: 7694c6518SBenno Rice * 1. Redistributions of source code must retain the above copyright 8694c6518SBenno Rice * notice, this list of conditions and the following disclaimer. 9694c6518SBenno Rice * 2. Redistributions in binary form must reproduce the above copyright 10694c6518SBenno Rice * notice, this list of conditions and the following disclaimer in the 11694c6518SBenno Rice * documentation and/or other materials provided with the distribution. 12694c6518SBenno Rice * 13694c6518SBenno Rice * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14694c6518SBenno Rice * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15694c6518SBenno Rice * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16694c6518SBenno Rice * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17694c6518SBenno Rice * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18694c6518SBenno Rice * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19694c6518SBenno Rice * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20694c6518SBenno Rice * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21694c6518SBenno Rice * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22694c6518SBenno Rice * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23694c6518SBenno Rice */ 24694c6518SBenno Rice 25694c6518SBenno Rice #include <sys/cdefs.h> 26694c6518SBenno Rice __FBSDID("$FreeBSD$"); 27694c6518SBenno Rice 28694c6518SBenno Rice /* 29694c6518SBenno Rice * Driver for the internal PHY on the SMSC LAN91C111. 30694c6518SBenno Rice */ 31694c6518SBenno Rice 32694c6518SBenno Rice #include <sys/param.h> 33694c6518SBenno Rice #include <sys/systm.h> 34694c6518SBenno Rice #include <sys/kernel.h> 35694c6518SBenno Rice #include <sys/socket.h> 36694c6518SBenno Rice #include <sys/errno.h> 37694c6518SBenno Rice #include <sys/module.h> 38694c6518SBenno Rice #include <sys/bus.h> 39694c6518SBenno Rice #include <sys/malloc.h> 40694c6518SBenno Rice 41694c6518SBenno Rice #include <machine/bus.h> 42694c6518SBenno Rice 43694c6518SBenno Rice #include <net/if.h> 44694c6518SBenno Rice #include <net/if_media.h> 45694c6518SBenno Rice 46694c6518SBenno Rice #include <dev/mii/mii.h> 47694c6518SBenno Rice #include <dev/mii/miivar.h> 48694c6518SBenno Rice #include "miidevs.h" 49694c6518SBenno Rice 50694c6518SBenno Rice #include "miibus_if.h" 51694c6518SBenno Rice 52694c6518SBenno Rice static int smcphy_probe(device_t); 53694c6518SBenno Rice static int smcphy_attach(device_t); 54694c6518SBenno Rice 55694c6518SBenno Rice static int smcphy_service(struct mii_softc *, struct mii_data *, int); 56*3fcb7a53SMarius Strobl static void smcphy_reset(struct mii_softc *); 57efd4fc3fSMarius Strobl static void smcphy_auto(struct mii_softc *, int); 58694c6518SBenno Rice 59694c6518SBenno Rice static device_method_t smcphy_methods[] = { 60694c6518SBenno Rice /* device interface */ 61694c6518SBenno Rice DEVMETHOD(device_probe, smcphy_probe), 62694c6518SBenno Rice DEVMETHOD(device_attach, smcphy_attach), 63694c6518SBenno Rice DEVMETHOD(device_detach, mii_phy_detach), 64694c6518SBenno Rice DEVMETHOD(device_shutdown, bus_generic_shutdown), 65694c6518SBenno Rice 66694c6518SBenno Rice { 0, 0 } 67694c6518SBenno Rice }; 68694c6518SBenno Rice 69694c6518SBenno Rice static devclass_t smcphy_devclass; 70694c6518SBenno Rice 71694c6518SBenno Rice static driver_t smcphy_driver = { 72694c6518SBenno Rice "smcphy", 73694c6518SBenno Rice smcphy_methods, 74694c6518SBenno Rice sizeof(struct mii_softc) 75694c6518SBenno Rice }; 76694c6518SBenno Rice 77694c6518SBenno Rice DRIVER_MODULE(smcphy, miibus, smcphy_driver, smcphy_devclass, 0, 0); 78694c6518SBenno Rice 79f6613debSMarius Strobl static const struct mii_phydesc smcphys[] = { 80*3fcb7a53SMarius Strobl MII_PHY_DESC(SEEQ, 84220), 81f6613debSMarius Strobl MII_PHY_END 82f6613debSMarius Strobl }; 83f6613debSMarius Strobl 84*3fcb7a53SMarius Strobl static const struct mii_phy_funcs smcphy_funcs = { 85*3fcb7a53SMarius Strobl smcphy_service, 86*3fcb7a53SMarius Strobl ukphy_status, 87*3fcb7a53SMarius Strobl smcphy_reset 88*3fcb7a53SMarius Strobl }; 89*3fcb7a53SMarius Strobl 90694c6518SBenno Rice static int 91694c6518SBenno Rice smcphy_probe(device_t dev) 92694c6518SBenno Rice { 93694c6518SBenno Rice 94f6613debSMarius Strobl return (mii_phy_dev_probe(dev, smcphys, BUS_PROBE_DEFAULT)); 95694c6518SBenno Rice } 96694c6518SBenno Rice 97694c6518SBenno Rice static int 98694c6518SBenno Rice smcphy_attach(device_t dev) 99694c6518SBenno Rice { 100694c6518SBenno Rice struct mii_softc *sc; 101694c6518SBenno Rice 102694c6518SBenno Rice sc = device_get_softc(dev); 103694c6518SBenno Rice 104*3fcb7a53SMarius Strobl mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, 105*3fcb7a53SMarius Strobl &smcphy_funcs, 1); 106694c6518SBenno Rice mii_phy_setmedia(sc); 107694c6518SBenno Rice 108694c6518SBenno Rice return (0); 109694c6518SBenno Rice } 110694c6518SBenno Rice 111694c6518SBenno Rice static int 112694c6518SBenno Rice smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 113694c6518SBenno Rice { 114694c6518SBenno Rice struct ifmedia_entry *ife; 115694c6518SBenno Rice int reg; 116694c6518SBenno Rice 117694c6518SBenno Rice ife = mii->mii_media.ifm_cur; 118694c6518SBenno Rice 119694c6518SBenno Rice switch (cmd) { 120694c6518SBenno Rice case MII_POLLSTAT: 121694c6518SBenno Rice break; 122694c6518SBenno Rice 123694c6518SBenno Rice case MII_MEDIACHG: 124694c6518SBenno Rice /* 125694c6518SBenno Rice * If the interface is not up, don't do anything. 126694c6518SBenno Rice */ 127694c6518SBenno Rice if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 128694c6518SBenno Rice break; 129694c6518SBenno Rice 130694c6518SBenno Rice switch (IFM_SUBTYPE(ife->ifm_media)) { 131694c6518SBenno Rice case IFM_AUTO: 132efd4fc3fSMarius Strobl smcphy_auto(sc, ife->ifm_media); 133694c6518SBenno Rice break; 134694c6518SBenno Rice 135694c6518SBenno Rice default: 136694c6518SBenno Rice mii_phy_setmedia(sc); 137694c6518SBenno Rice break; 138694c6518SBenno Rice } 139694c6518SBenno Rice 140694c6518SBenno Rice break; 141694c6518SBenno Rice 142694c6518SBenno Rice case MII_TICK: 143694c6518SBenno Rice if ((mii->mii_ifp->if_flags & IFF_UP) == 0) { 144694c6518SBenno Rice return (0); 145694c6518SBenno Rice } 146694c6518SBenno Rice 147694c6518SBenno Rice if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 148694c6518SBenno Rice break; 149694c6518SBenno Rice } 150694c6518SBenno Rice 151694c6518SBenno Rice /* I have no idea why BMCR_ISO gets set. */ 152694c6518SBenno Rice reg = PHY_READ(sc, MII_BMCR); 153694c6518SBenno Rice if (reg & BMCR_ISO) { 154694c6518SBenno Rice PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO); 155694c6518SBenno Rice } 156694c6518SBenno Rice 157694c6518SBenno Rice reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 158694c6518SBenno Rice if (reg & BMSR_LINK) { 159694c6518SBenno Rice sc->mii_ticks = 0; 160694c6518SBenno Rice break; 161694c6518SBenno Rice } 162694c6518SBenno Rice 163694c6518SBenno Rice if (++sc->mii_ticks <= MII_ANEGTICKS) { 164694c6518SBenno Rice break; 165694c6518SBenno Rice } 166694c6518SBenno Rice 167694c6518SBenno Rice sc->mii_ticks = 0; 168*3fcb7a53SMarius Strobl PHY_RESET(sc); 169efd4fc3fSMarius Strobl smcphy_auto(sc, ife->ifm_media); 170694c6518SBenno Rice break; 171694c6518SBenno Rice } 172694c6518SBenno Rice 173694c6518SBenno Rice /* Update the media status. */ 174*3fcb7a53SMarius Strobl PHY_STATUS(sc); 175694c6518SBenno Rice 176694c6518SBenno Rice /* Callback if something changed. */ 177694c6518SBenno Rice mii_phy_update(sc, cmd); 178694c6518SBenno Rice return (0); 179694c6518SBenno Rice } 180694c6518SBenno Rice 181*3fcb7a53SMarius Strobl static void 182694c6518SBenno Rice smcphy_reset(struct mii_softc *sc) 183694c6518SBenno Rice { 184694c6518SBenno Rice u_int bmcr; 185694c6518SBenno Rice int timeout; 186694c6518SBenno Rice 187694c6518SBenno Rice PHY_WRITE(sc, MII_BMCR, BMCR_RESET); 188694c6518SBenno Rice 189694c6518SBenno Rice for (timeout = 2; timeout > 0; timeout--) { 190694c6518SBenno Rice DELAY(50000); 191694c6518SBenno Rice bmcr = PHY_READ(sc, MII_BMCR); 192694c6518SBenno Rice if ((bmcr & BMCR_RESET) == 0) 193694c6518SBenno Rice break; 194694c6518SBenno Rice } 195694c6518SBenno Rice 196*3fcb7a53SMarius Strobl if (bmcr & BMCR_RESET) 197*3fcb7a53SMarius Strobl device_printf(sc->mii_dev, "reset failed\n"); 198694c6518SBenno Rice 199694c6518SBenno Rice PHY_WRITE(sc, MII_BMCR, 0x3000); 200*3fcb7a53SMarius Strobl 201*3fcb7a53SMarius Strobl /* Mask interrupts, we poll instead. */ 202*3fcb7a53SMarius Strobl PHY_WRITE(sc, 0x1e, 0xffc0); 203694c6518SBenno Rice } 204694c6518SBenno Rice 205694c6518SBenno Rice static void 206efd4fc3fSMarius Strobl smcphy_auto(struct mii_softc *sc, int media) 207694c6518SBenno Rice { 208694c6518SBenno Rice uint16_t anar; 209694c6518SBenno Rice 210694c6518SBenno Rice anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 211694c6518SBenno Rice ANAR_CSMA; 212efd4fc3fSMarius Strobl if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 213694c6518SBenno Rice anar |= ANAR_FC; 214694c6518SBenno Rice PHY_WRITE(sc, MII_ANAR, anar); 215694c6518SBenno Rice /* Apparently this helps. */ 216694c6518SBenno Rice anar = PHY_READ(sc, MII_ANAR); 217694c6518SBenno Rice PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 218694c6518SBenno Rice } 219