xref: /freebsd/sys/dev/mii/nsphy.c (revision 0b3105a37d7adcadcb720112fed4dc4e8040be99)
1 /*	$NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*-
34  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55  */
56 
57 #include <sys/cdefs.h>
58 __FBSDID("$FreeBSD$");
59 
60 /*
61  * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
62  * Data Sheet available from www.national.com
63  */
64 
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/kernel.h>
68 #include <sys/socket.h>
69 #include <sys/errno.h>
70 #include <sys/module.h>
71 #include <sys/bus.h>
72 
73 #include <net/if.h>
74 #include <net/if_var.h>
75 #include <net/if_media.h>
76 
77 #include <dev/mii/mii.h>
78 #include <dev/mii/miivar.h>
79 #include "miidevs.h"
80 
81 #include <dev/mii/nsphyreg.h>
82 
83 #include "miibus_if.h"
84 
85 static int nsphy_probe(device_t);
86 static int nsphy_attach(device_t);
87 
88 static device_method_t nsphy_methods[] = {
89 	/* device interface */
90 	DEVMETHOD(device_probe,		nsphy_probe),
91 	DEVMETHOD(device_attach,	nsphy_attach),
92 	DEVMETHOD(device_detach,	mii_phy_detach),
93 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
94 	DEVMETHOD_END
95 };
96 
97 static devclass_t nsphy_devclass;
98 
99 static driver_t nsphy_driver = {
100 	"nsphy",
101 	nsphy_methods,
102 	sizeof(struct mii_softc)
103 };
104 
105 DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0);
106 
107 static int	nsphy_service(struct mii_softc *, struct mii_data *, int);
108 static void	nsphy_status(struct mii_softc *);
109 static void	nsphy_reset(struct mii_softc *);
110 
111 static const struct mii_phydesc nsphys[] = {
112 	MII_PHY_DESC(xxNATSEMI, DP83840),
113 	MII_PHY_END
114 };
115 
116 static const struct mii_phy_funcs nsphy_funcs = {
117 	nsphy_service,
118 	nsphy_status,
119 	nsphy_reset
120 };
121 
122 static int
123 nsphy_probe(device_t dev)
124 {
125 
126 	return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
127 }
128 
129 static int
130 nsphy_attach(device_t dev)
131 {
132 	u_int flags;
133 
134 	flags = MIIF_NOMANPAUSE;
135 	/*
136 	 * Am79C971 wedge when isolating all of their external PHYs.
137 	 */
138 	if (mii_dev_mac_match(dev,"pcn"))
139 		flags |= MIIF_NOISOLATE;
140 	mii_phy_dev_attach(dev, flags, &nsphy_funcs, 1);
141 	return (0);
142 }
143 
144 static int
145 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
146 {
147 	int reg;
148 
149 	switch (cmd) {
150 	case MII_POLLSTAT:
151 		break;
152 
153 	case MII_MEDIACHG:
154 		reg = PHY_READ(sc, MII_NSPHY_PCR);
155 
156 		/*
157 		 * Set up the PCR to use LED4 to indicate full-duplex
158 		 * in both 10baseT and 100baseTX modes.
159 		 */
160 		reg |= PCR_LED4MODE;
161 
162 		/*
163 		 * Make sure Carrier Integrity Monitor function is
164 		 * disabled (normal for Node operation, but sometimes
165 		 * it's not set?!)
166 		 */
167 		reg |= PCR_CIMDIS;
168 
169 		/*
170 		 * Make sure "force link good" is set to normal mode.
171 		 * It's only intended for debugging.
172 		 */
173 		reg |= PCR_FLINK100;
174 
175 		/*
176 		 * Mystery bits which are supposedly `reserved',
177 		 * but we seem to need to set them when the PHY
178 		 * is connected to some interfaces:
179 		 *
180 		 * 0x0400 is needed for fxp
181 		 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
182 		 *        (nsphy with a DP83840 chip)
183 		 * 0x0100 may be needed for some other card
184 		 */
185 		reg |= 0x0100 | 0x0400;
186 
187 		if (mii_phy_mac_match(sc, "fxp"))
188 			PHY_WRITE(sc, MII_NSPHY_PCR, reg);
189 
190 		mii_phy_setmedia(sc);
191 		break;
192 
193 	case MII_TICK:
194 		if (mii_phy_tick(sc) == EJUSTRETURN)
195 			return (0);
196 		break;
197 	}
198 
199 	/* Update the media status. */
200 	PHY_STATUS(sc);
201 
202 	/* Callback if something changed. */
203 	mii_phy_update(sc, cmd);
204 	return (0);
205 }
206 
207 static void
208 nsphy_status(struct mii_softc *sc)
209 {
210 	struct mii_data *mii = sc->mii_pdata;
211 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
212 	int bmsr, bmcr, par, anlpar;
213 
214 	mii->mii_media_status = IFM_AVALID;
215 	mii->mii_media_active = IFM_ETHER;
216 
217 	bmsr = PHY_READ(sc, MII_BMSR) |
218 	    PHY_READ(sc, MII_BMSR);
219 	if (bmsr & BMSR_LINK)
220 		mii->mii_media_status |= IFM_ACTIVE;
221 
222 	bmcr = PHY_READ(sc, MII_BMCR);
223 	if (bmcr & BMCR_ISO) {
224 		mii->mii_media_active |= IFM_NONE;
225 		mii->mii_media_status = 0;
226 		return;
227 	}
228 
229 	if (bmcr & BMCR_LOOP)
230 		mii->mii_media_active |= IFM_LOOP;
231 
232 	if (bmcr & BMCR_AUTOEN) {
233 		/*
234 		 * The PAR status bits are only valid if autonegotiation
235 		 * has completed (or it's disabled).
236 		 */
237 		if ((bmsr & BMSR_ACOMP) == 0) {
238 			/* Erg, still trying, I guess... */
239 			mii->mii_media_active |= IFM_NONE;
240 			return;
241 		}
242 
243 		/*
244 		 * Argh.  The PAR doesn't seem to indicate duplex mode
245 		 * properly!  Determine media based on link partner's
246 		 * advertised capabilities.
247 		 */
248 		if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
249 			anlpar = PHY_READ(sc, MII_ANAR) &
250 			    PHY_READ(sc, MII_ANLPAR);
251 			if (anlpar & ANLPAR_TX_FD)
252 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
253 			else if (anlpar & ANLPAR_T4)
254 				mii->mii_media_active |= IFM_100_T4|IFM_HDX;
255 			else if (anlpar & ANLPAR_TX)
256 				mii->mii_media_active |= IFM_100_TX|IFM_HDX;
257 			else if (anlpar & ANLPAR_10_FD)
258 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
259 			else if (anlpar & ANLPAR_10)
260 				mii->mii_media_active |= IFM_10_T|IFM_HDX;
261 			else
262 				mii->mii_media_active |= IFM_NONE;
263 			if ((mii->mii_media_active & IFM_FDX) != 0)
264 				mii->mii_media_active |=
265 				    mii_phy_flowstatus(sc);
266 			return;
267 		}
268 
269 		/*
270 		 * Link partner is not capable of autonegotiation.
271 		 * We will never be in full-duplex mode if this is
272 		 * the case, so reading the PAR is OK.
273 		 */
274 		par = PHY_READ(sc, MII_NSPHY_PAR);
275 		if (par & PAR_10)
276 			mii->mii_media_active |= IFM_10_T;
277 		else
278 			mii->mii_media_active |= IFM_100_TX;
279 		mii->mii_media_active |= IFM_HDX;
280 	} else
281 		mii->mii_media_active = ife->ifm_media;
282 }
283 
284 static void
285 nsphy_reset(struct mii_softc *sc)
286 {
287 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
288 	int reg, i;
289 
290 	if (sc->mii_flags & MIIF_NOISOLATE)
291 		reg = BMCR_RESET;
292 	else
293 		reg = BMCR_RESET | BMCR_ISO;
294 	PHY_WRITE(sc, MII_BMCR, reg);
295 
296 	/*
297 	 * It is best to allow a little time for the reset to settle
298 	 * in before we start polling the BMCR again.  Notably, the
299 	 * DP83840A manuals state that there should be a 500us delay
300 	 * between asserting software reset and attempting MII serial
301 	 * operations.  Be conservative.
302 	 */
303 	DELAY(1000);
304 
305 	/*
306 	 * Wait another 2s for it to complete.
307 	 * This is only a little overkill as under normal circumstances
308 	 * the PHY can take up to 1s to complete reset.
309 	 * This is also a bit odd because after a reset, the BMCR will
310 	 * clear the reset bit and simply reports 0 even though the reset
311 	 * is not yet complete.
312 	 */
313 	for (i = 0; i < 1000; i++) {
314 		reg = PHY_READ(sc, MII_BMCR);
315 		if (reg != 0 && (reg & BMCR_RESET) == 0)
316 			break;
317 		DELAY(2000);
318 	}
319 
320 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
321 		if ((ife == NULL && sc->mii_inst != 0) ||
322 		    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
323 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
324 	}
325 }
326