xref: /freebsd/sys/dev/mii/nsgphyreg.h (revision 641a6cfb86023499caafe26a4d821a0b885cf00b)
1 /*-
2  * Copyright (c) 2001 Wind River Systems
3  * Copyright (c) 2001
4  *	Bill Paul <wpaul@bsdi.com>.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Bill Paul.
17  * 4. Neither the name of the author nor the names of any co-contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31  * THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  * $FreeBSD$
34  */
35 
36 #ifndef _DEV_MII_NSGPHYREG_H_
37 #define	_DEV_MII_NSGPHYREG_H_
38 
39 /*
40  * NatSemi DP83891 registers
41  */
42 
43 #define NSGPHY_MII_STRAPOPT	0x10	/* Strap options */
44 #define NSGPHY_STRAPOPT_PHYADDR	0xF800	/* PHY address */
45 #define NSGPHY_STRAPOPT_COMPAT	0x0400	/* Broadcom compat mode */
46 #define NSGPHY_STRAPOPT_MMSE	0x0200	/* Manual master/slave enable */
47 #define NSGPHY_STRAPOPT_ANEG	0x0100	/* Autoneg enable */
48 #define NSGPHY_STRAPOPT_MMSV	0x0080	/* Manual master/slave setting */
49 #define NSGPHY_STRAPOPT_1000HDX	0x0010	/* Advertise 1000 half-duplex */
50 #define NSGPHY_STRAPOPT_1000FDX	0x0008	/* Advertise 1000 full-duplex */
51 #define NSGPHY_STRAPOPT_100_ADV	0x0004	/* Advertise 100 full/half-duplex */
52 #define NSGPHY_STRAPOPT_SPEED1	0x0002	/* speed selection */
53 #define NSGPHY_STRAPOPT_SPEED0	0x0001	/* speed selection */
54 #define NSGPHY_STRAPOPT_SPDSEL  (NSGPHY_STRAPOPT_SPEED1|NSGPHY_STRAPOPT_SPEED0)
55 
56 #define NSGPHY_MII_PHYSUP	0x11	/* PHY support/current status */
57 #define PHY_SUP_SPEED1		0x0010  /* speed bit 1 */
58 #define PHY_SUP_SPEED0		0x0008  /* speed bit 1 */
59 #define NSGPHY_PHYSUP_SPEED1	0x0010	/* speed status */
60 #define NSGPHY_PHYSUP_SPEED0	0x0008	/* speed status */
61 #define NSGPHY_PHYSUP_SPDSTS	(NSGPHY_PHYSUP_SPEED1|NSGPHY_PHYSUP_SPEED0)
62 #define NSGPHY_PHYSUP_LNKSTS	0x0004	/* link status */
63 #define PHY_SUP_LINK		0x0004	/* link status */
64 #define PHY_SUP_DUPLEX		0x0002	/* 1 == full-duplex */
65 #define NSGPHY_PHYSUP_DUPSTS	0x0002	/* duplex status 1 == full */
66 #define NSGPHY_PHYSUP_10BT	0x0001	/* 10baseT resolved */
67 
68 #define NSGPHY_SPDSTS_1000	0x0010
69 #define NSGPHY_SPDSTS_100	0x0008
70 #define NSGPHY_SPDSTS_10	0x0000
71 
72 #endif /* _DEV_NSGPHY_MIIREG_H_ */
73