1 /* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 2001 4 * Bill Paul <wpaul@bsdi.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD$ 34 */ 35 36 /* 37 * Driver for the National Semiconductor DP83891 and DP83861 38 * 10/100/1000 PHYs. 39 * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf 40 * 41 * The DP83891 is the older NatSemi gigE PHY which isn't being sold 42 * anymore. The DP83861 is its replacement, which is an 'enhanced' 43 * firmware driven component. The major difference between the 44 * two is that the 83891 can't generate interrupts, while the 45 * 83861 can. (I think it wasn't originally designed to do this, but 46 * it can now thanks to firmware updates.) The 83861 also allows 47 * access to its internal RAM via indirect register access. 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/socket.h> 55 #include <sys/bus.h> 56 57 #include <machine/clock.h> 58 59 #include <net/if.h> 60 #include <net/if_media.h> 61 62 #include <dev/mii/mii.h> 63 #include <dev/mii/miivar.h> 64 #include <dev/mii/miidevs.h> 65 66 #include <dev/mii/nsgphyreg.h> 67 68 #include "miibus_if.h" 69 70 #if !defined(lint) 71 static const char rcsid[] = 72 "$FreeBSD$"; 73 #endif 74 75 static int nsgphy_probe (device_t); 76 static int nsgphy_attach (device_t); 77 static int nsgphy_detach (device_t); 78 79 static device_method_t nsgphy_methods[] = { 80 /* device interface */ 81 DEVMETHOD(device_probe, nsgphy_probe), 82 DEVMETHOD(device_attach, nsgphy_attach), 83 DEVMETHOD(device_detach, nsgphy_detach), 84 DEVMETHOD(device_shutdown, bus_generic_shutdown), 85 { 0, 0 } 86 }; 87 88 static devclass_t nsgphy_devclass; 89 90 static driver_t nsgphy_driver = { 91 "nsgphy", 92 nsgphy_methods, 93 sizeof(struct mii_softc) 94 }; 95 96 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0); 97 98 static int nsgphy_service(struct mii_softc *, struct mii_data *,int); 99 static void nsgphy_status(struct mii_softc *); 100 static int nsgphy_mii_phy_auto(struct mii_softc *, int); 101 extern void mii_phy_auto_timeout(void *); 102 103 static int nsgphy_probe(dev) 104 device_t dev; 105 { 106 struct mii_attach_args *ma; 107 108 ma = device_get_ivars(dev); 109 110 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_NATSEMI) { 111 if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83891) { 112 device_set_desc(dev, MII_STR_NATSEMI_DP83891); 113 return(0); 114 } 115 if (MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83861) { 116 device_set_desc(dev, MII_STR_NATSEMI_DP83861); 117 return(0); 118 } 119 } 120 121 return(ENXIO); 122 } 123 124 static int nsgphy_attach(dev) 125 device_t dev; 126 { 127 struct mii_softc *sc; 128 struct mii_attach_args *ma; 129 struct mii_data *mii; 130 const char *sep = ""; 131 132 sc = device_get_softc(dev); 133 ma = device_get_ivars(dev); 134 sc->mii_dev = device_get_parent(dev); 135 mii = device_get_softc(sc->mii_dev); 136 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 137 138 sc->mii_inst = mii->mii_instance; 139 sc->mii_phy = ma->mii_phyno; 140 sc->mii_service = nsgphy_service; 141 sc->mii_pdata = mii; 142 143 sc->mii_flags |= MIIF_NOISOLATE; 144 mii->mii_instance++; 145 146 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 147 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 148 149 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 150 BMCR_ISO); 151 #if 0 152 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 153 BMCR_LOOP|BMCR_S100); 154 #endif 155 156 mii_phy_reset(sc); 157 158 device_printf(dev, " "); 159 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst), 160 NSGPHY_S1000|NSGPHY_BMCR_FDX); 161 PRINT("1000baseTX-FDX"); 162 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst), 163 NSGPHY_S1000); 164 PRINT("1000baseTX"); 165 sc->mii_capabilities = 166 (PHY_READ(sc, MII_BMSR) | 167 (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask; 168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 169 NSGPHY_S100|NSGPHY_BMCR_FDX); 170 PRINT("100baseTX-FDX"); 171 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), NSGPHY_S100); 172 PRINT("100baseTX"); 173 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 174 NSGPHY_S10|NSGPHY_BMCR_FDX); 175 PRINT("10baseT-FDX"); 176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), NSGPHY_S10); 177 PRINT("10baseT"); 178 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 179 PRINT("auto"); 180 printf("\n"); 181 #undef ADD 182 #undef PRINT 183 184 MIIBUS_MEDIAINIT(sc->mii_dev); 185 return(0); 186 } 187 188 static int nsgphy_detach(dev) 189 device_t dev; 190 { 191 struct mii_softc *sc; 192 struct mii_data *mii; 193 194 sc = device_get_softc(dev); 195 mii = device_get_softc(device_get_parent(dev)); 196 if (sc->mii_flags & MIIF_DOINGAUTO) 197 untimeout(mii_phy_auto_timeout, sc, sc->mii_auto_ch); 198 sc->mii_dev = NULL; 199 LIST_REMOVE(sc, mii_list); 200 201 return(0); 202 } 203 int 204 nsgphy_service(sc, mii, cmd) 205 struct mii_softc *sc; 206 struct mii_data *mii; 207 int cmd; 208 { 209 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 210 int reg; 211 212 switch (cmd) { 213 case MII_POLLSTAT: 214 /* 215 * If we're not polling our PHY instance, just return. 216 */ 217 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 218 return (0); 219 break; 220 221 case MII_MEDIACHG: 222 /* 223 * If the media indicates a different PHY instance, 224 * isolate ourselves. 225 */ 226 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 227 reg = PHY_READ(sc, MII_BMCR); 228 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 229 return (0); 230 } 231 232 /* 233 * If the interface is not up, don't do anything. 234 */ 235 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 236 break; 237 238 239 switch (IFM_SUBTYPE(ife->ifm_media)) { 240 case IFM_AUTO: 241 #ifdef foo 242 /* 243 * If we're already in auto mode, just return. 244 */ 245 if (PHY_READ(sc, NSGPHY_MII_BMCR) & NSGPHY_BMCR_AUTOEN) 246 return (0); 247 #endif 248 (void) nsgphy_mii_phy_auto(sc, 0); 249 break; 250 case IFM_1000_TX: 251 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 252 PHY_WRITE(sc, NSGPHY_MII_BMCR, 253 NSGPHY_BMCR_FDX|NSGPHY_BMCR_SPD1); 254 } else { 255 PHY_WRITE(sc, NSGPHY_MII_BMCR, 256 NSGPHY_BMCR_SPD1); 257 } 258 PHY_WRITE(sc, NSGPHY_MII_ANAR, NSGPHY_SEL_TYPE); 259 260 /* 261 * When setting the link manually, one side must 262 * be the master and the other the slave. However 263 * ifmedia doesn't give us a good way to specify 264 * this, so we fake it by using one of the LINK 265 * flags. If LINK0 is set, we program the PHY to 266 * be a master, otherwise it's a slave. 267 */ 268 if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 269 PHY_WRITE(sc, NSGPHY_MII_1000CTL, 270 NSGPHY_1000CTL_MSE|NSGPHY_1000CTL_MSC); 271 } else { 272 PHY_WRITE(sc, NSGPHY_MII_1000CTL, 273 NSGPHY_1000CTL_MSE); 274 } 275 break; 276 case IFM_100_T4: 277 /* 278 * XXX Not supported as a manual setting right now. 279 */ 280 return (EINVAL); 281 case IFM_NONE: 282 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 283 break; 284 default: 285 /* 286 * BMCR data is stored in the ifmedia entry. 287 */ 288 PHY_WRITE(sc, MII_ANAR, 289 mii_anar(ife->ifm_media)); 290 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 291 break; 292 } 293 break; 294 295 case MII_TICK: 296 /* 297 * If we're not currently selected, just return. 298 */ 299 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 300 return (0); 301 302 /* 303 * Is the interface even up? 304 */ 305 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 306 return (0); 307 308 /* 309 * Only used for autonegotiation. 310 */ 311 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 312 break; 313 314 /* 315 * Check to see if we have link. 316 */ 317 reg = PHY_READ(sc, NSGPHY_MII_PHYSUP); 318 if (reg & NSGPHY_PHYSUP_LNKSTS) 319 break; 320 321 /* 322 * Only retry autonegotiation every 5 seconds. 323 * Actually, for gigE PHYs, we should wait longer, since 324 * 5 seconds is the mimimum time the documentation 325 * says to wait for a 1000mbps link to be established. 326 */ 327 if (++sc->mii_ticks != 10) 328 return (0); 329 330 sc->mii_ticks = 0; 331 332 mii_phy_reset(sc); 333 if (nsgphy_mii_phy_auto(sc, 0) == EJUSTRETURN) 334 return(0); 335 break; 336 } 337 338 /* Update the media status. */ 339 nsgphy_status(sc); 340 341 /* Callback if something changed. */ 342 mii_phy_update(sc, cmd); 343 return (0); 344 } 345 346 static void 347 nsgphy_status(sc) 348 struct mii_softc *sc; 349 { 350 struct mii_data *mii = sc->mii_pdata; 351 int bmsr, bmcr, physup, anlpar, gstat; 352 353 mii->mii_media_status = IFM_AVALID; 354 mii->mii_media_active = IFM_ETHER; 355 356 bmsr = PHY_READ(sc, NSGPHY_MII_BMSR); 357 physup = PHY_READ(sc, NSGPHY_MII_PHYSUP); 358 if (physup & NSGPHY_PHYSUP_LNKSTS) 359 mii->mii_media_status |= IFM_ACTIVE; 360 361 bmcr = PHY_READ(sc, NSGPHY_MII_BMCR); 362 363 if (bmcr & NSGPHY_BMCR_LOOP) 364 mii->mii_media_active |= IFM_LOOP; 365 366 if (bmcr & NSGPHY_BMCR_AUTOEN) { 367 if ((bmsr & NSGPHY_BMSR_ACOMP) == 0) { 368 /* Erg, still trying, I guess... */ 369 mii->mii_media_active |= IFM_NONE; 370 return; 371 } 372 anlpar = PHY_READ(sc, NSGPHY_MII_ANLPAR); 373 gstat = PHY_READ(sc, NSGPHY_MII_1000STS); 374 if (gstat & NSGPHY_1000STS_LPFD) 375 mii->mii_media_active |= IFM_1000_TX|IFM_FDX; 376 else if (gstat & NSGPHY_1000STS_LPHD) 377 mii->mii_media_active |= IFM_1000_TX|IFM_HDX; 378 else if (anlpar & NSGPHY_ANLPAR_100T4) 379 mii->mii_media_active |= IFM_100_T4; 380 else if (anlpar & NSGPHY_ANLPAR_100FDX) 381 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 382 else if (anlpar & NSGPHY_ANLPAR_100HDX) 383 mii->mii_media_active |= IFM_100_TX; 384 else if (anlpar & NSGPHY_ANLPAR_10FDX) 385 mii->mii_media_active |= IFM_10_T|IFM_FDX; 386 else if (anlpar & NSGPHY_ANLPAR_10HDX) 387 mii->mii_media_active |= IFM_10_T|IFM_HDX; 388 else 389 mii->mii_media_active |= IFM_NONE; 390 return; 391 } 392 393 switch(bmcr & (NSGPHY_BMCR_SPD1|NSGPHY_BMCR_SPD0)) { 394 case NSGPHY_S1000: 395 mii->mii_media_active |= IFM_1000_TX; 396 break; 397 case NSGPHY_S100: 398 mii->mii_media_active |= IFM_100_TX; 399 break; 400 case NSGPHY_S10: 401 mii->mii_media_active |= IFM_10_T; 402 break; 403 default: 404 break; 405 } 406 407 if (bmcr & NSGPHY_BMCR_FDX) 408 mii->mii_media_active |= IFM_FDX; 409 else 410 mii->mii_media_active |= IFM_HDX; 411 412 return; 413 } 414 415 416 static int 417 nsgphy_mii_phy_auto(mii, waitfor) 418 struct mii_softc *mii; 419 int waitfor; 420 { 421 int bmsr, ktcr = 0, i; 422 423 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 424 mii_phy_reset(mii); 425 PHY_WRITE(mii, NSGPHY_MII_BMCR, 0); 426 DELAY(1000); 427 ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL); 428 PHY_WRITE(mii, NSGPHY_MII_1000CTL, ktcr | 429 (NSGPHY_1000CTL_AFD|NSGPHY_1000CTL_AHD)); 430 ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL); 431 DELAY(1000); 432 PHY_WRITE(mii, NSGPHY_MII_ANAR, 433 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA); 434 DELAY(1000); 435 PHY_WRITE(mii, NSGPHY_MII_BMCR, 436 NSGPHY_BMCR_AUTOEN | NSGPHY_BMCR_STARTNEG); 437 } 438 439 if (waitfor) { 440 /* Wait 500ms for it to complete. */ 441 for (i = 0; i < 500; i++) { 442 if ((bmsr = PHY_READ(mii, NSGPHY_MII_BMSR)) & 443 NSGPHY_BMSR_ACOMP) 444 return (0); 445 DELAY(1000); 446 #if 0 447 if ((bmsr & BMSR_ACOMP) == 0) 448 printf("%s: autonegotiation failed to complete\n", 449 mii->mii_dev.dv_xname); 450 #endif 451 } 452 453 /* 454 * Don't need to worry about clearing MIIF_DOINGAUTO. 455 * If that's set, a timeout is pending, and it will 456 * clear the flag. 457 */ 458 return (EIO); 459 } 460 461 /* 462 * Just let it finish asynchronously. This is for the benefit of 463 * the tick handler driving autonegotiation. Don't want 500ms 464 * delays all the time while the system is running! 465 */ 466 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) { 467 mii->mii_flags |= MIIF_DOINGAUTO; 468 mii->mii_auto_ch = timeout(mii_phy_auto_timeout, mii, hz >> 1); 469 } 470 return (EJUSTRETURN); 471 } 472