xref: /freebsd/sys/dev/mii/mii_physubr.c (revision d4ae33f0721c1b170fe37d97e395228ffcfb3f80)
1 /*	$NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 /*
37  * Subroutines common to all PHYs.
38  */
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/socket.h>
44 #include <sys/errno.h>
45 #include <sys/module.h>
46 #include <sys/bus.h>
47 
48 #include <net/if.h>
49 #include <net/if_media.h>
50 
51 #include <dev/mii/mii.h>
52 #include <dev/mii/miivar.h>
53 
54 #include "miibus_if.h"
55 
56 /*
57  * Media to register setting conversion table.  Order matters.
58  */
59 static const struct mii_media mii_media_table[MII_NMEDIA] = {
60 	/* None */
61 	{ BMCR_ISO,		ANAR_CSMA,
62 	  0, },
63 
64 	/* 10baseT */
65 	{ BMCR_S10,		ANAR_CSMA|ANAR_10,
66 	  0, },
67 
68 	/* 10baseT-FDX */
69 	{ BMCR_S10|BMCR_FDX,	ANAR_CSMA|ANAR_10_FD,
70 	  0, },
71 
72 	/* 100baseT4 */
73 	{ BMCR_S100,		ANAR_CSMA|ANAR_T4,
74 	  0, },
75 
76 	/* 100baseTX */
77 	{ BMCR_S100,		ANAR_CSMA|ANAR_TX,
78 	  0, },
79 
80 	/* 100baseTX-FDX */
81 	{ BMCR_S100|BMCR_FDX,	ANAR_CSMA|ANAR_TX_FD,
82 	  0, },
83 
84 	/* 1000baseX */
85 	{ BMCR_S1000,		ANAR_CSMA,
86 	  0, },
87 
88 	/* 1000baseX-FDX */
89 	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,
90 	  0, },
91 
92 	/* 1000baseT */
93 	{ BMCR_S1000,		ANAR_CSMA,
94 	  GTCR_ADV_1000THDX },
95 
96 	/* 1000baseT-FDX */
97 	{ BMCR_S1000,		ANAR_CSMA,
98 	  GTCR_ADV_1000TFDX },
99 };
100 
101 void
102 mii_phy_setmedia(struct mii_softc *sc)
103 {
104 	struct mii_data *mii = sc->mii_pdata;
105 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
106 	int bmcr, anar, gtcr;
107 
108 	if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
109 		/*
110 		 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG.
111 		 * The former is necessary as we might switch from flow-
112 		 * control advertisement being off to on or vice versa.
113 		 */
114 		if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
115 		    (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0)
116 			(void)mii_phy_auto(sc);
117 		return;
118 	}
119 
120 	/*
121 	 * Table index is stored in the media entry.
122 	 */
123 
124 	KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA,
125 	    ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia",
126 	    ife->ifm_data));
127 
128 	anar = mii_media_table[ife->ifm_data].mm_anar;
129 	bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
130 	gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
131 
132 	if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
133 		gtcr |= GTCR_MAN_MS;
134 		if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
135 			gtcr |= GTCR_ADV_MS;
136 	}
137 
138 	if ((ife->ifm_media & IFM_FDX) != 0 &&
139 	    ((ife->ifm_media & IFM_FLOW) != 0 ||
140 	    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) {
141 		if ((sc->mii_flags & MIIF_IS_1000X) != 0)
142 			anar |= ANAR_X_PAUSE_TOWARDS;
143 		else {
144 			anar |= ANAR_FC;
145 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
146 			if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 &&
147 			    (sc->mii_extcapabilities &
148 			    (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0)
149 				anar |= ANAR_X_PAUSE_ASYM;
150 		}
151 	}
152 
153 	PHY_WRITE(sc, MII_ANAR, anar);
154 	PHY_WRITE(sc, MII_BMCR, bmcr);
155 	if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0)
156 		PHY_WRITE(sc, MII_100T2CR, gtcr);
157 }
158 
159 int
160 mii_phy_auto(struct mii_softc *sc)
161 {
162 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
163 	int anar, gtcr;
164 
165 	/*
166 	 * Check for 1000BASE-X.  Autonegotiation is a bit
167 	 * different on such devices.
168 	 */
169 	if ((sc->mii_flags & MIIF_IS_1000X) != 0) {
170 		anar = 0;
171 		if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0)
172 			anar |= ANAR_X_FD;
173 		if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0)
174 			anar |= ANAR_X_HD;
175 
176 		if ((ife->ifm_media & IFM_FLOW) != 0 ||
177 		    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
178 			anar |= ANAR_X_PAUSE_TOWARDS;
179 		PHY_WRITE(sc, MII_ANAR, anar);
180 	} else {
181 		anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
182 		    ANAR_CSMA;
183 		if ((ife->ifm_media & IFM_FLOW) != 0 ||
184 		    (sc->mii_flags & MIIF_FORCEPAUSE) != 0) {
185 			if ((sc->mii_capabilities &
186 			    (BMSR_10TFDX | BMSR_100TXFDX)) != 0)
187 				anar |= ANAR_FC;
188 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
189 			if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) &&
190 			    (sc->mii_extcapabilities &
191 			    (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0)
192 				anar |= ANAR_X_PAUSE_ASYM;
193 		}
194 		PHY_WRITE(sc, MII_ANAR, anar);
195 		if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
196 			gtcr = 0;
197 			if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0)
198 				gtcr |= GTCR_ADV_1000TFDX;
199 			if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0)
200 				gtcr |= GTCR_ADV_1000THDX;
201 			PHY_WRITE(sc, MII_100T2CR, gtcr);
202 		}
203 	}
204 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
205 	return (EJUSTRETURN);
206 }
207 
208 int
209 mii_phy_tick(struct mii_softc *sc)
210 {
211 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
212 	int reg;
213 
214 	/*
215 	 * If we're not doing autonegotiation, we don't need to do
216 	 * any extra work here.  However, we need to check the link
217 	 * status so we can generate an announcement if the status
218 	 * changes.
219 	 */
220 	if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
221 		sc->mii_ticks = 0;	/* reset autonegotiation timer. */
222 		return (0);
223 	}
224 
225 	/* Read the status register twice; BMSR_LINK is latch-low. */
226 	reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
227 	if ((reg & BMSR_LINK) != 0) {
228 		sc->mii_ticks = 0;	/* reset autonegotiation timer. */
229 		/* See above. */
230 		return (0);
231 	}
232 
233 	/* Announce link loss right after it happens */
234 	if (sc->mii_ticks++ == 0)
235 		return (0);
236 
237 	/* XXX: use default value if phy driver did not set mii_anegticks */
238 	if (sc->mii_anegticks == 0)
239 		sc->mii_anegticks = MII_ANEGTICKS_GIGE;
240 
241 	/* Only retry autonegotiation every mii_anegticks ticks. */
242 	if (sc->mii_ticks <= sc->mii_anegticks)
243 		return (EJUSTRETURN);
244 
245 	sc->mii_ticks = 0;
246 	PHY_RESET(sc);
247 	mii_phy_auto(sc);
248 	return (0);
249 }
250 
251 void
252 mii_phy_reset(struct mii_softc *sc)
253 {
254 	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
255 	int i, reg;
256 
257 	if ((sc->mii_flags & MIIF_NOISOLATE) != 0)
258 		reg = BMCR_RESET;
259 	else
260 		reg = BMCR_RESET | BMCR_ISO;
261 	PHY_WRITE(sc, MII_BMCR, reg);
262 
263 	/* Wait 100ms for it to complete. */
264 	for (i = 0; i < 100; i++) {
265 		reg = PHY_READ(sc, MII_BMCR);
266 		if ((reg & BMCR_RESET) == 0)
267 			break;
268 		DELAY(1000);
269 	}
270 
271 	/* NB: a PHY may default to being powered down and/or isolated. */
272 	reg &= ~(BMCR_PDOWN | BMCR_ISO);
273 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0 &&
274 	    ((ife == NULL && sc->mii_inst != 0) ||
275 	    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)))
276 		reg |= BMCR_ISO;
277 	if (PHY_READ(sc, MII_BMCR) != reg)
278 		PHY_WRITE(sc, MII_BMCR, reg);
279 }
280 
281 void
282 mii_phy_down(struct mii_softc *sc)
283 {
284 
285 }
286 
287 void
288 mii_phy_update(struct mii_softc *sc, int cmd)
289 {
290 	struct mii_data *mii = sc->mii_pdata;
291 
292 	if (sc->mii_media_active != mii->mii_media_active ||
293 	    cmd == MII_MEDIACHG) {
294 		MIIBUS_STATCHG(sc->mii_dev);
295 		sc->mii_media_active = mii->mii_media_active;
296 	}
297 	if (sc->mii_media_status != mii->mii_media_status) {
298 		MIIBUS_LINKCHG(sc->mii_dev);
299 		sc->mii_media_status = mii->mii_media_status;
300 	}
301 }
302 
303 /*
304  * Initialize generic PHY media based on BMSR, called when a PHY is
305  * attached.  We expect to be set up to print a comma-separated list
306  * of media names.  Does not print a newline.
307  */
308 void
309 mii_phy_add_media(struct mii_softc *sc)
310 {
311 	struct mii_data *mii = sc->mii_pdata;
312 	const char *sep = "";
313 	int fdx = 0;
314 
315 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
316 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) {
317 		printf("no media present");
318 		return;
319 	}
320 
321 	/*
322 	 * Set the autonegotiation timer for 10/100 media.  Gigabit media is
323 	 * handled below.
324 	 */
325 	sc->mii_anegticks = MII_ANEGTICKS;
326 
327 #define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
328 #define	PRINT(s)	printf("%s%s", sep, s); sep = ", "
329 
330 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
331 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
332 		    MII_MEDIA_NONE);
333 		PRINT("none");
334 	}
335 
336 	/*
337 	 * There are different interpretations for the bits in
338 	 * HomePNA PHYs.  And there is really only one media type
339 	 * that is supported.
340 	 */
341 	if ((sc->mii_flags & MIIF_IS_HPNA) != 0) {
342 		if ((sc->mii_capabilities & BMSR_10THDX) != 0) {
343 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
344 			    sc->mii_inst), MII_MEDIA_10_T);
345 			PRINT("HomePNA1");
346 		}
347 		return;
348 	}
349 
350 	if ((sc->mii_capabilities & BMSR_10THDX) != 0) {
351 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
352 		    MII_MEDIA_10_T);
353 		PRINT("10baseT");
354 	}
355 	if ((sc->mii_capabilities & BMSR_10TFDX) != 0) {
356 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
357 		    MII_MEDIA_10_T_FDX);
358 		PRINT("10baseT-FDX");
359 		if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
360 		    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
361 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T,
362 			    IFM_FDX | IFM_FLOW, sc->mii_inst),
363 			    MII_MEDIA_10_T_FDX);
364 			PRINT("10baseT-FDX-flow");
365 		}
366 		fdx = 1;
367 	}
368 	if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) {
369 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
370 		    MII_MEDIA_100_TX);
371 		PRINT("100baseTX");
372 	}
373 	if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) {
374 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
375 		    MII_MEDIA_100_TX_FDX);
376 		PRINT("100baseTX-FDX");
377 		if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
378 		    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
379 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX,
380 			    IFM_FDX | IFM_FLOW, sc->mii_inst),
381 			    MII_MEDIA_100_TX_FDX);
382 			PRINT("100baseTX-FDX-flow");
383 		}
384 		fdx = 1;
385 	}
386 	if ((sc->mii_capabilities & BMSR_100T4) != 0) {
387 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
388 		    MII_MEDIA_100_T4);
389 		PRINT("100baseT4");
390 	}
391 
392 	if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) {
393 		/*
394 		 * XXX Right now only handle 1000SX and 1000TX.  Need
395 		 * XXX to handle 1000LX and 1000CX somehow.
396 		 */
397 		if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) {
398 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
399 			sc->mii_flags |= MIIF_IS_1000X;
400 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
401 			    sc->mii_inst), MII_MEDIA_1000_X);
402 			PRINT("1000baseSX");
403 		}
404 		if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) {
405 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
406 			sc->mii_flags |= MIIF_IS_1000X;
407 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
408 			    sc->mii_inst), MII_MEDIA_1000_X_FDX);
409 			PRINT("1000baseSX-FDX");
410 			if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
411 			    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
412 				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX,
413 				    IFM_FDX | IFM_FLOW, sc->mii_inst),
414 				    MII_MEDIA_1000_X_FDX);
415 				PRINT("1000baseSX-FDX-flow");
416 			}
417 			fdx = 1;
418 		}
419 
420 		/*
421 		 * 1000baseT media needs to be able to manipulate
422 		 * master/slave mode.
423 		 *
424 		 * All 1000baseT PHYs have a 1000baseT control register.
425 		 */
426 		if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) {
427 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
428 			sc->mii_flags |= MIIF_HAVE_GTCR;
429 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
430 			    sc->mii_inst), MII_MEDIA_1000_T);
431 			PRINT("1000baseT");
432 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
433 			    IFM_ETH_MASTER, sc->mii_inst), MII_MEDIA_1000_T);
434 			PRINT("1000baseT-master");
435 		}
436 		if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) {
437 			sc->mii_anegticks = MII_ANEGTICKS_GIGE;
438 			sc->mii_flags |= MIIF_HAVE_GTCR;
439 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
440 			    sc->mii_inst), MII_MEDIA_1000_T_FDX);
441 			PRINT("1000baseT-FDX");
442 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
443 			    IFM_FDX | IFM_ETH_MASTER, sc->mii_inst),
444 			    MII_MEDIA_1000_T_FDX);
445 			PRINT("1000baseT-FDX-master");
446 			if ((sc->mii_flags & MIIF_DOPAUSE) != 0 &&
447 			    (sc->mii_flags & MIIF_NOMANPAUSE) == 0) {
448 				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
449 				    IFM_FDX | IFM_FLOW, sc->mii_inst),
450 				    MII_MEDIA_1000_T_FDX);
451 				PRINT("1000baseT-FDX-flow");
452 				ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
453 				    IFM_FDX | IFM_FLOW | IFM_ETH_MASTER,
454 				    sc->mii_inst), MII_MEDIA_1000_T_FDX);
455 				PRINT("1000baseT-FDX-flow-master");
456 			}
457 			fdx = 1;
458 		}
459 	}
460 
461 	if ((sc->mii_capabilities & BMSR_ANEG) != 0) {
462 		/* intentionally invalid index */
463 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
464 		    MII_NMEDIA);
465 		PRINT("auto");
466 		if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) {
467 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW,
468 			    sc->mii_inst), MII_NMEDIA);
469 			PRINT("auto-flow");
470 		}
471 	}
472 #undef ADD
473 #undef PRINT
474 }
475 
476 int
477 mii_phy_detach(device_t dev)
478 {
479 	struct mii_softc *sc;
480 
481 	sc = device_get_softc(dev);
482 	mii_phy_down(sc);
483 	sc->mii_dev = NULL;
484 	LIST_REMOVE(sc, mii_list);
485 	return (0);
486 }
487 
488 const struct mii_phydesc *
489 mii_phy_match_gen(const struct mii_attach_args *ma,
490   const struct mii_phydesc *mpd, size_t len)
491 {
492 
493 	for (; mpd->mpd_name != NULL;
494 	    mpd = (const struct mii_phydesc *)((const char *)mpd + len)) {
495 		if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
496 		    MII_MODEL(ma->mii_id2) == mpd->mpd_model)
497 			return (mpd);
498 	}
499 	return (NULL);
500 }
501 
502 const struct mii_phydesc *
503 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
504 {
505 
506 	return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc)));
507 }
508 
509 int
510 mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv)
511 {
512 
513 	mpd = mii_phy_match(device_get_ivars(dev), mpd);
514 	if (mpd != NULL) {
515 		device_set_desc(dev, mpd->mpd_name);
516 		return (mrv);
517 	}
518 	return (ENXIO);
519 }
520 
521 void
522 mii_phy_dev_attach(device_t dev, u_int flags, const struct mii_phy_funcs *mpf,
523     int add_media)
524 {
525 	struct mii_softc *sc;
526 	struct mii_attach_args *ma;
527 	struct mii_data *mii;
528 
529 	sc = device_get_softc(dev);
530 	ma = device_get_ivars(dev);
531 	sc->mii_dev = device_get_parent(dev);
532 	mii = ma->mii_data;
533 	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
534 
535 	sc->mii_flags = flags | miibus_get_flags(dev);
536 	sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
537 	sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
538 	sc->mii_mpd_rev = MII_REV(ma->mii_id2);
539 	sc->mii_capmask = ma->mii_capmask;
540 	sc->mii_inst = mii->mii_instance++;
541 	sc->mii_phy = ma->mii_phyno;
542 	sc->mii_offset = ma->mii_offset;
543 	sc->mii_funcs = mpf;
544 	sc->mii_pdata = mii;
545 
546 	if (bootverbose)
547 		device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
548 		    sc->mii_mpd_oui, sc->mii_mpd_model, sc->mii_mpd_rev);
549 
550 	if (add_media == 0)
551 		return;
552 
553 	PHY_RESET(sc);
554 
555 	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
556 	if (sc->mii_capabilities & BMSR_EXTSTAT)
557 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
558 	device_printf(dev, " ");
559 	mii_phy_add_media(sc);
560 	printf("\n");
561 
562 	MIIBUS_MEDIAINIT(sc->mii_dev);
563 }
564 
565 /*
566  * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
567  */
568 u_int
569 mii_phy_flowstatus(struct mii_softc *sc)
570 {
571 	int anar, anlpar;
572 
573 	if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
574 		return (0);
575 
576 	anar = PHY_READ(sc, MII_ANAR);
577 	anlpar = PHY_READ(sc, MII_ANLPAR);
578 
579 	/*
580 	 * Check for 1000BASE-X.  Autonegotiation is a bit
581 	 * different on such devices.
582 	 */
583 	if ((sc->mii_flags & MIIF_IS_1000X) != 0) {
584 		anar <<= 3;
585 		anlpar <<= 3;
586 	}
587 
588 	if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0)
589 		return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
590 
591 	if ((anar & ANAR_PAUSE_SYM) == 0) {
592 		if ((anar & ANAR_PAUSE_ASYM) != 0 &&
593 		    (anlpar & ANLPAR_PAUSE_TOWARDS) != 0)
594 			return (IFM_FLOW | IFM_ETH_TXPAUSE);
595 		else
596 			return (0);
597 	}
598 
599 	if ((anar & ANAR_PAUSE_ASYM) == 0) {
600 		if ((anlpar & ANLPAR_PAUSE_SYM) != 0)
601 			return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
602 		else
603 			return (0);
604 	}
605 
606 	switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) {
607 	case ANLPAR_PAUSE_NONE:
608 		return (0);
609 	case ANLPAR_PAUSE_ASYM:
610 		return (IFM_FLOW | IFM_ETH_RXPAUSE);
611 	default:
612 		return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE);
613 	}
614 	/* NOTREACHED */
615 }
616