1 /* $NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * Subroutines common to all PHYs. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/socket.h> 44 #include <sys/errno.h> 45 #include <sys/module.h> 46 #include <sys/bus.h> 47 48 #include <net/if.h> 49 #include <net/if_media.h> 50 51 #include <dev/mii/mii.h> 52 #include <dev/mii/miivar.h> 53 54 #include "miibus_if.h" 55 56 /* 57 * Media to register setting conversion table. Order matters. 58 */ 59 static const struct mii_media mii_media_table[MII_NMEDIA] = { 60 /* None */ 61 { BMCR_ISO, ANAR_CSMA, 62 0, }, 63 64 /* 10baseT */ 65 { BMCR_S10, ANAR_CSMA|ANAR_10, 66 0, }, 67 68 /* 10baseT-FDX */ 69 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 70 0, }, 71 72 /* 100baseT4 */ 73 { BMCR_S100, ANAR_CSMA|ANAR_T4, 74 0, }, 75 76 /* 100baseTX */ 77 { BMCR_S100, ANAR_CSMA|ANAR_TX, 78 0, }, 79 80 /* 100baseTX-FDX */ 81 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 82 0, }, 83 84 /* 1000baseX */ 85 { BMCR_S1000, ANAR_CSMA, 86 0, }, 87 88 /* 1000baseX-FDX */ 89 { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 90 0, }, 91 92 /* 1000baseT */ 93 { BMCR_S1000, ANAR_CSMA, 94 GTCR_ADV_1000THDX }, 95 96 /* 1000baseT-FDX */ 97 { BMCR_S1000, ANAR_CSMA, 98 GTCR_ADV_1000TFDX }, 99 }; 100 101 void 102 mii_phy_setmedia(struct mii_softc *sc) 103 { 104 struct mii_data *mii = sc->mii_pdata; 105 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 106 int bmcr, anar, gtcr; 107 108 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 109 /* 110 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG. 111 * The former is necessary as we might switch from flow- 112 * control advertisement being off to on or vice versa. 113 */ 114 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 || 115 (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0) 116 (void)mii_phy_auto(sc); 117 return; 118 } 119 120 /* 121 * Table index is stored in the media entry. 122 */ 123 124 KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA, 125 ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia", 126 ife->ifm_data)); 127 128 anar = mii_media_table[ife->ifm_data].mm_anar; 129 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 130 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 131 132 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 133 gtcr |= GTCR_MAN_MS; 134 if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 135 gtcr |= GTCR_ADV_MS; 136 } 137 138 if ((ife->ifm_media & IFM_FDX) != 0 && 139 ((ife->ifm_media & IFM_FLOW) != 0 || 140 (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) { 141 if ((sc->mii_flags & MIIF_IS_1000X) != 0) 142 anar |= ANAR_X_PAUSE_TOWARDS; 143 else { 144 anar |= ANAR_FC; 145 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 146 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 && 147 (sc->mii_extcapabilities & 148 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 149 anar |= ANAR_X_PAUSE_ASYM; 150 } 151 } 152 153 PHY_WRITE(sc, MII_ANAR, anar); 154 PHY_WRITE(sc, MII_BMCR, bmcr); 155 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) 156 PHY_WRITE(sc, MII_100T2CR, gtcr); 157 } 158 159 int 160 mii_phy_auto(struct mii_softc *sc) 161 { 162 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 163 int anar, gtcr; 164 165 /* 166 * Check for 1000BASE-X. Autonegotiation is a bit 167 * different on such devices. 168 */ 169 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 170 anar = 0; 171 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) 172 anar |= ANAR_X_FD; 173 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) 174 anar |= ANAR_X_HD; 175 176 if ((ife->ifm_media & IFM_FLOW) != 0 || 177 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 178 anar |= ANAR_X_PAUSE_TOWARDS; 179 PHY_WRITE(sc, MII_ANAR, anar); 180 } else { 181 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 182 ANAR_CSMA; 183 if ((ife->ifm_media & IFM_FLOW) != 0 || 184 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) { 185 if ((sc->mii_capabilities & 186 (BMSR_10TFDX | BMSR_100TXFDX)) != 0) 187 anar |= ANAR_FC; 188 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 189 if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) && 190 (sc->mii_extcapabilities & 191 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 192 anar |= ANAR_X_PAUSE_ASYM; 193 } 194 PHY_WRITE(sc, MII_ANAR, anar); 195 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { 196 gtcr = 0; 197 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) 198 gtcr |= GTCR_ADV_1000TFDX; 199 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) 200 gtcr |= GTCR_ADV_1000THDX; 201 PHY_WRITE(sc, MII_100T2CR, gtcr); 202 } 203 } 204 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 205 return (EJUSTRETURN); 206 } 207 208 int 209 mii_phy_tick(struct mii_softc *sc) 210 { 211 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 212 struct ifnet *ifp = sc->mii_pdata->mii_ifp; 213 int reg; 214 215 /* Just bail now if the interface is down. */ 216 if ((ifp->if_flags & IFF_UP) == 0) 217 return (EJUSTRETURN); 218 219 /* 220 * If we're not doing autonegotiation, we don't need to do 221 * any extra work here. However, we need to check the link 222 * status so we can generate an announcement if the status 223 * changes. 224 */ 225 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 226 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 227 return (0); 228 } 229 230 /* Read the status register twice; BMSR_LINK is latch-low. */ 231 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 232 if ((reg & BMSR_LINK) != 0) { 233 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 234 /* See above. */ 235 return (0); 236 } 237 238 /* Announce link loss right after it happens */ 239 if (sc->mii_ticks++ == 0) 240 return (0); 241 242 /* XXX: use default value if phy driver did not set mii_anegticks */ 243 if (sc->mii_anegticks == 0) 244 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 245 246 /* Only retry autonegotiation every mii_anegticks ticks. */ 247 if (sc->mii_ticks <= sc->mii_anegticks) 248 return (EJUSTRETURN); 249 250 sc->mii_ticks = 0; 251 PHY_RESET(sc); 252 mii_phy_auto(sc); 253 return (0); 254 } 255 256 void 257 mii_phy_reset(struct mii_softc *sc) 258 { 259 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 260 int i, reg; 261 262 if ((sc->mii_flags & MIIF_NOISOLATE) != 0) 263 reg = BMCR_RESET; 264 else 265 reg = BMCR_RESET | BMCR_ISO; 266 PHY_WRITE(sc, MII_BMCR, reg); 267 268 /* Wait 100ms for it to complete. */ 269 for (i = 0; i < 100; i++) { 270 reg = PHY_READ(sc, MII_BMCR); 271 if ((reg & BMCR_RESET) == 0) 272 break; 273 DELAY(1000); 274 } 275 276 /* NB: a PHY may default to being powered down and/or isolated. */ 277 reg &= ~(BMCR_PDOWN | BMCR_ISO); 278 if ((sc->mii_flags & MIIF_NOISOLATE) == 0 && 279 ((ife == NULL && sc->mii_inst != 0) || 280 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))) 281 reg |= BMCR_ISO; 282 if (PHY_READ(sc, MII_BMCR) != reg) 283 PHY_WRITE(sc, MII_BMCR, reg); 284 } 285 286 void 287 mii_phy_down(struct mii_softc *sc) 288 { 289 290 } 291 292 void 293 mii_phy_update(struct mii_softc *sc, int cmd) 294 { 295 struct mii_data *mii = sc->mii_pdata; 296 297 if (sc->mii_media_active != mii->mii_media_active || 298 cmd == MII_MEDIACHG) { 299 MIIBUS_STATCHG(sc->mii_dev); 300 sc->mii_media_active = mii->mii_media_active; 301 } 302 if (sc->mii_media_status != mii->mii_media_status) { 303 MIIBUS_LINKCHG(sc->mii_dev); 304 sc->mii_media_status = mii->mii_media_status; 305 } 306 } 307 308 /* 309 * Initialize generic PHY media based on BMSR, called when a PHY is 310 * attached. We expect to be set up to print a comma-separated list 311 * of media names. Does not print a newline. 312 */ 313 void 314 mii_phy_add_media(struct mii_softc *sc) 315 { 316 struct mii_data *mii = sc->mii_pdata; 317 const char *sep = ""; 318 int fdx = 0; 319 320 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 321 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) { 322 printf("no media present"); 323 return; 324 } 325 326 /* 327 * Set the autonegotiation timer for 10/100 media. Gigabit media is 328 * handled below. 329 */ 330 sc->mii_anegticks = MII_ANEGTICKS; 331 332 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 333 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 334 335 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { 336 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 337 MII_MEDIA_NONE); 338 PRINT("none"); 339 } 340 341 /* 342 * There are different interpretations for the bits in 343 * HomePNA PHYs. And there is really only one media type 344 * that is supported. 345 */ 346 if ((sc->mii_flags & MIIF_IS_HPNA) != 0) { 347 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 348 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 349 sc->mii_inst), MII_MEDIA_10_T); 350 PRINT("HomePNA1"); 351 } 352 return; 353 } 354 355 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 356 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 357 MII_MEDIA_10_T); 358 PRINT("10baseT"); 359 } 360 if ((sc->mii_capabilities & BMSR_10TFDX) != 0) { 361 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 362 MII_MEDIA_10_T_FDX); 363 PRINT("10baseT-FDX"); 364 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 365 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 366 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 367 IFM_FDX | IFM_FLOW, sc->mii_inst), 368 MII_MEDIA_10_T_FDX); 369 PRINT("10baseT-FDX-flow"); 370 } 371 fdx = 1; 372 } 373 if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) { 374 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 375 MII_MEDIA_100_TX); 376 PRINT("100baseTX"); 377 } 378 if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) { 379 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 380 MII_MEDIA_100_TX_FDX); 381 PRINT("100baseTX-FDX"); 382 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 383 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 384 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 385 IFM_FDX | IFM_FLOW, sc->mii_inst), 386 MII_MEDIA_100_TX_FDX); 387 PRINT("100baseTX-FDX-flow"); 388 } 389 fdx = 1; 390 } 391 if ((sc->mii_capabilities & BMSR_100T4) != 0) { 392 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 393 MII_MEDIA_100_T4); 394 PRINT("100baseT4"); 395 } 396 397 if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) { 398 /* 399 * XXX Right now only handle 1000SX and 1000TX. Need 400 * XXX to handle 1000LX and 1000CX somehow. 401 */ 402 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) { 403 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 404 sc->mii_flags |= MIIF_IS_1000X; 405 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 406 sc->mii_inst), MII_MEDIA_1000_X); 407 PRINT("1000baseSX"); 408 } 409 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) { 410 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 411 sc->mii_flags |= MIIF_IS_1000X; 412 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 413 sc->mii_inst), MII_MEDIA_1000_X_FDX); 414 PRINT("1000baseSX-FDX"); 415 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 416 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 417 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 418 IFM_FDX | IFM_FLOW, sc->mii_inst), 419 MII_MEDIA_1000_X_FDX); 420 PRINT("1000baseSX-FDX-flow"); 421 } 422 fdx = 1; 423 } 424 425 /* 426 * 1000baseT media needs to be able to manipulate 427 * master/slave mode. 428 * 429 * All 1000baseT PHYs have a 1000baseT control register. 430 */ 431 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) { 432 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 433 sc->mii_flags |= MIIF_HAVE_GTCR; 434 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 435 sc->mii_inst), MII_MEDIA_1000_T); 436 PRINT("1000baseT"); 437 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 438 IFM_ETH_MASTER, sc->mii_inst), MII_MEDIA_1000_T); 439 PRINT("1000baseT-master"); 440 } 441 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) { 442 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 443 sc->mii_flags |= MIIF_HAVE_GTCR; 444 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 445 sc->mii_inst), MII_MEDIA_1000_T_FDX); 446 PRINT("1000baseT-FDX"); 447 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 448 IFM_FDX | IFM_ETH_MASTER, sc->mii_inst), 449 MII_MEDIA_1000_T_FDX); 450 PRINT("1000baseT-FDX-master"); 451 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 452 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 453 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 454 IFM_FDX | IFM_FLOW, sc->mii_inst), 455 MII_MEDIA_1000_T_FDX); 456 PRINT("1000baseT-FDX-flow"); 457 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 458 IFM_FDX | IFM_FLOW | IFM_ETH_MASTER, 459 sc->mii_inst), MII_MEDIA_1000_T_FDX); 460 PRINT("1000baseT-FDX-flow-master"); 461 } 462 fdx = 1; 463 } 464 } 465 466 if ((sc->mii_capabilities & BMSR_ANEG) != 0) { 467 /* intentionally invalid index */ 468 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 469 MII_NMEDIA); 470 PRINT("auto"); 471 if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) { 472 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW, 473 sc->mii_inst), MII_NMEDIA); 474 PRINT("auto-flow"); 475 } 476 } 477 #undef ADD 478 #undef PRINT 479 } 480 481 int 482 mii_phy_detach(device_t dev) 483 { 484 struct mii_softc *sc; 485 486 sc = device_get_softc(dev); 487 mii_phy_down(sc); 488 sc->mii_dev = NULL; 489 LIST_REMOVE(sc, mii_list); 490 return (0); 491 } 492 493 const struct mii_phydesc * 494 mii_phy_match_gen(const struct mii_attach_args *ma, 495 const struct mii_phydesc *mpd, size_t len) 496 { 497 498 for (; mpd->mpd_name != NULL; 499 mpd = (const struct mii_phydesc *)((const char *)mpd + len)) { 500 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 501 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 502 return (mpd); 503 } 504 return (NULL); 505 } 506 507 const struct mii_phydesc * 508 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 509 { 510 511 return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc))); 512 } 513 514 int 515 mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) 516 { 517 518 mpd = mii_phy_match(device_get_ivars(dev), mpd); 519 if (mpd != NULL) { 520 device_set_desc(dev, mpd->mpd_name); 521 return (mrv); 522 } 523 return (ENXIO); 524 } 525 526 void 527 mii_phy_dev_attach(device_t dev, u_int flags, const struct mii_phy_funcs *mpf, 528 int add_media) 529 { 530 struct mii_softc *sc; 531 struct mii_attach_args *ma; 532 struct mii_data *mii; 533 534 sc = device_get_softc(dev); 535 ma = device_get_ivars(dev); 536 sc->mii_dev = device_get_parent(dev); 537 mii = ma->mii_data; 538 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 539 540 sc->mii_flags = flags | miibus_get_flags(dev); 541 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 542 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 543 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 544 sc->mii_capmask = ma->mii_capmask; 545 sc->mii_inst = mii->mii_instance++; 546 sc->mii_phy = ma->mii_phyno; 547 sc->mii_offset = ma->mii_offset; 548 sc->mii_funcs = mpf; 549 sc->mii_pdata = mii; 550 551 if (bootverbose) 552 device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n", 553 sc->mii_mpd_oui, sc->mii_mpd_model, sc->mii_mpd_rev); 554 555 if (add_media == 0) 556 return; 557 558 PHY_RESET(sc); 559 560 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; 561 if (sc->mii_capabilities & BMSR_EXTSTAT) 562 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 563 device_printf(dev, " "); 564 mii_phy_add_media(sc); 565 printf("\n"); 566 567 MIIBUS_MEDIAINIT(sc->mii_dev); 568 } 569 570 /* 571 * Return the flow control status flag from MII_ANAR & MII_ANLPAR. 572 */ 573 u_int 574 mii_phy_flowstatus(struct mii_softc *sc) 575 { 576 int anar, anlpar; 577 578 if ((sc->mii_flags & MIIF_DOPAUSE) == 0) 579 return (0); 580 581 anar = PHY_READ(sc, MII_ANAR); 582 anlpar = PHY_READ(sc, MII_ANLPAR); 583 584 /* 585 * Check for 1000BASE-X. Autonegotiation is a bit 586 * different on such devices. 587 */ 588 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 589 anar <<= 3; 590 anlpar <<= 3; 591 } 592 593 if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0) 594 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 595 596 if ((anar & ANAR_PAUSE_SYM) == 0) { 597 if ((anar & ANAR_PAUSE_ASYM) != 0 && 598 (anlpar & ANLPAR_PAUSE_TOWARDS) != 0) 599 return (IFM_FLOW | IFM_ETH_TXPAUSE); 600 else 601 return (0); 602 } 603 604 if ((anar & ANAR_PAUSE_ASYM) == 0) { 605 if ((anlpar & ANLPAR_PAUSE_SYM) != 0) 606 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 607 else 608 return (0); 609 } 610 611 switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) { 612 case ANLPAR_PAUSE_NONE: 613 return (0); 614 case ANLPAR_PAUSE_ASYM: 615 return (IFM_FLOW | IFM_ETH_RXPAUSE); 616 default: 617 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); 618 } 619 /* NOTREACHED */ 620 } 621