1 /* $NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * Subroutines common to all PHYs. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/socket.h> 44 #include <sys/errno.h> 45 #include <sys/module.h> 46 #include <sys/bus.h> 47 48 #include <net/if.h> 49 #include <net/if_media.h> 50 51 #include <dev/mii/mii.h> 52 #include <dev/mii/miivar.h> 53 54 #include "miibus_if.h" 55 56 /* 57 * Media to register setting conversion table. Order matters. 58 */ 59 static const struct mii_media mii_media_table[MII_NMEDIA] = { 60 /* None */ 61 { BMCR_ISO, ANAR_CSMA, 62 0, }, 63 64 /* 10baseT */ 65 { BMCR_S10, ANAR_CSMA|ANAR_10, 66 0, }, 67 68 /* 10baseT-FDX */ 69 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 70 0, }, 71 72 /* 100baseT4 */ 73 { BMCR_S100, ANAR_CSMA|ANAR_T4, 74 0, }, 75 76 /* 100baseTX */ 77 { BMCR_S100, ANAR_CSMA|ANAR_TX, 78 0, }, 79 80 /* 100baseTX-FDX */ 81 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 82 0, }, 83 84 /* 1000baseX */ 85 { BMCR_S1000, ANAR_CSMA, 86 0, }, 87 88 /* 1000baseX-FDX */ 89 { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 90 0, }, 91 92 /* 1000baseT */ 93 { BMCR_S1000, ANAR_CSMA, 94 GTCR_ADV_1000THDX }, 95 96 /* 1000baseT-FDX */ 97 { BMCR_S1000, ANAR_CSMA, 98 GTCR_ADV_1000TFDX }, 99 }; 100 101 void 102 mii_phy_setmedia(struct mii_softc *sc) 103 { 104 struct mii_data *mii = sc->mii_pdata; 105 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 106 int bmcr, anar, gtcr; 107 108 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 109 /* 110 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG. 111 * The former is necessary as we might switch from flow- 112 * control advertisment being off to on or vice versa. 113 */ 114 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 || 115 (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0) 116 (void)mii_phy_auto(sc); 117 return; 118 } 119 120 /* 121 * Table index is stored in the media entry. 122 */ 123 124 KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA, 125 ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia", 126 ife->ifm_data)); 127 128 anar = mii_media_table[ife->ifm_data].mm_anar; 129 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 130 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 131 132 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 133 gtcr |= GTCR_MAN_MS; 134 if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 135 gtcr |= GTCR_ADV_MS; 136 } 137 138 if ((ife->ifm_media & IFM_FDX) != 0 && 139 ((ife->ifm_media & IFM_FLOW) != 0 || 140 (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) { 141 if ((sc->mii_flags & MIIF_IS_1000X) != 0) 142 anar |= ANAR_X_PAUSE_TOWARDS; 143 else { 144 anar |= ANAR_FC; 145 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 146 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 && 147 (sc->mii_extcapabilities & 148 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 149 anar |= ANAR_X_PAUSE_ASYM; 150 } 151 } 152 153 if ((ife->ifm_media & IFM_LOOP) != 0) 154 bmcr |= BMCR_LOOP; 155 156 PHY_WRITE(sc, MII_ANAR, anar); 157 PHY_WRITE(sc, MII_BMCR, bmcr); 158 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) 159 PHY_WRITE(sc, MII_100T2CR, gtcr); 160 } 161 162 int 163 mii_phy_auto(struct mii_softc *sc) 164 { 165 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 166 int anar, gtcr; 167 168 /* 169 * Check for 1000BASE-X. Autonegotiation is a bit 170 * different on such devices. 171 */ 172 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 173 anar = 0; 174 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) 175 anar |= ANAR_X_FD; 176 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) 177 anar |= ANAR_X_HD; 178 179 if ((ife->ifm_media & IFM_FLOW) != 0 || 180 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 181 anar |= ANAR_X_PAUSE_TOWARDS; 182 PHY_WRITE(sc, MII_ANAR, anar); 183 } else { 184 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 185 ANAR_CSMA; 186 if ((ife->ifm_media & IFM_FLOW) != 0 || 187 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) { 188 if ((sc->mii_capabilities & 189 (BMSR_10TFDX | BMSR_100TXFDX)) != 0) 190 anar |= ANAR_FC; 191 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 192 if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) && 193 (sc->mii_extcapabilities & 194 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 195 anar |= ANAR_X_PAUSE_ASYM; 196 } 197 PHY_WRITE(sc, MII_ANAR, anar); 198 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { 199 gtcr = 0; 200 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) 201 gtcr |= GTCR_ADV_1000TFDX; 202 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) 203 gtcr |= GTCR_ADV_1000THDX; 204 PHY_WRITE(sc, MII_100T2CR, gtcr); 205 } 206 } 207 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 208 return (EJUSTRETURN); 209 } 210 211 int 212 mii_phy_tick(struct mii_softc *sc) 213 { 214 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 215 struct ifnet *ifp = sc->mii_pdata->mii_ifp; 216 int reg; 217 218 /* Just bail now if the interface is down. */ 219 if ((ifp->if_flags & IFF_UP) == 0) 220 return (EJUSTRETURN); 221 222 /* 223 * If we're not doing autonegotiation, we don't need to do 224 * any extra work here. However, we need to check the link 225 * status so we can generate an announcement if the status 226 * changes. 227 */ 228 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 229 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 230 return (0); 231 } 232 233 /* Read the status register twice; BMSR_LINK is latch-low. */ 234 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 235 if ((reg & BMSR_LINK) != 0) { 236 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 237 /* See above. */ 238 return (0); 239 } 240 241 /* Announce link loss right after it happens */ 242 if (sc->mii_ticks++ == 0) 243 return (0); 244 245 /* XXX: use default value if phy driver did not set mii_anegticks */ 246 if (sc->mii_anegticks == 0) 247 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 248 249 /* Only retry autonegotiation every mii_anegticks ticks. */ 250 if (sc->mii_ticks <= sc->mii_anegticks) 251 return (EJUSTRETURN); 252 253 sc->mii_ticks = 0; 254 mii_phy_reset(sc); 255 mii_phy_auto(sc); 256 return (0); 257 } 258 259 void 260 mii_phy_reset(struct mii_softc *sc) 261 { 262 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 263 int reg, i; 264 265 if ((sc->mii_flags & MIIF_NOISOLATE) != 0) 266 reg = BMCR_RESET; 267 else 268 reg = BMCR_RESET | BMCR_ISO; 269 PHY_WRITE(sc, MII_BMCR, reg); 270 271 /* Wait 100ms for it to complete. */ 272 for (i = 0; i < 100; i++) { 273 reg = PHY_READ(sc, MII_BMCR); 274 if ((reg & BMCR_RESET) == 0) 275 break; 276 DELAY(1000); 277 } 278 279 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { 280 if ((ife == NULL && sc->mii_inst != 0) || 281 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)) 282 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 283 } 284 } 285 286 void 287 mii_phy_down(struct mii_softc *sc) 288 { 289 290 } 291 292 void 293 mii_phy_update(struct mii_softc *sc, int cmd) 294 { 295 struct mii_data *mii = sc->mii_pdata; 296 297 if (sc->mii_media_active != mii->mii_media_active || 298 cmd == MII_MEDIACHG) { 299 MIIBUS_STATCHG(sc->mii_dev); 300 sc->mii_media_active = mii->mii_media_active; 301 } 302 if (sc->mii_media_status != mii->mii_media_status) { 303 MIIBUS_LINKCHG(sc->mii_dev); 304 sc->mii_media_status = mii->mii_media_status; 305 } 306 } 307 308 /* 309 * Initialize generic PHY media based on BMSR, called when a PHY is 310 * attached. We expect to be set up to print a comma-separated list 311 * of media names. Does not print a newline. 312 */ 313 void 314 mii_phy_add_media(struct mii_softc *sc) 315 { 316 struct mii_data *mii = sc->mii_pdata; 317 const char *sep = ""; 318 int fdx = 0; 319 320 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 321 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) { 322 printf("no media present"); 323 return; 324 } 325 326 /* 327 * Set the autonegotiation timer for 10/100 media. Gigabit media is 328 * handled below. 329 */ 330 sc->mii_anegticks = MII_ANEGTICKS; 331 332 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 333 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 334 335 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) 336 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 337 MII_MEDIA_NONE); 338 339 /* 340 * There are different interpretations for the bits in 341 * HomePNA PHYs. And there is really only one media type 342 * that is supported. 343 */ 344 if ((sc->mii_flags & MIIF_IS_HPNA) != 0) { 345 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 346 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 347 sc->mii_inst), MII_MEDIA_10_T); 348 PRINT("HomePNA1"); 349 } 350 return; 351 } 352 353 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 354 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 355 MII_MEDIA_10_T); 356 PRINT("10baseT"); 357 } 358 if ((sc->mii_capabilities & BMSR_10TFDX) != 0) { 359 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 360 MII_MEDIA_10_T_FDX); 361 PRINT("10baseT-FDX"); 362 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 363 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 364 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 365 IFM_FDX | IFM_FLOW, sc->mii_inst), 366 MII_MEDIA_10_T_FDX); 367 PRINT("10baseT-FDX-flow"); 368 } 369 fdx = 1; 370 } 371 if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) { 372 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 373 MII_MEDIA_100_TX); 374 PRINT("100baseTX"); 375 } 376 if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) { 377 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 378 MII_MEDIA_100_TX_FDX); 379 PRINT("100baseTX-FDX"); 380 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 381 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 382 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 383 IFM_FDX | IFM_FLOW, sc->mii_inst), 384 MII_MEDIA_100_TX_FDX); 385 PRINT("100baseTX-FDX-flow"); 386 } 387 fdx = 1; 388 } 389 if ((sc->mii_capabilities & BMSR_100T4) != 0) { 390 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 391 MII_MEDIA_100_T4); 392 PRINT("100baseT4"); 393 } 394 395 if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) { 396 /* 397 * XXX Right now only handle 1000SX and 1000TX. Need 398 * XXX to handle 1000LX and 1000CX somehow. 399 */ 400 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) { 401 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 402 sc->mii_flags |= MIIF_IS_1000X; 403 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 404 sc->mii_inst), MII_MEDIA_1000_X); 405 PRINT("1000baseSX"); 406 } 407 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) { 408 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 409 sc->mii_flags |= MIIF_IS_1000X; 410 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 411 sc->mii_inst), MII_MEDIA_1000_X_FDX); 412 PRINT("1000baseSX-FDX"); 413 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 414 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 415 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 416 IFM_FDX | IFM_FLOW, sc->mii_inst), 417 MII_MEDIA_1000_X_FDX); 418 PRINT("1000baseSX-FDX-flow"); 419 } 420 fdx = 1; 421 } 422 423 /* 424 * 1000baseT media needs to be able to manipulate 425 * master/slave mode. 426 * 427 * All 1000baseT PHYs have a 1000baseT control register. 428 */ 429 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) { 430 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 431 sc->mii_flags |= MIIF_HAVE_GTCR; 432 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 433 sc->mii_inst), MII_MEDIA_1000_T); 434 PRINT("1000baseT"); 435 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 436 IFM_ETH_MASTER, sc->mii_inst), MII_MEDIA_1000_T); 437 PRINT("1000baseT-master"); 438 } 439 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) { 440 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 441 sc->mii_flags |= MIIF_HAVE_GTCR; 442 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 443 sc->mii_inst), MII_MEDIA_1000_T_FDX); 444 PRINT("1000baseT-FDX"); 445 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 446 IFM_FDX | IFM_ETH_MASTER, sc->mii_inst), 447 MII_MEDIA_1000_T_FDX); 448 PRINT("1000baseT-FDX-master"); 449 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 450 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 451 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 452 IFM_FDX | IFM_FLOW, sc->mii_inst), 453 MII_MEDIA_1000_T_FDX); 454 PRINT("1000baseT-FDX-flow"); 455 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 456 IFM_FDX | IFM_FLOW | IFM_ETH_MASTER, 457 sc->mii_inst), MII_MEDIA_1000_T_FDX); 458 PRINT("1000baseT-FDX-flow-master"); 459 } 460 fdx = 1; 461 } 462 } 463 464 if ((sc->mii_capabilities & BMSR_ANEG) != 0) { 465 /* intentionally invalid index */ 466 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 467 MII_NMEDIA); 468 PRINT("auto"); 469 if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) { 470 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW, 471 sc->mii_inst), MII_NMEDIA); 472 PRINT("auto-flow"); 473 } 474 } 475 #undef ADD 476 #undef PRINT 477 } 478 479 int 480 mii_phy_detach(device_t dev) 481 { 482 struct mii_softc *sc; 483 484 sc = device_get_softc(dev); 485 mii_phy_down(sc); 486 sc->mii_dev = NULL; 487 LIST_REMOVE(sc, mii_list); 488 return (0); 489 } 490 491 const struct mii_phydesc * 492 mii_phy_match_gen(const struct mii_attach_args *ma, 493 const struct mii_phydesc *mpd, size_t len) 494 { 495 496 for (; mpd->mpd_name != NULL; 497 mpd = (const struct mii_phydesc *)((const char *)mpd + len)) { 498 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 499 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 500 return (mpd); 501 } 502 return (NULL); 503 } 504 505 const struct mii_phydesc * 506 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 507 { 508 509 return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc))); 510 } 511 512 int 513 mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) 514 { 515 516 mpd = mii_phy_match(device_get_ivars(dev), mpd); 517 if (mpd != NULL) { 518 device_set_desc(dev, mpd->mpd_name); 519 return (mrv); 520 } 521 return (ENXIO); 522 } 523 524 /* 525 * Return the flow control status flag from MII_ANAR & MII_ANLPAR. 526 */ 527 u_int 528 mii_phy_flowstatus(struct mii_softc *sc) 529 { 530 int anar, anlpar; 531 532 if ((sc->mii_flags & MIIF_DOPAUSE) == 0) 533 return (0); 534 535 anar = PHY_READ(sc, MII_ANAR); 536 anlpar = PHY_READ(sc, MII_ANLPAR); 537 538 /* 539 * Check for 1000BASE-X. Autonegotiation is a bit 540 * different on such devices. 541 */ 542 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 543 anar <<= 3; 544 anlpar <<= 3; 545 } 546 547 if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0) 548 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 549 550 if ((anar & ANAR_PAUSE_SYM) == 0) { 551 if ((anar & ANAR_PAUSE_ASYM) != 0 && 552 (anlpar & ANLPAR_PAUSE_TOWARDS) != 0) 553 return (IFM_FLOW | IFM_ETH_TXPAUSE); 554 else 555 return (0); 556 } 557 558 if ((anar & ANAR_PAUSE_ASYM) == 0) { 559 if ((anlpar & ANLPAR_PAUSE_SYM) != 0) 560 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 561 else 562 return (0); 563 } 564 565 switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) { 566 case ANLPAR_PAUSE_NONE: 567 return (0); 568 case ANLPAR_PAUSE_ASYM: 569 return (IFM_FLOW | IFM_ETH_RXPAUSE); 570 default: 571 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); 572 } 573 /* NOTREACHED */ 574 } 575