1 /*- 2 * Copyright (c) 2004 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/module.h> 44 #include <sys/socket.h> 45 #include <sys/bus.h> 46 47 #include <net/if.h> 48 #include <net/if_arp.h> 49 #include <net/if_media.h> 50 51 #include <dev/mii/mii.h> 52 #include <dev/mii/miivar.h> 53 #include "miidevs.h" 54 55 #include <dev/mii/ciphyreg.h> 56 57 #include "miibus_if.h" 58 59 #include <machine/bus.h> 60 61 static int ciphy_probe(device_t); 62 static int ciphy_attach(device_t); 63 64 static device_method_t ciphy_methods[] = { 65 /* device interface */ 66 DEVMETHOD(device_probe, ciphy_probe), 67 DEVMETHOD(device_attach, ciphy_attach), 68 DEVMETHOD(device_detach, mii_phy_detach), 69 DEVMETHOD(device_shutdown, bus_generic_shutdown), 70 { 0, 0 } 71 }; 72 73 static devclass_t ciphy_devclass; 74 75 static driver_t ciphy_driver = { 76 "ciphy", 77 ciphy_methods, 78 sizeof(struct mii_softc) 79 }; 80 81 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0); 82 83 static int ciphy_service(struct mii_softc *, struct mii_data *, int); 84 static void ciphy_status(struct mii_softc *); 85 static void ciphy_reset(struct mii_softc *); 86 static void ciphy_fixup(struct mii_softc *); 87 88 static const struct mii_phydesc ciphys[] = { 89 MII_PHY_DESC(CICADA, CS8201), 90 MII_PHY_DESC(CICADA, CS8201A), 91 MII_PHY_DESC(CICADA, CS8201B), 92 MII_PHY_DESC(CICADA, CS8204), 93 MII_PHY_DESC(CICADA, VSC8211), 94 MII_PHY_DESC(CICADA, CS8244), 95 MII_PHY_DESC(VITESSE, VSC8601), 96 MII_PHY_END 97 }; 98 99 static int 100 ciphy_probe(device_t dev) 101 { 102 103 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT)); 104 } 105 106 static int 107 ciphy_attach(device_t dev) 108 { 109 struct mii_softc *sc; 110 struct mii_attach_args *ma; 111 struct mii_data *mii; 112 113 sc = device_get_softc(dev); 114 ma = device_get_ivars(dev); 115 sc->mii_dev = device_get_parent(dev); 116 mii = ma->mii_data; 117 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 118 119 sc->mii_flags = miibus_get_flags(dev); 120 sc->mii_inst = mii->mii_instance++; 121 sc->mii_phy = ma->mii_phyno; 122 sc->mii_service = ciphy_service; 123 sc->mii_pdata = mii; 124 125 sc->mii_flags |= MIIF_NOISOLATE; 126 127 ciphy_reset(sc); 128 129 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 130 if (sc->mii_capabilities & BMSR_EXTSTAT) 131 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 132 device_printf(dev, " "); 133 mii_phy_add_media(sc); 134 printf("\n"); 135 136 MIIBUS_MEDIAINIT(sc->mii_dev); 137 return (0); 138 } 139 140 static int 141 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 142 { 143 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 144 int reg, speed, gig; 145 146 switch (cmd) { 147 case MII_POLLSTAT: 148 break; 149 150 case MII_MEDIACHG: 151 /* 152 * If the interface is not up, don't do anything. 153 */ 154 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 155 break; 156 157 ciphy_fixup(sc); /* XXX hardware bug work-around */ 158 159 switch (IFM_SUBTYPE(ife->ifm_media)) { 160 case IFM_AUTO: 161 #ifdef foo 162 /* 163 * If we're already in auto mode, just return. 164 */ 165 if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN) 166 return (0); 167 #endif 168 (void)mii_phy_auto(sc); 169 break; 170 case IFM_1000_T: 171 speed = CIPHY_S1000; 172 goto setit; 173 case IFM_100_TX: 174 speed = CIPHY_S100; 175 goto setit; 176 case IFM_10_T: 177 speed = CIPHY_S10; 178 setit: 179 if ((ife->ifm_media & IFM_FDX) != 0) { 180 speed |= CIPHY_BMCR_FDX; 181 gig = CIPHY_1000CTL_AFD; 182 } else 183 gig = CIPHY_1000CTL_AHD; 184 185 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 186 gig |= CIPHY_1000CTL_MSE; 187 if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 188 gig |= CIPHY_1000CTL_MSC; 189 speed |= 190 CIPHY_BMCR_AUTOEN | CIPHY_BMCR_STARTNEG; 191 } else 192 gig = 0; 193 PHY_WRITE(sc, CIPHY_MII_1000CTL, gig); 194 PHY_WRITE(sc, CIPHY_MII_BMCR, speed); 195 PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE); 196 break; 197 case IFM_NONE: 198 PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN); 199 break; 200 default: 201 return (EINVAL); 202 } 203 break; 204 205 case MII_TICK: 206 /* 207 * Is the interface even up? 208 */ 209 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 210 return (0); 211 212 /* 213 * Only used for autonegotiation. 214 */ 215 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 216 break; 217 218 /* 219 * Check to see if we have link. If we do, we don't 220 * need to restart the autonegotiation process. Read 221 * the BMSR twice in case it's latched. 222 */ 223 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 224 if (reg & BMSR_LINK) 225 break; 226 227 /* Announce link loss right after it happens. */ 228 if (++sc->mii_ticks == 0) 229 break; 230 /* 231 * Only retry autonegotiation every mii_anegticks seconds. 232 */ 233 if (sc->mii_ticks <= sc->mii_anegticks) 234 break; 235 236 sc->mii_ticks = 0; 237 mii_phy_auto(sc); 238 break; 239 } 240 241 /* Update the media status. */ 242 ciphy_status(sc); 243 244 /* 245 * Callback if something changed. Note that we need to poke 246 * apply fixups for certain PHY revs. 247 */ 248 if (sc->mii_media_active != mii->mii_media_active || 249 sc->mii_media_status != mii->mii_media_status || 250 cmd == MII_MEDIACHG) { 251 ciphy_fixup(sc); 252 } 253 mii_phy_update(sc, cmd); 254 return (0); 255 } 256 257 static void 258 ciphy_status(struct mii_softc *sc) 259 { 260 struct mii_data *mii = sc->mii_pdata; 261 int bmsr, bmcr; 262 263 mii->mii_media_status = IFM_AVALID; 264 mii->mii_media_active = IFM_ETHER; 265 266 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 267 268 if (bmsr & BMSR_LINK) 269 mii->mii_media_status |= IFM_ACTIVE; 270 271 bmcr = PHY_READ(sc, CIPHY_MII_BMCR); 272 273 if (bmcr & CIPHY_BMCR_LOOP) 274 mii->mii_media_active |= IFM_LOOP; 275 276 if (bmcr & CIPHY_BMCR_AUTOEN) { 277 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) { 278 /* Erg, still trying, I guess... */ 279 mii->mii_media_active |= IFM_NONE; 280 return; 281 } 282 } 283 284 bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR); 285 switch (bmsr & CIPHY_AUXCSR_SPEED) { 286 case CIPHY_SPEED10: 287 mii->mii_media_active |= IFM_10_T; 288 break; 289 case CIPHY_SPEED100: 290 mii->mii_media_active |= IFM_100_TX; 291 break; 292 case CIPHY_SPEED1000: 293 mii->mii_media_active |= IFM_1000_T; 294 break; 295 default: 296 device_printf(sc->mii_dev, "unknown PHY speed %x\n", 297 bmsr & CIPHY_AUXCSR_SPEED); 298 break; 299 } 300 301 if (bmsr & CIPHY_AUXCSR_FDX) 302 mii->mii_media_active |= IFM_FDX; 303 else 304 mii->mii_media_active |= IFM_HDX; 305 306 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && 307 (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0) 308 mii->mii_media_active |= IFM_ETH_MASTER; 309 } 310 311 static void 312 ciphy_reset(struct mii_softc *sc) 313 { 314 315 mii_phy_reset(sc); 316 DELAY(1000); 317 } 318 319 #define PHY_SETBIT(x, y, z) \ 320 PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) 321 #define PHY_CLRBIT(x, y, z) \ 322 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 323 324 static void 325 ciphy_fixup(struct mii_softc *sc) 326 { 327 uint16_t model; 328 uint16_t status, speed; 329 uint16_t val; 330 331 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 332 status = PHY_READ(sc, CIPHY_MII_AUXCSR); 333 speed = status & CIPHY_AUXCSR_SPEED; 334 335 if (strcmp(device_get_name(device_get_parent(sc->mii_dev)), 336 "nfe") == 0) { 337 /* need to set for 2.5V RGMII for NVIDIA adapters */ 338 val = PHY_READ(sc, CIPHY_MII_ECTL1); 339 val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL); 340 val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII); 341 PHY_WRITE(sc, CIPHY_MII_ECTL1, val); 342 /* From Linux. */ 343 val = PHY_READ(sc, CIPHY_MII_AUXCSR); 344 val |= CIPHY_AUXCSR_MDPPS; 345 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val); 346 val = PHY_READ(sc, CIPHY_MII_10BTCSR); 347 val |= CIPHY_10BTCSR_ECHO; 348 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); 349 } 350 351 switch (model) { 352 case MII_MODEL_CICADA_CS8204: 353 case MII_MODEL_CICADA_CS8201: 354 355 /* Turn off "aux mode" (whatever that means) */ 356 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 357 358 /* 359 * Work around speed polling bug in VT3119/VT3216 360 * when using MII in full duplex mode. 361 */ 362 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 363 (status & CIPHY_AUXCSR_FDX)) { 364 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 365 } else { 366 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 367 } 368 369 /* Enable link/activity LED blink. */ 370 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK); 371 372 break; 373 374 case MII_MODEL_CICADA_CS8201A: 375 case MII_MODEL_CICADA_CS8201B: 376 377 /* 378 * Work around speed polling bug in VT3119/VT3216 379 * when using MII in full duplex mode. 380 */ 381 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 382 (status & CIPHY_AUXCSR_FDX)) { 383 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 384 } else { 385 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 386 } 387 388 break; 389 case MII_MODEL_CICADA_VSC8211: 390 case MII_MODEL_CICADA_CS8244: 391 case MII_MODEL_VITESSE_VSC8601: 392 break; 393 default: 394 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 395 model); 396 break; 397 } 398 } 399