1 /*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 /* 32 * Driver for the Attansic/Atheros F1 10/100/1000 PHY. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/socket.h> 40 #include <sys/bus.h> 41 42 #include <net/if.h> 43 #include <net/if_media.h> 44 45 #include <dev/mii/mii.h> 46 #include <dev/mii/miivar.h> 47 #include "miidevs.h" 48 49 #include <dev/mii/atphyreg.h> 50 51 #include "miibus_if.h" 52 53 static int atphy_probe(device_t); 54 static int atphy_attach(device_t); 55 56 struct atphy_softc { 57 struct mii_softc mii_sc; 58 int mii_oui; 59 int mii_model; 60 int mii_rev; 61 }; 62 63 static device_method_t atphy_methods[] = { 64 /* Device interface. */ 65 DEVMETHOD(device_probe, atphy_probe), 66 DEVMETHOD(device_attach, atphy_attach), 67 DEVMETHOD(device_detach, mii_phy_detach), 68 DEVMETHOD(device_shutdown, bus_generic_shutdown), 69 { NULL, NULL } 70 }; 71 72 static devclass_t atphy_devclass; 73 static driver_t atphy_driver = { 74 "atphy", 75 atphy_methods, 76 sizeof(struct atphy_softc) 77 }; 78 79 DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0); 80 81 static int atphy_service(struct mii_softc *, struct mii_data *, int); 82 static void atphy_status(struct mii_softc *); 83 static void atphy_reset(struct mii_softc *); 84 static uint16_t atphy_anar(struct ifmedia_entry *); 85 static int atphy_auto(struct mii_softc *); 86 87 static const struct mii_phydesc atphys[] = { 88 MII_PHY_DESC(ATHEROS, F1), 89 MII_PHY_END 90 }; 91 92 static int 93 atphy_probe(device_t dev) 94 { 95 96 return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT)); 97 } 98 99 static int 100 atphy_attach(device_t dev) 101 { 102 struct atphy_softc *asc; 103 struct mii_softc *sc; 104 struct mii_attach_args *ma; 105 struct mii_data *mii; 106 107 asc = device_get_softc(dev); 108 sc = &asc->mii_sc; 109 ma = device_get_ivars(dev); 110 sc->mii_dev = device_get_parent(dev); 111 mii = device_get_softc(sc->mii_dev); 112 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 113 114 sc->mii_inst = mii->mii_instance; 115 sc->mii_phy = ma->mii_phyno; 116 sc->mii_service = atphy_service; 117 sc->mii_pdata = mii; 118 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 119 120 mii->mii_instance++; 121 122 asc->mii_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 123 asc->mii_model = MII_MODEL(ma->mii_id2); 124 asc->mii_rev = MII_REV(ma->mii_id2); 125 if (bootverbose) 126 device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n", 127 asc->mii_oui, asc->mii_model, asc->mii_rev); 128 129 atphy_reset(sc); 130 131 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 132 if (sc->mii_capabilities & BMSR_EXTSTAT) 133 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 134 device_printf(dev, " "); 135 mii_phy_add_media(sc); 136 printf("\n"); 137 138 MIIBUS_MEDIAINIT(sc->mii_dev); 139 return(0); 140 } 141 142 static int 143 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 144 { 145 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 146 uint16_t anar, bmcr, bmsr; 147 148 switch (cmd) { 149 case MII_POLLSTAT: 150 /* 151 * If we're not polling our PHY instance, just return. 152 */ 153 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 154 return (0); 155 break; 156 157 case MII_MEDIACHG: 158 /* 159 * If the media indicates a different PHY instance, 160 * isolate ourselves. 161 */ 162 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 163 bmcr = PHY_READ(sc, MII_BMCR); 164 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 165 return (0); 166 } 167 168 /* 169 * If the interface is not up, don't do anything. 170 */ 171 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 172 break; 173 174 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO || 175 IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 176 atphy_auto(sc); 177 break; 178 } 179 180 bmcr = 0; 181 switch (IFM_SUBTYPE(ife->ifm_media)) { 182 case IFM_100_TX: 183 bmcr = BMCR_S100; 184 break; 185 case IFM_10_T: 186 bmcr = BMCR_S10; 187 break; 188 case IFM_NONE: 189 bmcr = PHY_READ(sc, MII_BMCR); 190 /* 191 * XXX 192 * Due to an unknown reason powering down PHY resulted 193 * in unexpected results such as inaccessbility of 194 * hardware of freshly rebooted system. Disable 195 * powering down PHY until I got more information for 196 * Attansic/Atheros PHY hardwares. 197 */ 198 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 199 goto done; 200 default: 201 return (EINVAL); 202 } 203 204 anar = atphy_anar(ife); 205 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 206 bmcr |= BMCR_FDX; 207 /* Enable pause. */ 208 anar |= (3 << 10); 209 } 210 211 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | 212 EXTSR_1000THDX)) != 0) 213 PHY_WRITE(sc, MII_100T2CR, 0); 214 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA); 215 216 /* 217 * Reset the PHY so all changes take effect. 218 */ 219 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET); 220 done: 221 break; 222 223 case MII_TICK: 224 /* 225 * If we're not currently selected, just return. 226 */ 227 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 228 return (0); 229 230 /* 231 * Is the interface even up? 232 */ 233 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 234 return (0); 235 236 /* 237 * Only used for autonegotiation. 238 */ 239 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 240 sc->mii_ticks = 0; 241 break; 242 } 243 244 /* 245 * check for link. 246 * Read the status register twice; BMSR_LINK is latch-low. 247 */ 248 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 249 if (bmsr & BMSR_LINK) { 250 sc->mii_ticks = 0; 251 break; 252 } 253 254 /* Announce link loss right after it happens. */ 255 if (sc->mii_ticks++ == 0) 256 break; 257 if (sc->mii_ticks <= sc->mii_anegticks) 258 return (0); 259 260 sc->mii_ticks = 0; 261 atphy_auto(sc); 262 break; 263 } 264 265 /* Update the media status. */ 266 atphy_status(sc); 267 268 /* Callback if something changed. */ 269 mii_phy_update(sc, cmd); 270 return (0); 271 } 272 273 static void 274 atphy_status(struct mii_softc *sc) 275 { 276 struct mii_data *mii = sc->mii_pdata; 277 uint32_t bmsr, bmcr, ssr; 278 279 mii->mii_media_status = IFM_AVALID; 280 mii->mii_media_active = IFM_ETHER; 281 282 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 283 if ((bmsr & BMSR_LINK) != 0) 284 mii->mii_media_status |= IFM_ACTIVE; 285 286 bmcr = PHY_READ(sc, MII_BMCR); 287 if ((bmcr & BMCR_ISO) != 0) { 288 mii->mii_media_active |= IFM_NONE; 289 mii->mii_media_status = 0; 290 return; 291 } 292 293 if ((bmcr & BMCR_LOOP) != 0) 294 mii->mii_media_active |= IFM_LOOP; 295 296 ssr = PHY_READ(sc, ATPHY_SSR); 297 if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) { 298 /* Erg, still trying, I guess... */ 299 mii->mii_media_active |= IFM_NONE; 300 return; 301 } 302 303 switch (ssr & ATPHY_SSR_SPEED_MASK) { 304 case ATPHY_SSR_1000MBS: 305 mii->mii_media_active |= IFM_1000_T; 306 /* 307 * atphy(4) got a valid link so reset mii_ticks. 308 * Resetting mii_ticks is needed in order to 309 * detect link loss after auto-negotiation. 310 */ 311 sc->mii_ticks = 0; 312 break; 313 case ATPHY_SSR_100MBS: 314 mii->mii_media_active |= IFM_100_TX; 315 sc->mii_ticks = 0; 316 break; 317 case ATPHY_SSR_10MBS: 318 mii->mii_media_active |= IFM_10_T; 319 sc->mii_ticks = 0; 320 break; 321 default: 322 mii->mii_media_active |= IFM_NONE; 323 return; 324 } 325 326 if ((ssr & ATPHY_SSR_DUPLEX) != 0) 327 mii->mii_media_active |= IFM_FDX; 328 else 329 mii->mii_media_active |= IFM_HDX; 330 331 /* XXX Master/Slave, Flow-control */ 332 } 333 334 static void 335 atphy_reset(struct mii_softc *sc) 336 { 337 struct atphy_softc *asc; 338 uint32_t reg; 339 int i; 340 341 asc = (struct atphy_softc *)sc; 342 343 /* Take PHY out of power down mode. */ 344 PHY_WRITE(sc, 29, 0x29); 345 PHY_WRITE(sc, 30, 0); 346 347 reg = PHY_READ(sc, ATPHY_SCR); 348 /* Enable automatic crossover. */ 349 reg |= ATPHY_SCR_AUTO_X_MODE; 350 /* Disable power down. */ 351 reg &= ~ATPHY_SCR_MAC_PDOWN; 352 /* Enable CRS on Tx. */ 353 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX; 354 /* Auto correction for reversed cable polarity. */ 355 reg |= ATPHY_SCR_POLARITY_REVERSAL; 356 PHY_WRITE(sc, ATPHY_SCR, reg); 357 358 /* Workaround F1 bug to reset phy. */ 359 atphy_auto(sc); 360 361 for (i = 0; i < 1000; i++) { 362 DELAY(1); 363 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0) 364 break; 365 } 366 } 367 368 static uint16_t 369 atphy_anar(struct ifmedia_entry *ife) 370 { 371 uint16_t anar; 372 373 anar = 0; 374 switch (IFM_SUBTYPE(ife->ifm_media)) { 375 case IFM_AUTO: 376 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10; 377 return (anar); 378 case IFM_1000_T: 379 return (anar); 380 case IFM_100_TX: 381 anar |= ANAR_TX; 382 break; 383 case IFM_10_T: 384 anar |= ANAR_10; 385 break; 386 default: 387 return (0); 388 } 389 390 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 391 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX) 392 anar |= ANAR_TX_FD; 393 else 394 anar |= ANAR_10_FD; 395 } 396 397 return (anar); 398 } 399 400 static int 401 atphy_auto(struct mii_softc *sc) 402 { 403 uint16_t anar; 404 405 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities); 406 PHY_WRITE(sc, MII_ANAR, anar | (3 << 10) | ANAR_CSMA); 407 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 408 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX | 409 GTCR_ADV_1000THDX); 410 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG); 411 412 return (EJUSTRETURN); 413 } 414