1 /*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 /* 32 * Driver for the Attansic/Atheros F1 10/100/1000 PHY. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/socket.h> 40 #include <sys/bus.h> 41 42 #include <net/if.h> 43 #include <net/if_media.h> 44 45 #include <dev/mii/mii.h> 46 #include <dev/mii/miivar.h> 47 #include "miidevs.h" 48 49 #include <dev/mii/atphyreg.h> 50 51 #include "miibus_if.h" 52 53 static int atphy_probe(device_t); 54 static int atphy_attach(device_t); 55 56 struct atphy_softc { 57 struct mii_softc mii_sc; 58 int mii_oui; 59 int mii_model; 60 int mii_rev; 61 }; 62 63 static device_method_t atphy_methods[] = { 64 /* Device interface. */ 65 DEVMETHOD(device_probe, atphy_probe), 66 DEVMETHOD(device_attach, atphy_attach), 67 DEVMETHOD(device_detach, mii_phy_detach), 68 DEVMETHOD(device_shutdown, bus_generic_shutdown), 69 { NULL, NULL } 70 }; 71 72 static devclass_t atphy_devclass; 73 static driver_t atphy_driver = { 74 "atphy", 75 atphy_methods, 76 sizeof(struct atphy_softc) 77 }; 78 79 DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0); 80 81 static int atphy_service(struct mii_softc *, struct mii_data *, int); 82 static void atphy_status(struct mii_softc *); 83 static void atphy_reset(struct mii_softc *); 84 static uint16_t atphy_anar(struct ifmedia_entry *); 85 static int atphy_auto(struct mii_softc *); 86 87 static const struct mii_phydesc atphys[] = { 88 MII_PHY_DESC(ATHEROS, F1), 89 MII_PHY_DESC(ATHEROS, F1_7), 90 MII_PHY_DESC(ATHEROS, F2), 91 MII_PHY_END 92 }; 93 94 static int 95 atphy_probe(device_t dev) 96 { 97 98 return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT)); 99 } 100 101 static int 102 atphy_attach(device_t dev) 103 { 104 struct atphy_softc *asc; 105 struct mii_softc *sc; 106 struct mii_attach_args *ma; 107 struct mii_data *mii; 108 109 asc = device_get_softc(dev); 110 sc = &asc->mii_sc; 111 ma = device_get_ivars(dev); 112 sc->mii_dev = device_get_parent(dev); 113 mii = ma->mii_data; 114 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 115 116 sc->mii_flags = miibus_get_flags(dev); 117 sc->mii_inst = mii->mii_instance++; 118 sc->mii_phy = ma->mii_phyno; 119 sc->mii_service = atphy_service; 120 sc->mii_pdata = mii; 121 122 asc->mii_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 123 asc->mii_model = MII_MODEL(ma->mii_id2); 124 asc->mii_rev = MII_REV(ma->mii_id2); 125 if (bootverbose) 126 device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n", 127 asc->mii_oui, asc->mii_model, asc->mii_rev); 128 129 atphy_reset(sc); 130 131 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 132 if (sc->mii_capabilities & BMSR_EXTSTAT) 133 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 134 device_printf(dev, " "); 135 mii_phy_add_media(sc); 136 printf("\n"); 137 138 MIIBUS_MEDIAINIT(sc->mii_dev); 139 return (0); 140 } 141 142 static int 143 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 144 { 145 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 146 uint16_t anar, bmcr, bmsr; 147 148 switch (cmd) { 149 case MII_POLLSTAT: 150 break; 151 152 case MII_MEDIACHG: 153 /* 154 * If the interface is not up, don't do anything. 155 */ 156 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 157 break; 158 159 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO || 160 IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 161 atphy_auto(sc); 162 break; 163 } 164 165 bmcr = 0; 166 switch (IFM_SUBTYPE(ife->ifm_media)) { 167 case IFM_100_TX: 168 bmcr = BMCR_S100; 169 break; 170 case IFM_10_T: 171 bmcr = BMCR_S10; 172 break; 173 case IFM_NONE: 174 bmcr = PHY_READ(sc, MII_BMCR); 175 /* 176 * XXX 177 * Due to an unknown reason powering down PHY resulted 178 * in unexpected results such as inaccessbility of 179 * hardware of freshly rebooted system. Disable 180 * powering down PHY until I got more information for 181 * Attansic/Atheros PHY hardwares. 182 */ 183 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 184 goto done; 185 default: 186 return (EINVAL); 187 } 188 189 anar = atphy_anar(ife); 190 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 191 bmcr |= BMCR_FDX; 192 /* Enable pause. */ 193 anar |= (3 << 10); 194 } 195 196 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | 197 EXTSR_1000THDX)) != 0) 198 PHY_WRITE(sc, MII_100T2CR, 0); 199 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA); 200 201 /* 202 * Reset the PHY so all changes take effect. 203 */ 204 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN | 205 BMCR_STARTNEG); 206 done: 207 break; 208 209 case MII_TICK: 210 /* 211 * Is the interface even up? 212 */ 213 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 214 return (0); 215 216 /* 217 * Only used for autonegotiation. 218 */ 219 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 220 sc->mii_ticks = 0; 221 break; 222 } 223 224 /* 225 * check for link. 226 * Read the status register twice; BMSR_LINK is latch-low. 227 */ 228 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 229 if (bmsr & BMSR_LINK) { 230 sc->mii_ticks = 0; 231 break; 232 } 233 234 /* Announce link loss right after it happens. */ 235 if (sc->mii_ticks++ == 0) 236 break; 237 if (sc->mii_ticks <= sc->mii_anegticks) 238 return (0); 239 240 sc->mii_ticks = 0; 241 atphy_auto(sc); 242 break; 243 } 244 245 /* Update the media status. */ 246 atphy_status(sc); 247 248 /* Callback if something changed. */ 249 mii_phy_update(sc, cmd); 250 return (0); 251 } 252 253 static void 254 atphy_status(struct mii_softc *sc) 255 { 256 struct mii_data *mii = sc->mii_pdata; 257 uint32_t bmsr, bmcr, ssr; 258 259 mii->mii_media_status = IFM_AVALID; 260 mii->mii_media_active = IFM_ETHER; 261 262 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 263 if ((bmsr & BMSR_LINK) != 0) 264 mii->mii_media_status |= IFM_ACTIVE; 265 266 bmcr = PHY_READ(sc, MII_BMCR); 267 if ((bmcr & BMCR_ISO) != 0) { 268 mii->mii_media_active |= IFM_NONE; 269 mii->mii_media_status = 0; 270 return; 271 } 272 273 if ((bmcr & BMCR_LOOP) != 0) 274 mii->mii_media_active |= IFM_LOOP; 275 276 ssr = PHY_READ(sc, ATPHY_SSR); 277 if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) { 278 /* Erg, still trying, I guess... */ 279 mii->mii_media_active |= IFM_NONE; 280 return; 281 } 282 283 switch (ssr & ATPHY_SSR_SPEED_MASK) { 284 case ATPHY_SSR_1000MBS: 285 mii->mii_media_active |= IFM_1000_T; 286 /* 287 * atphy(4) got a valid link so reset mii_ticks. 288 * Resetting mii_ticks is needed in order to 289 * detect link loss after auto-negotiation. 290 */ 291 sc->mii_ticks = 0; 292 break; 293 case ATPHY_SSR_100MBS: 294 mii->mii_media_active |= IFM_100_TX; 295 sc->mii_ticks = 0; 296 break; 297 case ATPHY_SSR_10MBS: 298 mii->mii_media_active |= IFM_10_T; 299 sc->mii_ticks = 0; 300 break; 301 default: 302 mii->mii_media_active |= IFM_NONE; 303 return; 304 } 305 306 if ((ssr & ATPHY_SSR_DUPLEX) != 0) 307 mii->mii_media_active |= IFM_FDX; 308 else 309 mii->mii_media_active |= IFM_HDX; 310 311 /* XXX Master/Slave, Flow-control */ 312 } 313 314 static void 315 atphy_reset(struct mii_softc *sc) 316 { 317 struct atphy_softc *asc; 318 uint32_t reg; 319 int i; 320 321 asc = (struct atphy_softc *)sc; 322 323 /* Take PHY out of power down mode. */ 324 PHY_WRITE(sc, 29, 0x29); 325 PHY_WRITE(sc, 30, 0); 326 327 reg = PHY_READ(sc, ATPHY_SCR); 328 /* Enable automatic crossover. */ 329 reg |= ATPHY_SCR_AUTO_X_MODE; 330 /* Disable power down. */ 331 reg &= ~ATPHY_SCR_MAC_PDOWN; 332 /* Enable CRS on Tx. */ 333 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX; 334 /* Auto correction for reversed cable polarity. */ 335 reg |= ATPHY_SCR_POLARITY_REVERSAL; 336 PHY_WRITE(sc, ATPHY_SCR, reg); 337 338 /* Workaround F1 bug to reset phy. */ 339 atphy_auto(sc); 340 341 for (i = 0; i < 1000; i++) { 342 DELAY(1); 343 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0) 344 break; 345 } 346 } 347 348 static uint16_t 349 atphy_anar(struct ifmedia_entry *ife) 350 { 351 uint16_t anar; 352 353 anar = 0; 354 switch (IFM_SUBTYPE(ife->ifm_media)) { 355 case IFM_AUTO: 356 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10; 357 return (anar); 358 case IFM_1000_T: 359 return (anar); 360 case IFM_100_TX: 361 anar |= ANAR_TX; 362 break; 363 case IFM_10_T: 364 anar |= ANAR_10; 365 break; 366 default: 367 return (0); 368 } 369 370 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 371 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX) 372 anar |= ANAR_TX_FD; 373 else 374 anar |= ANAR_10_FD; 375 } 376 377 return (anar); 378 } 379 380 static int 381 atphy_auto(struct mii_softc *sc) 382 { 383 uint16_t anar; 384 385 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities); 386 PHY_WRITE(sc, MII_ANAR, anar | (3 << 10) | ANAR_CSMA); 387 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 388 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX | 389 GTCR_ADV_1000THDX); 390 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG); 391 392 return (EJUSTRETURN); 393 } 394