1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 /* 32 * Driver for the Attansic/Atheros F1 10/100/1000 PHY. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/socket.h> 40 #include <sys/bus.h> 41 42 #include <net/if.h> 43 #include <net/if_media.h> 44 45 #include <dev/mii/mii.h> 46 #include <dev/mii/miivar.h> 47 #include "miidevs.h" 48 49 #include <dev/mii/atphyreg.h> 50 51 #include "miibus_if.h" 52 53 static int atphy_probe(device_t); 54 static int atphy_attach(device_t); 55 56 static device_method_t atphy_methods[] = { 57 /* Device interface. */ 58 DEVMETHOD(device_probe, atphy_probe), 59 DEVMETHOD(device_attach, atphy_attach), 60 DEVMETHOD(device_detach, mii_phy_detach), 61 DEVMETHOD(device_shutdown, bus_generic_shutdown), 62 DEVMETHOD_END 63 }; 64 65 static driver_t atphy_driver = { 66 "atphy", 67 atphy_methods, 68 sizeof(struct mii_softc) 69 }; 70 71 DRIVER_MODULE(atphy, miibus, atphy_driver, 0, 0); 72 73 static int atphy_service(struct mii_softc *, struct mii_data *, int); 74 static void atphy_status(struct mii_softc *); 75 static void atphy_reset(struct mii_softc *); 76 static uint16_t atphy_anar(struct ifmedia_entry *); 77 static int atphy_setmedia(struct mii_softc *, int); 78 79 static const struct mii_phydesc atphys[] = { 80 MII_PHY_DESC(xxATHEROS, F1), 81 MII_PHY_DESC(xxATHEROS, F1_7), 82 MII_PHY_DESC(xxATHEROS, AR8021), 83 MII_PHY_DESC(xxATHEROS, F2), 84 MII_PHY_END 85 }; 86 87 static const struct mii_phy_funcs atphy_funcs = { 88 atphy_service, 89 atphy_status, 90 atphy_reset 91 }; 92 93 static int 94 atphy_probe(device_t dev) 95 { 96 97 return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT)); 98 } 99 100 static int 101 atphy_attach(device_t dev) 102 { 103 104 mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &atphy_funcs, 1); 105 return (0); 106 } 107 108 static int 109 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 110 { 111 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 112 uint16_t anar, bmcr, bmsr; 113 114 switch (cmd) { 115 case MII_POLLSTAT: 116 break; 117 118 case MII_MEDIACHG: 119 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO || 120 IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 121 atphy_setmedia(sc, ife->ifm_media); 122 break; 123 } 124 125 bmcr = 0; 126 switch (IFM_SUBTYPE(ife->ifm_media)) { 127 case IFM_100_TX: 128 bmcr = BMCR_S100; 129 break; 130 case IFM_10_T: 131 bmcr = BMCR_S10; 132 break; 133 case IFM_NONE: 134 bmcr = PHY_READ(sc, MII_BMCR); 135 /* 136 * XXX 137 * Due to an unknown reason powering down PHY resulted 138 * in unexpected results such as inaccessibility of 139 * hardware of freshly rebooted system. Disable 140 * powering down PHY until I got more information for 141 * Attansic/Atheros PHY hardwares. 142 */ 143 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 144 goto done; 145 default: 146 return (EINVAL); 147 } 148 149 anar = atphy_anar(ife); 150 if ((ife->ifm_media & IFM_FDX) != 0) { 151 bmcr |= BMCR_FDX; 152 if ((ife->ifm_media & IFM_FLOW) != 0 || 153 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 154 anar |= ANAR_PAUSE_TOWARDS; 155 } 156 157 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | 158 EXTSR_1000THDX)) != 0) 159 PHY_WRITE(sc, MII_100T2CR, 0); 160 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA); 161 162 /* 163 * Reset the PHY so all changes take effect. 164 */ 165 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN | 166 BMCR_STARTNEG); 167 done: 168 break; 169 170 case MII_TICK: 171 /* 172 * Only used for autonegotiation. 173 */ 174 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 175 sc->mii_ticks = 0; 176 break; 177 } 178 179 /* 180 * Check for link. 181 * Read the status register twice; BMSR_LINK is latch-low. 182 */ 183 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 184 if (bmsr & BMSR_LINK) { 185 sc->mii_ticks = 0; 186 break; 187 } 188 189 /* Announce link loss right after it happens. */ 190 if (sc->mii_ticks++ == 0) 191 break; 192 if (sc->mii_ticks <= sc->mii_anegticks) 193 return (0); 194 195 sc->mii_ticks = 0; 196 atphy_setmedia(sc, ife->ifm_media); 197 break; 198 } 199 200 /* Update the media status. */ 201 PHY_STATUS(sc); 202 203 /* Callback if something changed. */ 204 mii_phy_update(sc, cmd); 205 return (0); 206 } 207 208 static void 209 atphy_status(struct mii_softc *sc) 210 { 211 struct mii_data *mii = sc->mii_pdata; 212 uint32_t bmsr, bmcr, ssr; 213 214 mii->mii_media_status = IFM_AVALID; 215 mii->mii_media_active = IFM_ETHER; 216 217 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 218 if ((bmsr & BMSR_LINK) != 0) 219 mii->mii_media_status |= IFM_ACTIVE; 220 221 bmcr = PHY_READ(sc, MII_BMCR); 222 if ((bmcr & BMCR_ISO) != 0) { 223 mii->mii_media_active |= IFM_NONE; 224 mii->mii_media_status = 0; 225 return; 226 } 227 228 if ((bmcr & BMCR_LOOP) != 0) 229 mii->mii_media_active |= IFM_LOOP; 230 231 ssr = PHY_READ(sc, ATPHY_SSR); 232 if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) { 233 /* Erg, still trying, I guess... */ 234 mii->mii_media_active |= IFM_NONE; 235 return; 236 } 237 238 switch (ssr & ATPHY_SSR_SPEED_MASK) { 239 case ATPHY_SSR_1000MBS: 240 mii->mii_media_active |= IFM_1000_T; 241 /* 242 * atphy(4) has a valid link so reset mii_ticks. 243 * Resetting mii_ticks is needed in order to 244 * detect link loss after auto-negotiation. 245 */ 246 sc->mii_ticks = 0; 247 break; 248 case ATPHY_SSR_100MBS: 249 mii->mii_media_active |= IFM_100_TX; 250 sc->mii_ticks = 0; 251 break; 252 case ATPHY_SSR_10MBS: 253 mii->mii_media_active |= IFM_10_T; 254 sc->mii_ticks = 0; 255 break; 256 default: 257 mii->mii_media_active |= IFM_NONE; 258 return; 259 } 260 261 if ((ssr & ATPHY_SSR_DUPLEX) != 0) 262 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); 263 else 264 mii->mii_media_active |= IFM_HDX; 265 266 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && 267 (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0) 268 mii->mii_media_active |= IFM_ETH_MASTER; 269 } 270 271 static void 272 atphy_reset(struct mii_softc *sc) 273 { 274 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 275 uint32_t reg; 276 int i; 277 278 /* Take PHY out of power down mode. */ 279 PHY_WRITE(sc, 29, 0x29); 280 PHY_WRITE(sc, 30, 0); 281 282 reg = PHY_READ(sc, ATPHY_SCR); 283 /* Enable automatic crossover. */ 284 reg |= ATPHY_SCR_AUTO_X_MODE; 285 /* Disable power down. */ 286 reg &= ~ATPHY_SCR_MAC_PDOWN; 287 /* Enable CRS on Tx. */ 288 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX; 289 /* Auto correction for reversed cable polarity. */ 290 reg |= ATPHY_SCR_POLARITY_REVERSAL; 291 PHY_WRITE(sc, ATPHY_SCR, reg); 292 293 /* Workaround F1 bug to reset phy. */ 294 atphy_setmedia(sc, ife == NULL ? IFM_AUTO : ife->ifm_media); 295 296 for (i = 0; i < 1000; i++) { 297 DELAY(1); 298 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0) 299 break; 300 } 301 } 302 303 static uint16_t 304 atphy_anar(struct ifmedia_entry *ife) 305 { 306 uint16_t anar; 307 308 anar = 0; 309 switch (IFM_SUBTYPE(ife->ifm_media)) { 310 case IFM_AUTO: 311 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10; 312 return (anar); 313 case IFM_1000_T: 314 return (anar); 315 case IFM_100_TX: 316 anar |= ANAR_TX; 317 break; 318 case IFM_10_T: 319 anar |= ANAR_10; 320 break; 321 default: 322 return (0); 323 } 324 325 if ((ife->ifm_media & IFM_FDX) != 0) { 326 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX) 327 anar |= ANAR_TX_FD; 328 else 329 anar |= ANAR_10_FD; 330 } 331 332 return (anar); 333 } 334 335 static int 336 atphy_setmedia(struct mii_softc *sc, int media) 337 { 338 uint16_t anar; 339 340 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; 341 if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) && 342 ((media & IFM_FLOW) != 0 || 343 (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) 344 anar |= ANAR_PAUSE_TOWARDS; 345 PHY_WRITE(sc, MII_ANAR, anar); 346 if ((sc->mii_extcapabilities & 347 (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 348 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX | 349 GTCR_ADV_1000THDX); 350 else if (sc->mii_mpd_model == MII_MODEL_xxATHEROS_F1) { 351 /* 352 * AR8132 has 10/100 PHY and the PHY uses the same 353 * model number of F1 gigabit PHY. The PHY has no 354 * ability to establish gigabit link so explicitly 355 * disable 1000baseT configuration for the PHY. 356 * Otherwise, there is a case that atphy(4) could 357 * not establish a link against gigabit link partner 358 * unless the link partner supports down-shifting. 359 */ 360 PHY_WRITE(sc, MII_100T2CR, 0); 361 } 362 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG); 363 364 return (EJUSTRETURN); 365 } 366