1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifndef _MFIVAR_H 28 #define _MFIVAR_H 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * SCSI structures and definitions are used from here, but no linking 35 * requirements are made to CAM. 36 */ 37 #include <cam/scsi/scsi_all.h> 38 39 struct mfi_hwcomms { 40 uint32_t hw_pi; 41 uint32_t hw_ci; 42 uint32_t hw_reply_q[1]; 43 }; 44 45 struct mfi_softc; 46 47 struct mfi_command { 48 TAILQ_ENTRY(mfi_command) cm_link; 49 struct mfi_softc *cm_sc; 50 union mfi_frame *cm_frame; 51 uint32_t cm_frame_busaddr; 52 struct mfi_sense *cm_sense; 53 uint32_t cm_sense_busaddr; 54 bus_dmamap_t cm_dmamap; 55 union mfi_sgl *cm_sg; 56 void *cm_data; 57 int cm_len; 58 int cm_total_frame_size; 59 int cm_extra_frames; 60 int cm_flags; 61 #define MFI_CMD_MAPPED (1<<0) 62 #define MFI_CMD_DATAIN (1<<1) 63 #define MFI_CMD_DATAOUT (1<<2) 64 #define MFI_CMD_COMPLETED (1<<3) 65 #define MFI_CMD_POLLED (1<<4) 66 #define MFI_ON_MFIQ_FREE (1<<5) 67 #define MFI_ON_MFIQ_READY (1<<6) 68 #define MFI_ON_MFIQ_BUSY (1<<7) 69 #define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7)) 70 int cm_aen_abort; 71 void (* cm_complete)(struct mfi_command *cm); 72 void *cm_private; 73 }; 74 75 struct mfi_ld { 76 TAILQ_ENTRY(mfi_ld) ld_link; 77 device_t ld_disk; 78 struct mfi_ld_info *ld_info; 79 int ld_id; 80 }; 81 82 struct mfi_aen { 83 TAILQ_ENTRY(mfi_aen) aen_link; 84 struct proc *p; 85 }; 86 87 struct mfi_softc { 88 device_t mfi_dev; 89 int mfi_flags; 90 #define MFI_FLAGS_SG64 (1<<0) 91 #define MFI_FLAGS_QFRZN (1<<1) 92 #define MFI_FLAGS_OPEN (1<<2) 93 94 struct mfi_hwcomms *mfi_comms; 95 TAILQ_HEAD(,mfi_command) mfi_free; 96 TAILQ_HEAD(,mfi_command) mfi_ready; 97 TAILQ_HEAD(,mfi_command) mfi_busy; 98 struct bio_queue_head mfi_bioq; 99 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 100 101 struct resource *mfi_regs_resource; 102 bus_space_handle_t mfi_bhandle; 103 bus_space_tag_t mfi_btag; 104 int mfi_regs_rid; 105 106 bus_dma_tag_t mfi_parent_dmat; 107 bus_dma_tag_t mfi_buffer_dmat; 108 109 bus_dma_tag_t mfi_comms_dmat; 110 bus_dmamap_t mfi_comms_dmamap; 111 uint32_t mfi_comms_busaddr; 112 113 bus_dma_tag_t mfi_frames_dmat; 114 bus_dmamap_t mfi_frames_dmamap; 115 uint32_t mfi_frames_busaddr; 116 union mfi_frame *mfi_frames; 117 118 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 119 struct mfi_command *mfi_aen_cm; 120 uint32_t mfi_aen_triggered; 121 uint32_t mfi_poll_waiting; 122 struct selinfo mfi_select; 123 124 bus_dma_tag_t mfi_sense_dmat; 125 bus_dmamap_t mfi_sense_dmamap; 126 uint32_t mfi_sense_busaddr; 127 struct mfi_sense *mfi_sense; 128 129 struct resource *mfi_irq; 130 void *mfi_intr; 131 int mfi_irq_rid; 132 133 struct intr_config_hook mfi_ich; 134 eventhandler_tag eh; 135 136 /* 137 * Allocation for the command array. Used as an indexable array to 138 * recover completed commands. 139 */ 140 struct mfi_command *mfi_commands; 141 /* 142 * How many commands were actually allocated 143 */ 144 int mfi_total_cmds; 145 /* 146 * How many commands the firmware can handle. Also how big the reply 147 * queue is, minus 1. 148 */ 149 int mfi_max_fw_cmds; 150 /* 151 * Max number of S/G elements the firmware can handle 152 */ 153 int mfi_max_fw_sgl; 154 /* 155 * How many S/G elements we'll ever actually use 156 */ 157 int mfi_total_sgl; 158 /* 159 * How many bytes a compound frame is, including all of the extra frames 160 * that are used for S/G elements. 161 */ 162 int mfi_frame_size; 163 /* 164 * How large an S/G element is. Used to calculate the number of single 165 * frames in a command. 166 */ 167 int mfi_sgsize; 168 /* 169 * Max number of sectors that the firmware allows 170 */ 171 uint32_t mfi_max_io; 172 173 TAILQ_HEAD(,mfi_ld) mfi_ld_tqh; 174 eventhandler_tag mfi_eh; 175 struct cdev *mfi_cdev; 176 177 struct mtx mfi_io_lock; 178 }; 179 180 extern int mfi_attach(struct mfi_softc *); 181 extern void mfi_free(struct mfi_softc *); 182 extern int mfi_shutdown(struct mfi_softc *); 183 extern void mfi_startio(struct mfi_softc *); 184 extern void mfi_disk_complete(struct bio *); 185 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 186 187 #define MFIQ_ADD(sc, qname) \ 188 do { \ 189 struct mfi_qstat *qs; \ 190 \ 191 qs = &(sc)->mfi_qstat[qname]; \ 192 qs->q_length++; \ 193 if (qs->q_length > qs->q_max) \ 194 qs->q_max = qs->q_length; \ 195 } while (0) 196 197 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 198 199 #define MFIQ_INIT(sc, qname) \ 200 do { \ 201 sc->mfi_qstat[qname].q_length = 0; \ 202 sc->mfi_qstat[qname].q_max = 0; \ 203 } while (0) 204 205 #define MFIQ_COMMAND_QUEUE(name, index) \ 206 static __inline void \ 207 mfi_initq_ ## name (struct mfi_softc *sc) \ 208 { \ 209 TAILQ_INIT(&sc->mfi_ ## name); \ 210 MFIQ_INIT(sc, index); \ 211 } \ 212 static __inline void \ 213 mfi_enqueue_ ## name (struct mfi_command *cm) \ 214 { \ 215 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 216 printf("command %p is on another queue, " \ 217 "flags = %#x\n", cm, cm->cm_flags); \ 218 panic("command is on another queue"); \ 219 } \ 220 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 221 cm->cm_flags |= MFI_ON_ ## index; \ 222 MFIQ_ADD(cm->cm_sc, index); \ 223 } \ 224 static __inline void \ 225 mfi_requeue_ ## name (struct mfi_command *cm) \ 226 { \ 227 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 228 printf("command %p is on another queue, " \ 229 "flags = %#x\n", cm, cm->cm_flags); \ 230 panic("command is on another queue"); \ 231 } \ 232 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 233 cm->cm_flags |= MFI_ON_ ## index; \ 234 MFIQ_ADD(cm->cm_sc, index); \ 235 } \ 236 static __inline struct mfi_command * \ 237 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 238 { \ 239 struct mfi_command *cm; \ 240 \ 241 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 242 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 243 printf("command %p not in queue, " \ 244 "flags = %#x, bit = %#x\n", cm, \ 245 cm->cm_flags, MFI_ON_ ## index); \ 246 panic("command not in queue"); \ 247 } \ 248 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 249 cm->cm_flags &= ~MFI_ON_ ## index; \ 250 MFIQ_REMOVE(sc, index); \ 251 } \ 252 return (cm); \ 253 } \ 254 static __inline void \ 255 mfi_remove_ ## name (struct mfi_command *cm) \ 256 { \ 257 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 258 printf("command %p not in queue, flags = %#x, " \ 259 "bit = %#x\n", cm, cm->cm_flags, \ 260 MFI_ON_ ## index); \ 261 panic("command not in queue"); \ 262 } \ 263 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 264 cm->cm_flags &= ~MFI_ON_ ## index; \ 265 MFIQ_REMOVE(cm->cm_sc, index); \ 266 } \ 267 struct hack 268 269 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 270 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 271 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 272 273 static __inline void 274 mfi_initq_bio(struct mfi_softc *sc) 275 { 276 bioq_init(&sc->mfi_bioq); 277 MFIQ_INIT(sc, MFIQ_BIO); 278 } 279 280 static __inline void 281 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 282 { 283 bioq_insert_tail(&sc->mfi_bioq, bp); 284 MFIQ_ADD(sc, MFIQ_BIO); 285 } 286 287 static __inline struct bio * 288 mfi_dequeue_bio(struct mfi_softc *sc) 289 { 290 struct bio *bp; 291 292 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 293 bioq_remove(&sc->mfi_bioq, bp); 294 MFIQ_REMOVE(sc, MFIQ_BIO); 295 } 296 return (bp); 297 } 298 299 static __inline void 300 mfi_print_sense(struct mfi_softc *sc, void *sense) 301 { 302 int error, key, asc, ascq; 303 304 scsi_extract_sense((struct scsi_sense_data *)sense, 305 &error, &key, &asc, &ascq); 306 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 307 "asc %d, ascq %d\n", error, key, asc, ascq); 308 } 309 310 311 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 312 sc->mfi_bhandle, (reg), (val)) 313 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 314 (sc)->mfi_bhandle, (reg)) 315 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 316 sc->mfi_bhandle, (reg), (val)) 317 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 318 (sc)->mfi_bhandle, (reg)) 319 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 320 sc->mfi_bhandle, (reg), (val)) 321 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 322 (sc)->mfi_bhandle, (reg)) 323 324 MALLOC_DECLARE(M_MFIBUF); 325 326 #endif /* _MFIVAR_H */ 327