1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifndef _MFIVAR_H 28 #define _MFIVAR_H 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * SCSI structures and definitions are used from here, but no linking 35 * requirements are made to CAM. 36 */ 37 #include <cam/scsi/scsi_all.h> 38 39 struct mfi_hwcomms { 40 uint32_t hw_pi; 41 uint32_t hw_ci; 42 uint32_t hw_reply_q[1]; 43 }; 44 45 struct mfi_softc; 46 47 struct mfi_command { 48 TAILQ_ENTRY(mfi_command) cm_link; 49 struct mfi_softc *cm_sc; 50 union mfi_frame *cm_frame; 51 uint32_t cm_frame_busaddr; 52 struct mfi_sense *cm_sense; 53 uint32_t cm_sense_busaddr; 54 bus_dmamap_t cm_dmamap; 55 union mfi_sgl *cm_sg; 56 void *cm_data; 57 int cm_len; 58 int cm_total_frame_size; 59 int cm_extra_frames; 60 int cm_flags; 61 #define MFI_CMD_MAPPED (1<<0) 62 #define MFI_CMD_DATAIN (1<<1) 63 #define MFI_CMD_DATAOUT (1<<2) 64 #define MFI_CMD_COMPLETED (1<<3) 65 #define MFI_CMD_POLLED (1<<4) 66 #define MFI_ON_MFIQ_FREE (1<<5) 67 #define MFI_ON_MFIQ_READY (1<<6) 68 #define MFI_ON_MFIQ_BUSY (1<<7) 69 #define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7)) 70 int cm_aen_abort; 71 void (* cm_complete)(struct mfi_command *cm); 72 void *cm_private; 73 }; 74 75 struct mfi_ld { 76 TAILQ_ENTRY(mfi_ld) ld_link; 77 device_t ld_disk; 78 uint64_t ld_sectors; 79 uint32_t ld_secsize; 80 int ld_id; 81 }; 82 83 struct mfi_aen { 84 TAILQ_ENTRY(mfi_aen) aen_link; 85 struct proc *p; 86 }; 87 88 struct mfi_softc { 89 device_t mfi_dev; 90 int mfi_flags; 91 #define MFI_FLAGS_SG64 (1<<0) 92 #define MFI_FLAGS_QFRZN (1<<1) 93 #define MFI_FLAGS_OPEN (1<<2) 94 95 struct mfi_hwcomms *mfi_comms; 96 TAILQ_HEAD(,mfi_command) mfi_free; 97 TAILQ_HEAD(,mfi_command) mfi_ready; 98 TAILQ_HEAD(,mfi_command) mfi_busy; 99 struct bio_queue_head mfi_bioq; 100 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 101 102 struct resource *mfi_regs_resource; 103 bus_space_handle_t mfi_bhandle; 104 bus_space_tag_t mfi_btag; 105 int mfi_regs_rid; 106 107 bus_dma_tag_t mfi_parent_dmat; 108 bus_dma_tag_t mfi_buffer_dmat; 109 110 bus_dma_tag_t mfi_comms_dmat; 111 bus_dmamap_t mfi_comms_dmamap; 112 uint32_t mfi_comms_busaddr; 113 114 bus_dma_tag_t mfi_frames_dmat; 115 bus_dmamap_t mfi_frames_dmamap; 116 uint32_t mfi_frames_busaddr; 117 union mfi_frame *mfi_frames; 118 119 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 120 struct mfi_command *mfi_aen_cm; 121 uint32_t mfi_aen_triggered; 122 uint32_t mfi_poll_waiting; 123 struct selinfo mfi_select; 124 125 bus_dma_tag_t mfi_sense_dmat; 126 bus_dmamap_t mfi_sense_dmamap; 127 uint32_t mfi_sense_busaddr; 128 struct mfi_sense *mfi_sense; 129 130 struct resource *mfi_irq; 131 void *mfi_intr; 132 int mfi_irq_rid; 133 134 struct intr_config_hook mfi_ich; 135 eventhandler_tag eh; 136 int mfi_probe_count; 137 138 /* 139 * Allocation for the command array. Used as an indexable array to 140 * recover completed commands. 141 */ 142 struct mfi_command *mfi_commands; 143 /* 144 * How many commands were actually allocated 145 */ 146 int mfi_total_cmds; 147 /* 148 * How many commands the firmware can handle. Also how big the reply 149 * queue is, minus 1. 150 */ 151 int mfi_max_fw_cmds; 152 /* 153 * Max number of S/G elements the firmware can handle 154 */ 155 int mfi_max_fw_sgl; 156 /* 157 * How many S/G elements we'll ever actually use 158 */ 159 int mfi_total_sgl; 160 /* 161 * How many bytes a compound frame is, including all of the extra frames 162 * that are used for S/G elements. 163 */ 164 int mfi_frame_size; 165 /* 166 * How large an S/G element is. Used to calculate the number of single 167 * frames in a command. 168 */ 169 int mfi_sgsize; 170 /* 171 * Max number of sectors that the firmware allows 172 */ 173 uint32_t mfi_max_io; 174 175 TAILQ_HEAD(,mfi_ld) mfi_ld_tqh; 176 eventhandler_tag mfi_eh; 177 struct cdev *mfi_cdev; 178 179 struct mtx mfi_io_lock; 180 }; 181 182 extern int mfi_attach(struct mfi_softc *); 183 extern void mfi_free(struct mfi_softc *); 184 extern int mfi_shutdown(struct mfi_softc *); 185 extern void mfi_startio(struct mfi_softc *); 186 extern void mfi_disk_complete(struct bio *); 187 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 188 189 #define MFIQ_ADD(sc, qname) \ 190 do { \ 191 struct mfi_qstat *qs; \ 192 \ 193 qs = &(sc)->mfi_qstat[qname]; \ 194 qs->q_length++; \ 195 if (qs->q_length > qs->q_max) \ 196 qs->q_max = qs->q_length; \ 197 } while (0) 198 199 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 200 201 #define MFIQ_INIT(sc, qname) \ 202 do { \ 203 sc->mfi_qstat[qname].q_length = 0; \ 204 sc->mfi_qstat[qname].q_max = 0; \ 205 } while (0) 206 207 #define MFIQ_COMMAND_QUEUE(name, index) \ 208 static __inline void \ 209 mfi_initq_ ## name (struct mfi_softc *sc) \ 210 { \ 211 TAILQ_INIT(&sc->mfi_ ## name); \ 212 MFIQ_INIT(sc, index); \ 213 } \ 214 static __inline void \ 215 mfi_enqueue_ ## name (struct mfi_command *cm) \ 216 { \ 217 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 218 printf("command %p is on another queue, " \ 219 "flags = %#x\n", cm, cm->cm_flags); \ 220 panic("command is on another queue"); \ 221 } \ 222 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 223 cm->cm_flags |= MFI_ON_ ## index; \ 224 MFIQ_ADD(cm->cm_sc, index); \ 225 } \ 226 static __inline void \ 227 mfi_requeue_ ## name (struct mfi_command *cm) \ 228 { \ 229 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 230 printf("command %p is on another queue, " \ 231 "flags = %#x\n", cm, cm->cm_flags); \ 232 panic("command is on another queue"); \ 233 } \ 234 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 235 cm->cm_flags |= MFI_ON_ ## index; \ 236 MFIQ_ADD(cm->cm_sc, index); \ 237 } \ 238 static __inline struct mfi_command * \ 239 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 240 { \ 241 struct mfi_command *cm; \ 242 \ 243 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 244 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 245 printf("command %p not in queue, " \ 246 "flags = %#x, bit = %#x\n", cm, \ 247 cm->cm_flags, MFI_ON_ ## index); \ 248 panic("command not in queue"); \ 249 } \ 250 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 251 cm->cm_flags &= ~MFI_ON_ ## index; \ 252 MFIQ_REMOVE(sc, index); \ 253 } \ 254 return (cm); \ 255 } \ 256 static __inline void \ 257 mfi_remove_ ## name (struct mfi_command *cm) \ 258 { \ 259 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 260 printf("command %p not in queue, flags = %#x, " \ 261 "bit = %#x\n", cm, cm->cm_flags, \ 262 MFI_ON_ ## index); \ 263 panic("command not in queue"); \ 264 } \ 265 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 266 cm->cm_flags &= ~MFI_ON_ ## index; \ 267 MFIQ_REMOVE(cm->cm_sc, index); \ 268 } \ 269 struct hack 270 271 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 272 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 273 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 274 275 static __inline void 276 mfi_initq_bio(struct mfi_softc *sc) 277 { 278 bioq_init(&sc->mfi_bioq); 279 MFIQ_INIT(sc, MFIQ_BIO); 280 } 281 282 static __inline void 283 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 284 { 285 bioq_insert_tail(&sc->mfi_bioq, bp); 286 MFIQ_ADD(sc, MFIQ_BIO); 287 } 288 289 static __inline struct bio * 290 mfi_dequeue_bio(struct mfi_softc *sc) 291 { 292 struct bio *bp; 293 294 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 295 bioq_remove(&sc->mfi_bioq, bp); 296 MFIQ_REMOVE(sc, MFIQ_BIO); 297 } 298 return (bp); 299 } 300 301 static __inline void 302 mfi_print_sense(struct mfi_softc *sc, void *sense) 303 { 304 int error, key, asc, ascq; 305 306 scsi_extract_sense((struct scsi_sense_data *)sense, 307 &error, &key, &asc, &ascq); 308 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 309 "asc %d, ascq %d\n", error, key, asc, ascq); 310 } 311 312 313 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 314 sc->mfi_bhandle, (reg), (val)) 315 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 316 (sc)->mfi_bhandle, (reg)) 317 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 318 sc->mfi_bhandle, (reg), (val)) 319 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 320 (sc)->mfi_bhandle, (reg)) 321 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 322 sc->mfi_bhandle, (reg), (val)) 323 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 324 (sc)->mfi_bhandle, (reg)) 325 326 MALLOC_DECLARE(M_MFIBUF); 327 328 #endif /* _MFIVAR_H */ 329