1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifndef _MFIVAR_H 28 #define _MFIVAR_H 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * SCSI structures and definitions are used from here, but no linking 35 * requirements are made to CAM. 36 */ 37 #include <cam/scsi/scsi_all.h> 38 39 struct mfi_hwcomms { 40 uint32_t hw_pi; 41 uint32_t hw_ci; 42 uint32_t hw_reply_q[1]; 43 }; 44 45 struct mfi_softc; 46 47 struct mfi_command { 48 TAILQ_ENTRY(mfi_command) cm_link; 49 struct mfi_softc *cm_sc; 50 union mfi_frame *cm_frame; 51 uint32_t cm_frame_busaddr; 52 struct mfi_sense *cm_sense; 53 uint32_t cm_sense_busaddr; 54 bus_dmamap_t cm_dmamap; 55 union mfi_sgl *cm_sg; 56 void *cm_data; 57 int cm_len; 58 int cm_total_frame_size; 59 int cm_extra_frames; 60 int cm_flags; 61 #define MFI_CMD_MAPPED (1<<0) 62 #define MFI_CMD_DATAIN (1<<1) 63 #define MFI_CMD_DATAOUT (1<<2) 64 #define MFI_CMD_COMPLETED (1<<3) 65 #define MFI_CMD_POLLED (1<<4) 66 #define MFI_ON_MFIQ_FREE (1<<5) 67 #define MFI_ON_MFIQ_READY (1<<6) 68 #define MFI_ON_MFIQ_BUSY (1<<7) 69 #define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7)) 70 void (* cm_complete)(struct mfi_command *cm); 71 void *cm_private; 72 }; 73 74 struct mfi_ld { 75 TAILQ_ENTRY(mfi_ld) ld_link; 76 device_t ld_disk; 77 uint64_t ld_sectors; 78 uint32_t ld_secsize; 79 int ld_id; 80 }; 81 82 struct mfi_softc { 83 device_t mfi_dev; 84 int mfi_flags; 85 #define MFI_FLAGS_SG64 (1<<0) 86 #define MFI_FLAGS_QFRZN (1<<1) 87 #define MFI_FLAGS_OPEN (1<<2) 88 89 struct mfi_hwcomms *mfi_comms; 90 TAILQ_HEAD(,mfi_command) mfi_free; 91 TAILQ_HEAD(,mfi_command) mfi_ready; 92 TAILQ_HEAD(,mfi_command) mfi_busy; 93 struct bio_queue_head mfi_bioq; 94 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 95 96 struct resource *mfi_regs_resource; 97 bus_space_handle_t mfi_bhandle; 98 bus_space_tag_t mfi_btag; 99 int mfi_regs_rid; 100 101 bus_dma_tag_t mfi_parent_dmat; 102 bus_dma_tag_t mfi_buffer_dmat; 103 104 bus_dma_tag_t mfi_comms_dmat; 105 bus_dmamap_t mfi_comms_dmamap; 106 uint32_t mfi_comms_busaddr; 107 108 bus_dma_tag_t mfi_frames_dmat; 109 bus_dmamap_t mfi_frames_dmamap; 110 uint32_t mfi_frames_busaddr; 111 union mfi_frame *mfi_frames; 112 113 bus_dma_tag_t mfi_sense_dmat; 114 bus_dmamap_t mfi_sense_dmamap; 115 uint32_t mfi_sense_busaddr; 116 struct mfi_sense *mfi_sense; 117 118 struct resource *mfi_irq; 119 void *mfi_intr; 120 int mfi_irq_rid; 121 122 struct intr_config_hook mfi_ich; 123 eventhandler_tag eh; 124 int mfi_probe_count; 125 126 /* 127 * Allocation for the command array. Used as an indexable array to 128 * recover completed commands. 129 */ 130 struct mfi_command *mfi_commands; 131 /* 132 * How many commands were actually allocated 133 */ 134 int mfi_total_cmds; 135 /* 136 * How many commands the firmware can handle. Also how big the reply 137 * queue is, minus 1. 138 */ 139 int mfi_max_fw_cmds; 140 /* 141 * Max number of S/G elements the firmware can handle 142 */ 143 int mfi_max_fw_sgl; 144 /* 145 * How many S/G elements we'll ever actually use 146 */ 147 int mfi_total_sgl; 148 /* 149 * How many bytes a compound frame is, including all of the extra frames 150 * that are used for S/G elements. 151 */ 152 int mfi_frame_size; 153 /* 154 * How large an S/G element is. Used to calculate the number of single 155 * frames in a command. 156 */ 157 int mfi_sgsize; 158 /* 159 * Max number of sectors that the firmware allows 160 */ 161 uint32_t mfi_max_io; 162 163 TAILQ_HEAD(,mfi_ld) mfi_ld_tqh; 164 eventhandler_tag mfi_eh; 165 struct cdev *mfi_cdev; 166 167 struct mtx mfi_io_lock; 168 }; 169 170 extern int mfi_attach(struct mfi_softc *); 171 extern void mfi_free(struct mfi_softc *); 172 extern int mfi_shutdown(struct mfi_softc *); 173 extern void mfi_startio(struct mfi_softc *); 174 extern void mfi_disk_complete(struct bio *); 175 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 176 177 #define MFIQ_ADD(sc, qname) \ 178 do { \ 179 struct mfi_qstat *qs; \ 180 \ 181 qs = &(sc)->mfi_qstat[qname]; \ 182 qs->q_length++; \ 183 if (qs->q_length > qs->q_max) \ 184 qs->q_max = qs->q_length; \ 185 } while (0) 186 187 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 188 189 #define MFIQ_INIT(sc, qname) \ 190 do { \ 191 sc->mfi_qstat[qname].q_length = 0; \ 192 sc->mfi_qstat[qname].q_max = 0; \ 193 } while (0) 194 195 #define MFIQ_COMMAND_QUEUE(name, index) \ 196 static __inline void \ 197 mfi_initq_ ## name (struct mfi_softc *sc) \ 198 { \ 199 TAILQ_INIT(&sc->mfi_ ## name); \ 200 MFIQ_INIT(sc, index); \ 201 } \ 202 static __inline void \ 203 mfi_enqueue_ ## name (struct mfi_command *cm) \ 204 { \ 205 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 206 printf("command %p is on another queue, " \ 207 "flags = %#x\n", cm, cm->cm_flags); \ 208 panic("command is on another queue"); \ 209 } \ 210 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 211 cm->cm_flags |= MFI_ON_ ## index; \ 212 MFIQ_ADD(cm->cm_sc, index); \ 213 } \ 214 static __inline void \ 215 mfi_requeue_ ## name (struct mfi_command *cm) \ 216 { \ 217 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 218 printf("command %p is on another queue, " \ 219 "flags = %#x\n", cm, cm->cm_flags); \ 220 panic("command is on another queue"); \ 221 } \ 222 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 223 cm->cm_flags |= MFI_ON_ ## index; \ 224 MFIQ_ADD(cm->cm_sc, index); \ 225 } \ 226 static __inline struct mfi_command * \ 227 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 228 { \ 229 struct mfi_command *cm; \ 230 \ 231 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 232 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 233 printf("command %p not in queue, " \ 234 "flags = %#x, bit = %#x\n", cm, \ 235 cm->cm_flags, MFI_ON_ ## index); \ 236 panic("command not in queue"); \ 237 } \ 238 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 239 cm->cm_flags &= ~MFI_ON_ ## index; \ 240 MFIQ_REMOVE(sc, index); \ 241 } \ 242 return (cm); \ 243 } \ 244 static __inline void \ 245 mfi_remove_ ## name (struct mfi_command *cm) \ 246 { \ 247 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 248 printf("command %p not in queue, flags = %#x, " \ 249 "bit = %#x\n", cm, cm->cm_flags, \ 250 MFI_ON_ ## index); \ 251 panic("command not in queue"); \ 252 } \ 253 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 254 cm->cm_flags &= ~MFI_ON_ ## index; \ 255 MFIQ_REMOVE(cm->cm_sc, index); \ 256 } \ 257 struct hack 258 259 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 260 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 261 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 262 263 static __inline void 264 mfi_initq_bio(struct mfi_softc *sc) 265 { 266 bioq_init(&sc->mfi_bioq); 267 MFIQ_INIT(sc, MFIQ_BIO); 268 } 269 270 static __inline void 271 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 272 { 273 bioq_insert_tail(&sc->mfi_bioq, bp); 274 MFIQ_ADD(sc, MFIQ_BIO); 275 } 276 277 static __inline struct bio * 278 mfi_dequeue_bio(struct mfi_softc *sc) 279 { 280 struct bio *bp; 281 282 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 283 bioq_remove(&sc->mfi_bioq, bp); 284 MFIQ_REMOVE(sc, MFIQ_BIO); 285 } 286 return (bp); 287 } 288 289 static __inline void 290 mfi_print_sense(struct mfi_softc *sc, void *sense) 291 { 292 int error, key, asc, ascq; 293 294 scsi_extract_sense((struct scsi_sense_data *)sense, 295 &error, &key, &asc, &ascq); 296 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 297 "asc %d, ascq %d\n", error, key, asc, ascq); 298 } 299 300 301 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 302 sc->mfi_bhandle, (reg), (val)) 303 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 304 (sc)->mfi_bhandle, (reg)) 305 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 306 sc->mfi_bhandle, (reg), (val)) 307 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 308 (sc)->mfi_bhandle, (reg)) 309 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 310 sc->mfi_bhandle, (reg), (val)) 311 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 312 (sc)->mfi_bhandle, (reg)) 313 314 MALLOC_DECLARE(M_MFIBUF); 315 316 #endif /* _MFIVAR_H */ 317