1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53 #ifndef _MFIVAR_H 54 #define _MFIVAR_H 55 56 #include <sys/cdefs.h> 57 __FBSDID("$FreeBSD$"); 58 59 #include <sys/lock.h> 60 #include <sys/sx.h> 61 62 /* 63 * SCSI structures and definitions are used from here, but no linking 64 * requirements are made to CAM. 65 */ 66 #include <cam/scsi/scsi_all.h> 67 68 struct mfi_hwcomms { 69 uint32_t hw_pi; 70 uint32_t hw_ci; 71 uint32_t hw_reply_q[1]; 72 }; 73 74 struct mfi_softc; 75 struct disk; 76 struct ccb_hdr; 77 78 struct mfi_command { 79 TAILQ_ENTRY(mfi_command) cm_link; 80 time_t cm_timestamp; 81 struct mfi_softc *cm_sc; 82 union mfi_frame *cm_frame; 83 uint32_t cm_frame_busaddr; 84 struct mfi_sense *cm_sense; 85 uint32_t cm_sense_busaddr; 86 bus_dmamap_t cm_dmamap; 87 union mfi_sgl *cm_sg; 88 void *cm_data; 89 int cm_len; 90 int cm_total_frame_size; 91 int cm_extra_frames; 92 int cm_flags; 93 #define MFI_CMD_MAPPED (1<<0) 94 #define MFI_CMD_DATAIN (1<<1) 95 #define MFI_CMD_DATAOUT (1<<2) 96 #define MFI_CMD_COMPLETED (1<<3) 97 #define MFI_CMD_POLLED (1<<4) 98 #define MFI_ON_MFIQ_FREE (1<<5) 99 #define MFI_ON_MFIQ_READY (1<<6) 100 #define MFI_ON_MFIQ_BUSY (1<<7) 101 #define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7)) 102 int cm_aen_abort; 103 void (* cm_complete)(struct mfi_command *cm); 104 void *cm_private; 105 int cm_index; 106 int cm_error; 107 }; 108 109 struct mfi_disk { 110 TAILQ_ENTRY(mfi_disk) ld_link; 111 device_t ld_dev; 112 int ld_id; 113 int ld_unit; 114 struct mfi_softc *ld_controller; 115 struct mfi_ld_info *ld_info; 116 struct disk *ld_disk; 117 int ld_flags; 118 #define MFI_DISK_FLAGS_OPEN 0x01 119 #define MFI_DISK_FLAGS_DISABLED 0x02 120 }; 121 122 struct mfi_aen { 123 TAILQ_ENTRY(mfi_aen) aen_link; 124 struct proc *p; 125 }; 126 127 struct mfi_softc { 128 device_t mfi_dev; 129 int mfi_flags; 130 #define MFI_FLAGS_SG64 (1<<0) 131 #define MFI_FLAGS_QFRZN (1<<1) 132 #define MFI_FLAGS_OPEN (1<<2) 133 #define MFI_FLAGS_STOP (1<<3) 134 #define MFI_FLAGS_1064R (1<<4) 135 #define MFI_FLAGS_1078 (1<<5) 136 137 struct mfi_hwcomms *mfi_comms; 138 TAILQ_HEAD(,mfi_command) mfi_free; 139 TAILQ_HEAD(,mfi_command) mfi_ready; 140 TAILQ_HEAD(,mfi_command) mfi_busy; 141 struct bio_queue_head mfi_bioq; 142 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 143 144 struct resource *mfi_regs_resource; 145 bus_space_handle_t mfi_bhandle; 146 bus_space_tag_t mfi_btag; 147 int mfi_regs_rid; 148 149 bus_dma_tag_t mfi_parent_dmat; 150 bus_dma_tag_t mfi_buffer_dmat; 151 152 bus_dma_tag_t mfi_comms_dmat; 153 bus_dmamap_t mfi_comms_dmamap; 154 uint32_t mfi_comms_busaddr; 155 156 bus_dma_tag_t mfi_frames_dmat; 157 bus_dmamap_t mfi_frames_dmamap; 158 uint32_t mfi_frames_busaddr; 159 union mfi_frame *mfi_frames; 160 161 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 162 struct mfi_command *mfi_aen_cm; 163 uint32_t mfi_aen_triggered; 164 uint32_t mfi_poll_waiting; 165 struct selinfo mfi_select; 166 int mfi_delete_busy_volumes; 167 int mfi_keep_deleted_volumes; 168 int mfi_detaching; 169 170 bus_dma_tag_t mfi_sense_dmat; 171 bus_dmamap_t mfi_sense_dmamap; 172 uint32_t mfi_sense_busaddr; 173 struct mfi_sense *mfi_sense; 174 175 struct resource *mfi_irq; 176 void *mfi_intr; 177 int mfi_irq_rid; 178 179 struct intr_config_hook mfi_ich; 180 eventhandler_tag eh; 181 182 /* 183 * Allocation for the command array. Used as an indexable array to 184 * recover completed commands. 185 */ 186 struct mfi_command *mfi_commands; 187 /* 188 * How many commands were actually allocated 189 */ 190 int mfi_total_cmds; 191 /* 192 * How many commands the firmware can handle. Also how big the reply 193 * queue is, minus 1. 194 */ 195 int mfi_max_fw_cmds; 196 /* 197 * How many S/G elements we'll ever actually use 198 */ 199 int mfi_max_sge; 200 /* 201 * How many bytes a compound frame is, including all of the extra frames 202 * that are used for S/G elements. 203 */ 204 int mfi_cmd_size; 205 /* 206 * How large an S/G element is. Used to calculate the number of single 207 * frames in a command. 208 */ 209 int mfi_sge_size; 210 /* 211 * Max number of sectors that the firmware allows 212 */ 213 uint32_t mfi_max_io; 214 215 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh; 216 eventhandler_tag mfi_eh; 217 struct cdev *mfi_cdev; 218 219 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq; 220 struct mfi_command * (* mfi_cam_start)(void *); 221 struct callout mfi_watchdog_callout; 222 struct mtx mfi_io_lock; 223 struct sx mfi_config_lock; 224 225 /* Controller type specific interfaces */ 226 void (*mfi_enable_intr)(struct mfi_softc *sc); 227 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc); 228 int (*mfi_check_clear_intr)(struct mfi_softc *sc); 229 void (*mfi_issue_cmd)(struct mfi_softc *sc,uint32_t bus_add,uint32_t frame_cnt); 230 }; 231 232 extern int mfi_attach(struct mfi_softc *); 233 extern void mfi_free(struct mfi_softc *); 234 extern int mfi_shutdown(struct mfi_softc *); 235 extern void mfi_startio(struct mfi_softc *); 236 extern void mfi_disk_complete(struct bio *); 237 extern int mfi_disk_disable(struct mfi_disk *); 238 extern void mfi_disk_enable(struct mfi_disk *); 239 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 240 241 #define MFIQ_ADD(sc, qname) \ 242 do { \ 243 struct mfi_qstat *qs; \ 244 \ 245 qs = &(sc)->mfi_qstat[qname]; \ 246 qs->q_length++; \ 247 if (qs->q_length > qs->q_max) \ 248 qs->q_max = qs->q_length; \ 249 } while (0) 250 251 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 252 253 #define MFIQ_INIT(sc, qname) \ 254 do { \ 255 sc->mfi_qstat[qname].q_length = 0; \ 256 sc->mfi_qstat[qname].q_max = 0; \ 257 } while (0) 258 259 #define MFIQ_COMMAND_QUEUE(name, index) \ 260 static __inline void \ 261 mfi_initq_ ## name (struct mfi_softc *sc) \ 262 { \ 263 TAILQ_INIT(&sc->mfi_ ## name); \ 264 MFIQ_INIT(sc, index); \ 265 } \ 266 static __inline void \ 267 mfi_enqueue_ ## name (struct mfi_command *cm) \ 268 { \ 269 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 270 printf("command %p is on another queue, " \ 271 "flags = %#x\n", cm, cm->cm_flags); \ 272 panic("command is on another queue"); \ 273 } \ 274 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 275 cm->cm_flags |= MFI_ON_ ## index; \ 276 MFIQ_ADD(cm->cm_sc, index); \ 277 } \ 278 static __inline void \ 279 mfi_requeue_ ## name (struct mfi_command *cm) \ 280 { \ 281 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 282 printf("command %p is on another queue, " \ 283 "flags = %#x\n", cm, cm->cm_flags); \ 284 panic("command is on another queue"); \ 285 } \ 286 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 287 cm->cm_flags |= MFI_ON_ ## index; \ 288 MFIQ_ADD(cm->cm_sc, index); \ 289 } \ 290 static __inline struct mfi_command * \ 291 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 292 { \ 293 struct mfi_command *cm; \ 294 \ 295 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 296 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 297 printf("command %p not in queue, " \ 298 "flags = %#x, bit = %#x\n", cm, \ 299 cm->cm_flags, MFI_ON_ ## index); \ 300 panic("command not in queue"); \ 301 } \ 302 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 303 cm->cm_flags &= ~MFI_ON_ ## index; \ 304 MFIQ_REMOVE(sc, index); \ 305 } \ 306 return (cm); \ 307 } \ 308 static __inline void \ 309 mfi_remove_ ## name (struct mfi_command *cm) \ 310 { \ 311 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 312 printf("command %p not in queue, flags = %#x, " \ 313 "bit = %#x\n", cm, cm->cm_flags, \ 314 MFI_ON_ ## index); \ 315 panic("command not in queue"); \ 316 } \ 317 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 318 cm->cm_flags &= ~MFI_ON_ ## index; \ 319 MFIQ_REMOVE(cm->cm_sc, index); \ 320 } \ 321 struct hack 322 323 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 324 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 325 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 326 327 static __inline void 328 mfi_initq_bio(struct mfi_softc *sc) 329 { 330 bioq_init(&sc->mfi_bioq); 331 MFIQ_INIT(sc, MFIQ_BIO); 332 } 333 334 static __inline void 335 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 336 { 337 bioq_insert_tail(&sc->mfi_bioq, bp); 338 MFIQ_ADD(sc, MFIQ_BIO); 339 } 340 341 static __inline struct bio * 342 mfi_dequeue_bio(struct mfi_softc *sc) 343 { 344 struct bio *bp; 345 346 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 347 bioq_remove(&sc->mfi_bioq, bp); 348 MFIQ_REMOVE(sc, MFIQ_BIO); 349 } 350 return (bp); 351 } 352 353 static __inline void 354 mfi_print_sense(struct mfi_softc *sc, void *sense) 355 { 356 int error, key, asc, ascq; 357 358 scsi_extract_sense((struct scsi_sense_data *)sense, 359 &error, &key, &asc, &ascq); 360 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 361 "asc %d, ascq %d\n", error, key, asc, ascq); 362 } 363 364 365 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 366 sc->mfi_bhandle, (reg), (val)) 367 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 368 (sc)->mfi_bhandle, (reg)) 369 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 370 sc->mfi_bhandle, (reg), (val)) 371 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 372 (sc)->mfi_bhandle, (reg)) 373 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 374 sc->mfi_bhandle, (reg), (val)) 375 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 376 (sc)->mfi_bhandle, (reg)) 377 378 MALLOC_DECLARE(M_MFIBUF); 379 380 #define MFI_CMD_TIMEOUT 30 381 382 #ifdef MFI_DEBUG 383 extern void mfi_print_cmd(struct mfi_command *cm); 384 extern void mfi_dump_cmds(struct mfi_softc *sc); 385 extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, const char *, int ); 386 #define MFI_PRINT_CMD(cm) mfi_print_cmd(cm) 387 #define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc) 388 #define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__) 389 #else 390 #define MFI_PRINT_CMD(cm) 391 #define MFI_DUMP_CMDS(sc) 392 #define MFI_VALIDATE_CMD(sc, cm) 393 #endif 394 395 extern void mfi_release_command(struct mfi_command *cm); 396 397 #endif /* _MFIVAR_H */ 398