1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */ 57 58 #include "opt_mfi.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/selinfo.h> 64 #include <sys/module.h> 65 #include <sys/bus.h> 66 #include <sys/conf.h> 67 #include <sys/bio.h> 68 #include <sys/malloc.h> 69 #include <sys/sysctl.h> 70 #include <sys/uio.h> 71 72 #include <machine/bus.h> 73 #include <machine/resource.h> 74 #include <sys/rman.h> 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 79 #include <dev/mfi/mfireg.h> 80 #include <dev/mfi/mfi_ioctl.h> 81 #include <dev/mfi/mfivar.h> 82 83 static int mfi_pci_probe(device_t); 84 static int mfi_pci_attach(device_t); 85 static int mfi_pci_detach(device_t); 86 static int mfi_pci_suspend(device_t); 87 static int mfi_pci_resume(device_t); 88 static void mfi_pci_free(struct mfi_softc *); 89 90 static device_method_t mfi_methods[] = { 91 DEVMETHOD(device_probe, mfi_pci_probe), 92 DEVMETHOD(device_attach, mfi_pci_attach), 93 DEVMETHOD(device_detach, mfi_pci_detach), 94 DEVMETHOD(device_suspend, mfi_pci_suspend), 95 DEVMETHOD(device_resume, mfi_pci_resume), 96 97 DEVMETHOD_END 98 }; 99 100 static driver_t mfi_pci_driver = { 101 "mfi", 102 mfi_methods, 103 sizeof(struct mfi_softc) 104 }; 105 106 static devclass_t mfi_devclass; 107 DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, 0, 0); 108 MODULE_VERSION(mfi, 1); 109 110 static int mfi_msi = 1; 111 TUNABLE_INT("hw.mfi.msi", &mfi_msi); 112 SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0, 113 "Enable use of MSI interrupts"); 114 115 static int mfi_mrsas_enable = 0; 116 TUNABLE_INT("hw.mfi.mrsas_enable", &mfi_msi); 117 SYSCTL_INT(_hw_mfi, OID_AUTO, mrsas_enable, CTLFLAG_RDTUN, &mfi_mrsas_enable, 118 0, "Allow mrasas to take newer cards"); 119 120 struct mfi_ident { 121 uint16_t vendor; 122 uint16_t device; 123 uint16_t subvendor; 124 uint16_t subdevice; 125 int flags; 126 const char *desc; 127 } mfi_identifiers[] = { 128 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H810 Adapter"}, 129 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Embedded"}, 130 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Adapter"}, 131 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (blades)"}, 132 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (monolithics)"}, 133 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"}, 134 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"}, 135 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"}, 136 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"}, 137 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"}, 138 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"}, 139 {0x1000, 0x005d, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_INVADER, "Invader"}, 140 {0x1000, 0x005f, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_FURY, "Fury"}, 141 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"}, 142 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 143 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"}, 144 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"}, 145 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 146 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"}, 147 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"}, 148 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"}, 149 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"}, 150 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"}, 151 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"}, 152 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"}, 153 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"}, 154 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 155 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 156 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */ 157 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */ 158 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"}, 159 {0, 0, 0, 0, 0, NULL} 160 }; 161 162 static struct mfi_ident * 163 mfi_find_ident(device_t dev) 164 { 165 struct mfi_ident *m; 166 167 for (m = mfi_identifiers; m->vendor != 0; m++) { 168 if ((m->vendor == pci_get_vendor(dev)) && 169 (m->device == pci_get_device(dev)) && 170 ((m->subvendor == pci_get_subvendor(dev)) || 171 (m->subvendor == 0xffff)) && 172 ((m->subdevice == pci_get_subdevice(dev)) || 173 (m->subdevice == 0xffff))) 174 return (m); 175 } 176 177 return (NULL); 178 } 179 180 static int 181 mfi_pci_probe(device_t dev) 182 { 183 struct mfi_ident *id; 184 185 if ((id = mfi_find_ident(dev)) != NULL) { 186 device_set_desc(dev, id->desc); 187 188 /* give priority to mrsas if tunable set */ 189 TUNABLE_INT_FETCH("hw.mfi.mrsas_enable", &mfi_mrsas_enable); 190 if ((id->flags & MFI_FLAGS_MRSAS) && mfi_mrsas_enable) 191 return (BUS_PROBE_LOW_PRIORITY); 192 else 193 return (BUS_PROBE_DEFAULT); 194 } 195 return (ENXIO); 196 } 197 198 static int 199 mfi_pci_attach(device_t dev) 200 { 201 struct mfi_softc *sc; 202 struct mfi_ident *m; 203 int count, error; 204 205 sc = device_get_softc(dev); 206 bzero(sc, sizeof(*sc)); 207 sc->mfi_dev = dev; 208 m = mfi_find_ident(dev); 209 sc->mfi_flags = m->flags; 210 211 /* Ensure busmastering is enabled */ 212 pci_enable_busmaster(dev); 213 214 /* Allocate PCI registers */ 215 if ((sc->mfi_flags & MFI_FLAGS_1064R) || 216 (sc->mfi_flags & MFI_FLAGS_1078)) { 217 /* 1068/1078: Memory mapped BAR is at offset 0x10 */ 218 sc->mfi_regs_rid = PCIR_BAR(0); 219 } 220 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) || 221 (sc->mfi_flags & MFI_FLAGS_SKINNY) || 222 (sc->mfi_flags & MFI_FLAGS_TBOLT)) { 223 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */ 224 sc->mfi_regs_rid = PCIR_BAR(1); 225 } 226 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev, 227 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) { 228 device_printf(dev, "Cannot allocate PCI registers\n"); 229 return (ENXIO); 230 } 231 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource); 232 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource); 233 234 error = ENOMEM; 235 236 /* Allocate parent DMA tag */ 237 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */ 238 1, 0, /* algnmnt, boundary */ 239 BUS_SPACE_MAXADDR, /* lowaddr */ 240 BUS_SPACE_MAXADDR, /* highaddr */ 241 NULL, NULL, /* filter, filterarg */ 242 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 243 BUS_SPACE_UNRESTRICTED, /* nsegments */ 244 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 245 0, /* flags */ 246 NULL, NULL, /* lockfunc, lockarg */ 247 &sc->mfi_parent_dmat)) { 248 device_printf(dev, "Cannot allocate parent DMA tag\n"); 249 goto out; 250 } 251 252 /* Allocate IRQ resource. */ 253 sc->mfi_irq_rid = 0; 254 count = 1; 255 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) { 256 device_printf(sc->mfi_dev, "Using MSI\n"); 257 sc->mfi_irq_rid = 1; 258 } 259 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ, 260 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 261 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n"); 262 error = EINVAL; 263 goto out; 264 } 265 266 error = mfi_attach(sc); 267 out: 268 if (error) { 269 mfi_free(sc); 270 mfi_pci_free(sc); 271 } 272 273 return (error); 274 } 275 276 static int 277 mfi_pci_detach(device_t dev) 278 { 279 struct mfi_softc *sc; 280 int error, devcount, i; 281 device_t *devlist; 282 283 sc = device_get_softc(dev); 284 285 sx_xlock(&sc->mfi_config_lock); 286 mtx_lock(&sc->mfi_io_lock); 287 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) { 288 mtx_unlock(&sc->mfi_io_lock); 289 sx_xunlock(&sc->mfi_config_lock); 290 return (EBUSY); 291 } 292 sc->mfi_detaching = 1; 293 mtx_unlock(&sc->mfi_io_lock); 294 295 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) { 296 sx_xunlock(&sc->mfi_config_lock); 297 return error; 298 } 299 for (i = 0; i < devcount; i++) 300 device_delete_child(sc->mfi_dev, devlist[i]); 301 free(devlist, M_TEMP); 302 sx_xunlock(&sc->mfi_config_lock); 303 304 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh); 305 306 mfi_shutdown(sc); 307 mfi_free(sc); 308 mfi_pci_free(sc); 309 return (0); 310 } 311 312 static void 313 mfi_pci_free(struct mfi_softc *sc) 314 { 315 316 if (sc->mfi_regs_resource != NULL) { 317 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY, 318 sc->mfi_regs_rid, sc->mfi_regs_resource); 319 } 320 if (sc->mfi_irq_rid != 0) 321 pci_release_msi(sc->mfi_dev); 322 323 return; 324 } 325 326 static int 327 mfi_pci_suspend(device_t dev) 328 { 329 330 return (EINVAL); 331 } 332 333 static int 334 mfi_pci_resume(device_t dev) 335 { 336 337 return (EINVAL); 338 } 339