1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */ 57 58 #include "opt_mfi.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/selinfo.h> 64 #include <sys/module.h> 65 #include <sys/bus.h> 66 #include <sys/conf.h> 67 #include <sys/bio.h> 68 #include <sys/malloc.h> 69 #include <sys/sysctl.h> 70 #include <sys/uio.h> 71 72 #include <machine/bus.h> 73 #include <machine/resource.h> 74 #include <sys/rman.h> 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 79 #include <dev/mfi/mfireg.h> 80 #include <dev/mfi/mfi_ioctl.h> 81 #include <dev/mfi/mfivar.h> 82 83 static int mfi_pci_probe(device_t); 84 static int mfi_pci_attach(device_t); 85 static int mfi_pci_detach(device_t); 86 static int mfi_pci_suspend(device_t); 87 static int mfi_pci_resume(device_t); 88 static void mfi_pci_free(struct mfi_softc *); 89 90 static device_method_t mfi_methods[] = { 91 DEVMETHOD(device_probe, mfi_pci_probe), 92 DEVMETHOD(device_attach, mfi_pci_attach), 93 DEVMETHOD(device_detach, mfi_pci_detach), 94 DEVMETHOD(device_suspend, mfi_pci_suspend), 95 DEVMETHOD(device_resume, mfi_pci_resume), 96 DEVMETHOD(bus_print_child, bus_generic_print_child), 97 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 98 { 0, 0 } 99 }; 100 101 static driver_t mfi_pci_driver = { 102 "mfi", 103 mfi_methods, 104 sizeof(struct mfi_softc) 105 }; 106 107 static devclass_t mfi_devclass; 108 DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, 0, 0); 109 MODULE_VERSION(mfi, 1); 110 111 static int mfi_msi = 0; 112 TUNABLE_INT("hw.mfi.msi", &mfi_msi); 113 SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0, 114 "Enable use of MSI interrupts"); 115 116 struct mfi_ident { 117 uint16_t vendor; 118 uint16_t device; 119 uint16_t subvendor; 120 uint16_t subdevice; 121 int flags; 122 const char *desc; 123 } mfi_identifiers[] = { 124 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"}, 125 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 126 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 127 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"}, 128 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"}, 129 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"}, 130 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"}, 131 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"}, 132 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"}, 133 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"}, 134 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 135 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 136 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */ 137 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */ 138 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"}, 139 {0, 0, 0, 0, 0, NULL} 140 }; 141 142 static struct mfi_ident * 143 mfi_find_ident(device_t dev) 144 { 145 struct mfi_ident *m; 146 147 for (m = mfi_identifiers; m->vendor != 0; m++) { 148 if ((m->vendor == pci_get_vendor(dev)) && 149 (m->device == pci_get_device(dev)) && 150 ((m->subvendor == pci_get_subvendor(dev)) || 151 (m->subvendor == 0xffff)) && 152 ((m->subdevice == pci_get_subdevice(dev)) || 153 (m->subdevice == 0xffff))) 154 return (m); 155 } 156 157 return (NULL); 158 } 159 160 static int 161 mfi_pci_probe(device_t dev) 162 { 163 struct mfi_ident *id; 164 165 if ((id = mfi_find_ident(dev)) != NULL) { 166 device_set_desc(dev, id->desc); 167 return (BUS_PROBE_DEFAULT); 168 } 169 return (ENXIO); 170 } 171 172 static int 173 mfi_pci_attach(device_t dev) 174 { 175 struct mfi_softc *sc; 176 struct mfi_ident *m; 177 uint32_t command; 178 int count, error; 179 180 sc = device_get_softc(dev); 181 bzero(sc, sizeof(*sc)); 182 sc->mfi_dev = dev; 183 m = mfi_find_ident(dev); 184 sc->mfi_flags = m->flags; 185 186 /* Verify that the adapter can be set up in PCI space */ 187 command = pci_read_config(dev, PCIR_COMMAND, 2); 188 command |= PCIM_CMD_BUSMASTEREN; 189 pci_write_config(dev, PCIR_COMMAND, command, 2); 190 command = pci_read_config(dev, PCIR_COMMAND, 2); 191 if ((command & PCIM_CMD_BUSMASTEREN) == 0) { 192 device_printf(dev, "Can't enable PCI busmaster\n"); 193 return (ENXIO); 194 } 195 if ((command & PCIM_CMD_MEMEN) == 0) { 196 device_printf(dev, "PCI memory window not available\n"); 197 return (ENXIO); 198 } 199 200 /* Allocate PCI registers */ 201 if ((sc->mfi_flags & MFI_FLAGS_1064R) || 202 (sc->mfi_flags & MFI_FLAGS_1078)) { 203 /* 1068/1078: Memory mapped BAR is at offset 0x10 */ 204 sc->mfi_regs_rid = PCIR_BAR(0); 205 } else if (sc->mfi_flags & MFI_FLAGS_GEN2) { 206 /* GEN2: Memory mapped BAR is at offset 0x14 */ 207 sc->mfi_regs_rid = PCIR_BAR(1); 208 } 209 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev, 210 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) { 211 device_printf(dev, "Cannot allocate PCI registers\n"); 212 return (ENXIO); 213 } 214 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource); 215 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource); 216 217 error = ENOMEM; 218 219 /* Allocate parent DMA tag */ 220 if (bus_dma_tag_create( NULL, /* parent */ 221 1, 0, /* algnmnt, boundary */ 222 BUS_SPACE_MAXADDR, /* lowaddr */ 223 BUS_SPACE_MAXADDR, /* highaddr */ 224 NULL, NULL, /* filter, filterarg */ 225 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 226 BUS_SPACE_UNRESTRICTED, /* nsegments */ 227 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 228 0, /* flags */ 229 NULL, NULL, /* lockfunc, lockarg */ 230 &sc->mfi_parent_dmat)) { 231 device_printf(dev, "Cannot allocate parent DMA tag\n"); 232 goto out; 233 } 234 235 /* Allocate IRQ resource. */ 236 sc->mfi_irq_rid = 0; 237 count = 1; 238 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) { 239 device_printf(sc->mfi_dev, "Using MSI\n"); 240 sc->mfi_irq_rid = 1; 241 } 242 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ, 243 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 244 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n"); 245 error = EINVAL; 246 goto out; 247 } 248 249 error = mfi_attach(sc); 250 out: 251 if (error) { 252 mfi_free(sc); 253 mfi_pci_free(sc); 254 } 255 256 return (error); 257 } 258 259 static int 260 mfi_pci_detach(device_t dev) 261 { 262 struct mfi_softc *sc; 263 struct mfi_disk *ld; 264 int error; 265 266 sc = device_get_softc(dev); 267 268 sx_xlock(&sc->mfi_config_lock); 269 mtx_lock(&sc->mfi_io_lock); 270 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) { 271 mtx_unlock(&sc->mfi_io_lock); 272 sx_xunlock(&sc->mfi_config_lock); 273 return (EBUSY); 274 } 275 sc->mfi_detaching = 1; 276 mtx_unlock(&sc->mfi_io_lock); 277 278 while ((ld = TAILQ_FIRST(&sc->mfi_ld_tqh)) != NULL) { 279 if ((error = device_delete_child(dev, ld->ld_dev)) != 0) { 280 sc->mfi_detaching = 0; 281 sx_xunlock(&sc->mfi_config_lock); 282 return (error); 283 } 284 } 285 sx_xunlock(&sc->mfi_config_lock); 286 287 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh); 288 289 mfi_shutdown(sc); 290 mfi_free(sc); 291 mfi_pci_free(sc); 292 return (0); 293 } 294 295 static void 296 mfi_pci_free(struct mfi_softc *sc) 297 { 298 299 if (sc->mfi_regs_resource != NULL) { 300 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY, 301 sc->mfi_regs_rid, sc->mfi_regs_resource); 302 } 303 if (sc->mfi_irq_rid != 0) 304 pci_release_msi(sc->mfi_dev); 305 306 return; 307 } 308 309 static int 310 mfi_pci_suspend(device_t dev) 311 { 312 313 return (EINVAL); 314 } 315 316 static int 317 mfi_pci_resume(device_t dev) 318 { 319 320 return (EINVAL); 321 } 322