1 /*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3 * Copyright (c) 2007 Marvell Semiconductor, Inc. 4 * Copyright (c) 2007 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32 #include <sys/cdefs.h> 33 #ifdef __FreeBSD__ 34 __FBSDID("$FreeBSD$"); 35 #endif 36 37 #include "opt_malo.h" 38 39 #include <sys/param.h> 40 #include <sys/endian.h> 41 #include <sys/kernel.h> 42 #include <sys/socket.h> 43 #include <sys/sockio.h> 44 #include <sys/sysctl.h> 45 #include <sys/taskqueue.h> 46 47 #include <machine/bus.h> 48 #include <sys/bus.h> 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/ethernet.h> 55 56 #include <net80211/ieee80211_var.h> 57 #include <net80211/ieee80211_regdomain.h> 58 59 #include <net/bpf.h> 60 61 #include <dev/malo/if_malo.h> 62 63 SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64 "Marvell 88w8335 driver parameters"); 65 66 static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67 SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68 0, "tx buffers to send at once"); 69 TUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70 static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71 SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72 0, "rx buffers allocated"); 73 TUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74 static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75 SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76 0, "max rx buffers to process per interrupt"); 77 TUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78 static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79 SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80 0, "tx buffers allocated"); 81 TUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82 83 #ifdef MALO_DEBUG 84 static int malo_debug = 0; 85 SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86 0, "control debugging printfs"); 87 TUNABLE_INT("hw.malo.debug", &malo_debug); 88 enum { 89 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93 MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94 MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98 MALO_DEBUG_NODE = 0x00000800, /* node management */ 99 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100 MALO_DEBUG_FW = 0x00008000, /* firmware */ 101 MALO_DEBUG_ANY = 0xffffffff 102 }; 103 #define IS_BEACON(wh) \ 104 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105 IEEE80211_FC0_SUBTYPE_MASK)) == \ 106 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107 #define IFF_DUMPPKTS_RECV(sc, wh) \ 108 (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110 (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111 (IFF_DEBUG|IFF_LINK2)) 112 #define IFF_DUMPPKTS_XMIT(sc) \ 113 ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114 (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115 (IFF_DEBUG | IFF_LINK2)) 116 #define DPRINTF(sc, m, fmt, ...) do { \ 117 if (sc->malo_debug & (m)) \ 118 printf(fmt, __VA_ARGS__); \ 119 } while (0) 120 #else 121 #define DPRINTF(sc, m, fmt, ...) do { \ 122 (void) sc; \ 123 } while (0) 124 #endif 125 126 MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127 128 static struct ieee80211vap *malo_vap_create(struct ieee80211com *ic, 129 const char name[IFNAMSIZ], int unit, int opmode, int flags, 130 const uint8_t bssid[IEEE80211_ADDR_LEN], 131 const uint8_t mac[IEEE80211_ADDR_LEN]); 132 static void malo_vap_delete(struct ieee80211vap *); 133 static int malo_dma_setup(struct malo_softc *); 134 static int malo_setup_hwdma(struct malo_softc *); 135 static void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136 static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137 static void malo_start(struct ifnet *); 138 static void malo_watchdog(struct ifnet *); 139 static int malo_ioctl(struct ifnet *, u_long, caddr_t); 140 static void malo_updateslot(struct ifnet *); 141 static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142 static void malo_scan_start(struct ieee80211com *); 143 static void malo_scan_end(struct ieee80211com *); 144 static void malo_set_channel(struct ieee80211com *); 145 static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146 const struct ieee80211_bpf_params *); 147 static void malo_bpfattach(struct malo_softc *); 148 static void malo_sysctlattach(struct malo_softc *); 149 static void malo_announce(struct malo_softc *); 150 static void malo_dma_cleanup(struct malo_softc *); 151 static void malo_stop_locked(struct ifnet *, int); 152 static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 153 static int malo_mode_init(struct malo_softc *); 154 static void malo_tx_proc(void *, int); 155 static void malo_rx_proc(void *, int); 156 static void malo_init(void *); 157 158 /* 159 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 160 * operations are done in the "hal" except getting H/W MAC address at 161 * malo_attach and there should be no reference to them here. 162 */ 163 static uint32_t 164 malo_bar0_read4(struct malo_softc *sc, bus_size_t off) 165 { 166 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 167 } 168 169 static void 170 malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 171 { 172 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%zx val 0x%x\n", 173 __func__, off, val); 174 175 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 176 } 177 178 int 179 malo_attach(uint16_t devid, struct malo_softc *sc) 180 { 181 int error; 182 struct ieee80211com *ic; 183 struct ifnet *ifp; 184 struct malo_hal *mh; 185 uint8_t bands; 186 187 ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 188 if (ifp == NULL) { 189 device_printf(sc->malo_dev, "can not if_alloc()\n"); 190 return ENOSPC; 191 } 192 ic = ifp->if_l2com; 193 194 MALO_LOCK_INIT(sc); 195 196 /* set these up early for if_printf use */ 197 if_initname(ifp, device_get_name(sc->malo_dev), 198 device_get_unit(sc->malo_dev)); 199 200 mh = malo_hal_attach(sc->malo_dev, devid, 201 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 202 if (mh == NULL) { 203 if_printf(ifp, "unable to attach HAL\n"); 204 error = EIO; 205 goto bad; 206 } 207 sc->malo_mh = mh; 208 209 /* 210 * Load firmware so we can get setup. We arbitrarily pick station 211 * firmware; we'll re-load firmware as needed so setting up 212 * the wrong mode isn't a big deal. 213 */ 214 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 215 if (error != 0) { 216 if_printf(ifp, "unable to setup firmware\n"); 217 goto bad1; 218 } 219 /* XXX gethwspecs() extracts correct informations? not maybe! */ 220 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 221 if (error != 0) { 222 if_printf(ifp, "unable to fetch h/w specs\n"); 223 goto bad1; 224 } 225 226 DPRINTF(sc, MALO_DEBUG_FW, 227 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 228 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 229 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 230 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 231 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 232 sc->malo_hwspecs.hwversion, 233 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 234 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 235 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 236 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 237 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 238 sc->malo_hwspecs.ul_fw_awakecookie, 239 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 240 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 241 242 /* NB: firmware looks that it does not export regdomain info API. */ 243 bands = 0; 244 setbit(&bands, IEEE80211_MODE_11B); 245 setbit(&bands, IEEE80211_MODE_11G); 246 ieee80211_init_channels(ic, NULL, &bands); 247 248 sc->malo_txantenna = 0x2; /* h/w default */ 249 sc->malo_rxantenna = 0xffff; /* h/w default */ 250 251 /* 252 * Allocate tx + rx descriptors and populate the lists. 253 * We immediately push the information to the firmware 254 * as otherwise it gets upset. 255 */ 256 error = malo_dma_setup(sc); 257 if (error != 0) { 258 if_printf(ifp, "failed to setup descriptors: %d\n", error); 259 goto bad1; 260 } 261 error = malo_setup_hwdma(sc); /* push to firmware */ 262 if (error != 0) /* NB: malo_setupdma prints msg */ 263 goto bad2; 264 265 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 266 taskqueue_thread_enqueue, &sc->malo_tq); 267 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 268 "%s taskq", ifp->if_xname); 269 270 TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 271 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 272 273 ifp->if_softc = sc; 274 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 275 ifp->if_start = malo_start; 276 ifp->if_watchdog = malo_watchdog; 277 ifp->if_ioctl = malo_ioctl; 278 ifp->if_init = malo_init; 279 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 280 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 281 IFQ_SET_READY(&ifp->if_snd); 282 283 ic->ic_ifp = ifp; 284 /* XXX not right but it's not used anywhere important */ 285 ic->ic_phytype = IEEE80211_T_OFDM; 286 ic->ic_opmode = IEEE80211_M_STA; 287 ic->ic_caps = 288 IEEE80211_C_STA /* station mode supported */ 289 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 290 | IEEE80211_C_MONITOR /* monitor mode */ 291 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 292 | IEEE80211_C_SHSLOT /* short slot time supported */ 293 | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 294 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 295 ; 296 297 /* 298 * Transmit requires space in the packet for a special format transmit 299 * record and optional padding between this record and the payload. 300 * Ask the net80211 layer to arrange this when encapsulating 301 * packets so we can add it efficiently. 302 */ 303 ic->ic_headroom = sizeof(struct malo_txrec) - 304 sizeof(struct ieee80211_frame); 305 306 /* call MI attach routine. */ 307 ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 308 /* override default methods */ 309 ic->ic_vap_create = malo_vap_create; 310 ic->ic_vap_delete = malo_vap_delete; 311 ic->ic_raw_xmit = malo_raw_xmit; 312 ic->ic_updateslot = malo_updateslot; 313 314 ic->ic_scan_start = malo_scan_start; 315 ic->ic_scan_end = malo_scan_end; 316 ic->ic_set_channel = malo_set_channel; 317 318 sc->malo_invalid = 0; /* ready to go, enable int handling */ 319 320 malo_bpfattach(sc); 321 322 /* 323 * Setup dynamic sysctl's. 324 */ 325 malo_sysctlattach(sc); 326 327 if (bootverbose) 328 ieee80211_announce(ic); 329 malo_announce(sc); 330 331 return 0; 332 bad2: 333 malo_dma_cleanup(sc); 334 bad1: 335 malo_hal_detach(mh); 336 bad: 337 if_free(ifp); 338 sc->malo_invalid = 1; 339 340 return error; 341 } 342 343 static struct ieee80211vap * 344 malo_vap_create(struct ieee80211com *ic, 345 const char name[IFNAMSIZ], int unit, int opmode, int flags, 346 const uint8_t bssid[IEEE80211_ADDR_LEN], 347 const uint8_t mac[IEEE80211_ADDR_LEN]) 348 { 349 struct ifnet *ifp = ic->ic_ifp; 350 struct malo_vap *mvp; 351 struct ieee80211vap *vap; 352 353 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 354 if_printf(ifp, "multiple vaps not supported\n"); 355 return NULL; 356 } 357 switch (opmode) { 358 case IEEE80211_M_STA: 359 if (opmode == IEEE80211_M_STA) 360 flags |= IEEE80211_CLONE_NOBEACONS; 361 /* fall thru... */ 362 case IEEE80211_M_MONITOR: 363 break; 364 default: 365 if_printf(ifp, "%s mode not supported\n", 366 ieee80211_opmode_name[opmode]); 367 return NULL; /* unsupported */ 368 } 369 mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 370 M_80211_VAP, M_NOWAIT | M_ZERO); 371 if (mvp == NULL) { 372 if_printf(ifp, "cannot allocate vap state block\n"); 373 return NULL; 374 } 375 vap = &mvp->malo_vap; 376 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 377 378 /* override state transition machine */ 379 mvp->malo_newstate = vap->iv_newstate; 380 vap->iv_newstate = malo_newstate; 381 382 /* complete setup */ 383 ieee80211_vap_attach(vap, 384 ieee80211_media_change, ieee80211_media_status); 385 ic->ic_opmode = opmode; 386 return vap; 387 } 388 389 static void 390 malo_vap_delete(struct ieee80211vap *vap) 391 { 392 struct malo_vap *mvp = MALO_VAP(vap); 393 394 ieee80211_vap_detach(vap); 395 free(mvp, M_80211_VAP); 396 } 397 398 int 399 malo_intr(void *arg) 400 { 401 struct malo_softc *sc = arg; 402 struct malo_hal *mh = sc->malo_mh; 403 uint32_t status; 404 405 if (sc->malo_invalid) { 406 /* 407 * The hardware is not ready/present, don't touch anything. 408 * Note this can happen early on if the IRQ is shared. 409 */ 410 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 411 return (FILTER_STRAY); 412 } 413 414 /* 415 * Figure out the reason(s) for the interrupt. 416 */ 417 malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 418 if (status == 0) /* must be a shared irq */ 419 return (FILTER_STRAY); 420 421 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 422 __func__, status, sc->malo_imask); 423 424 if (status & MALO_A2HRIC_BIT_RX_RDY) 425 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 426 if (status & MALO_A2HRIC_BIT_TX_DONE) 427 taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 428 if (status & MALO_A2HRIC_BIT_OPC_DONE) 429 malo_hal_cmddone(mh); 430 if (status & MALO_A2HRIC_BIT_MAC_EVENT) 431 ; 432 if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 433 ; 434 if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 435 /* TKIP ICV error */ 436 sc->malo_stats.mst_rx_badtkipicv++; 437 } 438 #ifdef MALO_DEBUG 439 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 440 DPRINTF(sc, MALO_DEBUG_INTR, 441 "%s: can't handle interrupt status 0x%x\n", 442 __func__, status); 443 #endif 444 return (FILTER_HANDLED); 445 } 446 447 static void 448 malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 449 { 450 bus_addr_t *paddr = (bus_addr_t*) arg; 451 452 KASSERT(error == 0, ("error %u on bus_dma callback", error)); 453 454 *paddr = segs->ds_addr; 455 } 456 457 static int 458 malo_desc_setup(struct malo_softc *sc, const char *name, 459 struct malo_descdma *dd, 460 int nbuf, size_t bufsize, int ndesc, size_t descsize) 461 { 462 int error; 463 struct ifnet *ifp = sc->malo_ifp; 464 uint8_t *ds; 465 466 DPRINTF(sc, MALO_DEBUG_RESET, 467 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 468 __func__, name, nbuf, (uintmax_t) bufsize, 469 ndesc, (uintmax_t) descsize); 470 471 dd->dd_name = name; 472 dd->dd_desc_len = nbuf * ndesc * descsize; 473 474 /* 475 * Setup DMA descriptor area. 476 */ 477 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 478 PAGE_SIZE, 0, /* alignment, bounds */ 479 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 480 BUS_SPACE_MAXADDR, /* highaddr */ 481 NULL, NULL, /* filter, filterarg */ 482 dd->dd_desc_len, /* maxsize */ 483 1, /* nsegments */ 484 dd->dd_desc_len, /* maxsegsize */ 485 BUS_DMA_ALLOCNOW, /* flags */ 486 NULL, /* lockfunc */ 487 NULL, /* lockarg */ 488 &dd->dd_dmat); 489 if (error != 0) { 490 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 491 return error; 492 } 493 494 /* allocate descriptors */ 495 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 496 if (error != 0) { 497 if_printf(ifp, "unable to create dmamap for %s descriptors, " 498 "error %u\n", dd->dd_name, error); 499 goto fail0; 500 } 501 502 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 503 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 504 if (error != 0) { 505 if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 506 "error %u\n", nbuf * ndesc, dd->dd_name, error); 507 goto fail1; 508 } 509 510 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 511 dd->dd_desc, dd->dd_desc_len, 512 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 513 if (error != 0) { 514 if_printf(ifp, "unable to map %s descriptors, error %u\n", 515 dd->dd_name, error); 516 goto fail2; 517 } 518 519 ds = dd->dd_desc; 520 memset(ds, 0, dd->dd_desc_len); 521 DPRINTF(sc, MALO_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n", 522 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 523 (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 524 525 return 0; 526 fail2: 527 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 528 fail1: 529 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 530 fail0: 531 bus_dma_tag_destroy(dd->dd_dmat); 532 memset(dd, 0, sizeof(*dd)); 533 return error; 534 } 535 536 #define DS2PHYS(_dd, _ds) \ 537 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 538 539 static int 540 malo_rxdma_setup(struct malo_softc *sc) 541 { 542 struct ifnet *ifp = sc->malo_ifp; 543 int error, bsize, i; 544 struct malo_rxbuf *bf; 545 struct malo_rxdesc *ds; 546 547 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 548 malo_rxbuf, sizeof(struct malo_rxbuf), 549 1, sizeof(struct malo_rxdesc)); 550 if (error != 0) 551 return error; 552 553 /* 554 * Allocate rx buffers and set them up. 555 */ 556 bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 557 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 558 if (bf == NULL) { 559 if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 560 return error; 561 } 562 sc->malo_rxdma.dd_bufptr = bf; 563 564 STAILQ_INIT(&sc->malo_rxbuf); 565 ds = sc->malo_rxdma.dd_desc; 566 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 567 bf->bf_desc = ds; 568 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 569 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 570 &bf->bf_dmamap); 571 if (error != 0) { 572 if_printf(ifp, "%s: unable to dmamap for rx buffer, " 573 "error %d\n", __func__, error); 574 return error; 575 } 576 /* NB: tail is intentional to preserve descriptor order */ 577 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 578 } 579 return 0; 580 } 581 582 static int 583 malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 584 { 585 struct ifnet *ifp = sc->malo_ifp; 586 int error, bsize, i; 587 struct malo_txbuf *bf; 588 struct malo_txdesc *ds; 589 590 error = malo_desc_setup(sc, "tx", &txq->dma, 591 malo_txbuf, sizeof(struct malo_txbuf), 592 MALO_TXDESC, sizeof(struct malo_txdesc)); 593 if (error != 0) 594 return error; 595 596 /* allocate and setup tx buffers */ 597 bsize = malo_txbuf * sizeof(struct malo_txbuf); 598 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 599 if (bf == NULL) { 600 if_printf(ifp, "malloc of %u tx buffers failed\n", 601 malo_txbuf); 602 return ENOMEM; 603 } 604 txq->dma.dd_bufptr = bf; 605 606 STAILQ_INIT(&txq->free); 607 txq->nfree = 0; 608 ds = txq->dma.dd_desc; 609 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 610 bf->bf_desc = ds; 611 bf->bf_daddr = DS2PHYS(&txq->dma, ds); 612 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 613 &bf->bf_dmamap); 614 if (error != 0) { 615 if_printf(ifp, "unable to create dmamap for tx " 616 "buffer %u, error %u\n", i, error); 617 return error; 618 } 619 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 620 txq->nfree++; 621 } 622 623 return 0; 624 } 625 626 static void 627 malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 628 { 629 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 630 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 631 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 632 bus_dma_tag_destroy(dd->dd_dmat); 633 634 memset(dd, 0, sizeof(*dd)); 635 } 636 637 static void 638 malo_rxdma_cleanup(struct malo_softc *sc) 639 { 640 struct malo_rxbuf *bf; 641 642 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 643 if (bf->bf_m != NULL) { 644 m_freem(bf->bf_m); 645 bf->bf_m = NULL; 646 } 647 if (bf->bf_dmamap != NULL) { 648 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 649 bf->bf_dmamap = NULL; 650 } 651 } 652 STAILQ_INIT(&sc->malo_rxbuf); 653 if (sc->malo_rxdma.dd_bufptr != NULL) { 654 free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 655 sc->malo_rxdma.dd_bufptr = NULL; 656 } 657 if (sc->malo_rxdma.dd_desc_len != 0) 658 malo_desc_cleanup(sc, &sc->malo_rxdma); 659 } 660 661 static void 662 malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 663 { 664 struct malo_txbuf *bf; 665 struct ieee80211_node *ni; 666 667 STAILQ_FOREACH(bf, &txq->free, bf_list) { 668 if (bf->bf_m != NULL) { 669 m_freem(bf->bf_m); 670 bf->bf_m = NULL; 671 } 672 ni = bf->bf_node; 673 bf->bf_node = NULL; 674 if (ni != NULL) { 675 /* 676 * Reclaim node reference. 677 */ 678 ieee80211_free_node(ni); 679 } 680 if (bf->bf_dmamap != NULL) { 681 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 682 bf->bf_dmamap = NULL; 683 } 684 } 685 STAILQ_INIT(&txq->free); 686 txq->nfree = 0; 687 if (txq->dma.dd_bufptr != NULL) { 688 free(txq->dma.dd_bufptr, M_MALODEV); 689 txq->dma.dd_bufptr = NULL; 690 } 691 if (txq->dma.dd_desc_len != 0) 692 malo_desc_cleanup(sc, &txq->dma); 693 } 694 695 static void 696 malo_dma_cleanup(struct malo_softc *sc) 697 { 698 int i; 699 700 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 701 malo_txdma_cleanup(sc, &sc->malo_txq[i]); 702 703 malo_rxdma_cleanup(sc); 704 } 705 706 static int 707 malo_dma_setup(struct malo_softc *sc) 708 { 709 int error, i; 710 711 /* rxdma initializing. */ 712 error = malo_rxdma_setup(sc); 713 if (error != 0) 714 return error; 715 716 /* NB: we just have 1 tx queue now. */ 717 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 718 error = malo_txdma_setup(sc, &sc->malo_txq[i]); 719 if (error != 0) { 720 malo_dma_cleanup(sc); 721 722 return error; 723 } 724 725 malo_txq_init(sc, &sc->malo_txq[i], i); 726 } 727 728 return 0; 729 } 730 731 static void 732 malo_hal_set_rxtxdma(struct malo_softc *sc) 733 { 734 int i; 735 736 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 737 sc->malo_hwdma.rxdesc_read); 738 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 739 sc->malo_hwdma.rxdesc_read); 740 741 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 742 malo_bar0_write4(sc, 743 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 744 } 745 } 746 747 /* 748 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 749 * for compatibility with older firmware. For current firmware we send 750 * this information with a cmd block via malo_hal_sethwdma. 751 */ 752 static int 753 malo_setup_hwdma(struct malo_softc *sc) 754 { 755 int i; 756 struct malo_txq *txq; 757 758 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 759 760 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 761 txq = &sc->malo_txq[i]; 762 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 763 } 764 sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 765 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 766 767 malo_hal_set_rxtxdma(sc); 768 769 return 0; 770 } 771 772 static void 773 malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 774 { 775 struct malo_txbuf *bf, *bn; 776 struct malo_txdesc *ds; 777 778 MALO_TXQ_LOCK_INIT(sc, txq); 779 txq->qnum = qnum; 780 txq->txpri = 0; /* XXX */ 781 782 STAILQ_FOREACH(bf, &txq->free, bf_list) { 783 bf->bf_txq = txq; 784 785 ds = bf->bf_desc; 786 bn = STAILQ_NEXT(bf, bf_list); 787 if (bn == NULL) 788 bn = STAILQ_FIRST(&txq->free); 789 ds->physnext = htole32(bn->bf_daddr); 790 } 791 STAILQ_INIT(&txq->active); 792 } 793 794 /* 795 * Reclaim resources for a setup queue. 796 */ 797 static void 798 malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 799 { 800 /* XXX hal work? */ 801 MALO_TXQ_LOCK_DESTROY(txq); 802 } 803 804 /* 805 * Allocate a tx buffer for sending a frame. 806 */ 807 static struct malo_txbuf * 808 malo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 809 { 810 struct malo_txbuf *bf; 811 812 MALO_TXQ_LOCK(txq); 813 bf = STAILQ_FIRST(&txq->free); 814 if (bf != NULL) { 815 STAILQ_REMOVE_HEAD(&txq->free, bf_list); 816 txq->nfree--; 817 } 818 MALO_TXQ_UNLOCK(txq); 819 if (bf == NULL) { 820 DPRINTF(sc, MALO_DEBUG_XMIT, 821 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 822 sc->malo_stats.mst_tx_qstop++; 823 } 824 return bf; 825 } 826 827 static int 828 malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 829 { 830 struct mbuf *m; 831 int error; 832 833 /* 834 * Load the DMA map so any coalescing is done. This also calculates 835 * the number of descriptors we need. 836 */ 837 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 838 bf->bf_segs, &bf->bf_nseg, 839 BUS_DMA_NOWAIT); 840 if (error == EFBIG) { 841 /* XXX packet requires too many descriptors */ 842 bf->bf_nseg = MALO_TXDESC + 1; 843 } else if (error != 0) { 844 sc->malo_stats.mst_tx_busdma++; 845 m_freem(m0); 846 return error; 847 } 848 /* 849 * Discard null packets and check for packets that require too many 850 * TX descriptors. We try to convert the latter to a cluster. 851 */ 852 if (error == EFBIG) { /* too many desc's, linearize */ 853 sc->malo_stats.mst_tx_linear++; 854 m = m_defrag(m0, M_DONTWAIT); 855 if (m == NULL) { 856 m_freem(m0); 857 sc->malo_stats.mst_tx_nombuf++; 858 return ENOMEM; 859 } 860 m0 = m; 861 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 862 bf->bf_segs, &bf->bf_nseg, 863 BUS_DMA_NOWAIT); 864 if (error != 0) { 865 sc->malo_stats.mst_tx_busdma++; 866 m_freem(m0); 867 return error; 868 } 869 KASSERT(bf->bf_nseg <= MALO_TXDESC, 870 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 871 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 872 sc->malo_stats.mst_tx_nodata++; 873 m_freem(m0); 874 return EIO; 875 } 876 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 877 __func__, m0, m0->m_pkthdr.len); 878 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 879 bf->bf_m = m0; 880 881 return 0; 882 } 883 884 #ifdef MALO_DEBUG 885 static void 886 malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 887 { 888 const struct malo_rxdesc *ds = bf->bf_desc; 889 uint32_t status = le32toh(ds->status); 890 891 printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n" 892 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 893 " RATE:%02x QOS:%04x\n", 894 ix, ds, (const struct malo_desc *)bf->bf_daddr, 895 le32toh(ds->physnext), le32toh(ds->physbuffdata), 896 ds->rxcontrol, 897 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 898 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 899 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 900 ds->rate, le16toh(ds->qosctrl)); 901 } 902 903 static void 904 malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 905 { 906 const struct malo_txdesc *ds = bf->bf_desc; 907 uint32_t status = le32toh(ds->status); 908 909 printf("Q%u[%3u]", qnum, ix); 910 printf(" (DS.V:%p DS.P:%p)\n", 911 ds, (const struct malo_txdesc *)bf->bf_daddr); 912 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 913 le32toh(ds->physnext), 914 le32toh(ds->pktptr), le16toh(ds->pktlen), status, 915 status & MALO_TXD_STATUS_USED ? 916 "" : (status & 3) != 0 ? " *" : " !"); 917 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 918 ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 919 le32toh(ds->sap_pktinfo), le16toh(ds->format)); 920 #if 0 921 { 922 const uint8_t *cp = (const uint8_t *) ds; 923 int i; 924 for (i = 0; i < sizeof(struct malo_txdesc); i++) { 925 printf("%02x ", cp[i]); 926 if (((i+1) % 16) == 0) 927 printf("\n"); 928 } 929 printf("\n"); 930 } 931 #endif 932 } 933 #endif /* MALO_DEBUG */ 934 935 static __inline void 936 malo_updatetxrate(struct ieee80211_node *ni, int rix) 937 { 938 #define N(x) (sizeof(x)/sizeof(x[0])) 939 static const int ieeerates[] = 940 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 941 if (rix < N(ieeerates)) 942 ni->ni_txrate = ieeerates[rix]; 943 #undef N 944 } 945 946 static int 947 malo_fix2rate(int fix_rate) 948 { 949 #define N(x) (sizeof(x)/sizeof(x[0])) 950 static const int rates[] = 951 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 952 return (fix_rate < N(rates) ? rates[fix_rate] : 0); 953 #undef N 954 } 955 956 /* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 957 #define MS(v,x) (((v) & x) >> x##_S) 958 #define SM(v,x) (((v) << x##_S) & x) 959 960 /* 961 * Process completed xmit descriptors from the specified queue. 962 */ 963 static int 964 malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 965 { 966 struct malo_txbuf *bf; 967 struct malo_txdesc *ds; 968 struct ieee80211_node *ni; 969 int nreaped; 970 uint32_t status; 971 972 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 973 __func__, txq->qnum); 974 for (nreaped = 0;; nreaped++) { 975 MALO_TXQ_LOCK(txq); 976 bf = STAILQ_FIRST(&txq->active); 977 if (bf == NULL) { 978 MALO_TXQ_UNLOCK(txq); 979 break; 980 } 981 ds = bf->bf_desc; 982 MALO_TXDESC_SYNC(txq, ds, 983 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 984 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 985 MALO_TXQ_UNLOCK(txq); 986 break; 987 } 988 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 989 MALO_TXQ_UNLOCK(txq); 990 991 #ifdef MALO_DEBUG 992 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 993 malo_printtxbuf(bf, txq->qnum, nreaped); 994 #endif 995 ni = bf->bf_node; 996 if (ni != NULL) { 997 status = le32toh(ds->status); 998 if (status & MALO_TXD_STATUS_OK) { 999 uint16_t format = le16toh(ds->format); 1000 uint8_t txant = MS(format, MALO_TXD_ANTENNA); 1001 1002 sc->malo_stats.mst_ant_tx[txant]++; 1003 if (status & MALO_TXD_STATUS_OK_RETRY) 1004 sc->malo_stats.mst_tx_retries++; 1005 if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1006 sc->malo_stats.mst_tx_mretries++; 1007 malo_updatetxrate(ni, ds->datarate); 1008 sc->malo_stats.mst_tx_rate = ds->datarate; 1009 } else { 1010 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1011 sc->malo_stats.mst_tx_linkerror++; 1012 if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1013 sc->malo_stats.mst_tx_xretries++; 1014 if (status & MALO_TXD_STATUS_FAILED_AGING) 1015 sc->malo_stats.mst_tx_aging++; 1016 } 1017 /* 1018 * Do any tx complete callback. Note this must 1019 * be done before releasing the node reference. 1020 * XXX no way to figure out if frame was ACK'd 1021 */ 1022 if (bf->bf_m->m_flags & M_TXCB) { 1023 /* XXX strip fw len in case header inspected */ 1024 m_adj(bf->bf_m, sizeof(uint16_t)); 1025 ieee80211_process_callback(ni, bf->bf_m, 1026 (status & MALO_TXD_STATUS_OK) == 0); 1027 } 1028 /* 1029 * Reclaim reference to node. 1030 * 1031 * NB: the node may be reclaimed here if, for example 1032 * this is a DEAUTH message that was sent and the 1033 * node was timed out due to inactivity. 1034 */ 1035 ieee80211_free_node(ni); 1036 } 1037 ds->status = htole32(MALO_TXD_STATUS_IDLE); 1038 ds->pktlen = htole32(0); 1039 1040 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1041 BUS_DMASYNC_POSTWRITE); 1042 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1043 m_freem(bf->bf_m); 1044 bf->bf_m = NULL; 1045 bf->bf_node = NULL; 1046 1047 MALO_TXQ_LOCK(txq); 1048 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1049 txq->nfree++; 1050 MALO_TXQ_UNLOCK(txq); 1051 } 1052 return nreaped; 1053 } 1054 1055 /* 1056 * Deferred processing of transmit interrupt. 1057 */ 1058 static void 1059 malo_tx_proc(void *arg, int npending) 1060 { 1061 struct malo_softc *sc = arg; 1062 struct ifnet *ifp = sc->malo_ifp; 1063 int i, nreaped; 1064 1065 /* 1066 * Process each active queue. 1067 */ 1068 nreaped = 0; 1069 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1070 if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1071 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1072 } 1073 1074 if (nreaped != 0) { 1075 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1076 ifp->if_timer = 0; 1077 malo_start(ifp); 1078 } 1079 } 1080 1081 static int 1082 malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1083 struct malo_txbuf *bf, struct mbuf *m0) 1084 { 1085 #define IEEE80211_DIR_DSTODS(wh) \ 1086 ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1087 #define IS_DATA_FRAME(wh) \ 1088 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1089 int error, ismcast, iswep; 1090 int copyhdrlen, hdrlen, pktlen; 1091 struct ieee80211_frame *wh; 1092 struct ifnet *ifp = sc->malo_ifp; 1093 struct ieee80211com *ic = ifp->if_l2com; 1094 struct malo_txdesc *ds; 1095 struct malo_txrec *tr; 1096 struct malo_txq *txq; 1097 uint16_t qos; 1098 1099 wh = mtod(m0, struct ieee80211_frame *); 1100 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1101 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1102 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1103 pktlen = m0->m_pkthdr.len; 1104 if (IEEE80211_QOS_HAS_SEQ(wh)) { 1105 if (IEEE80211_DIR_DSTODS(wh)) { 1106 qos = *(uint16_t *) 1107 (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1108 copyhdrlen -= sizeof(qos); 1109 } else 1110 qos = *(uint16_t *) 1111 (((struct ieee80211_qosframe *) wh)->i_qos); 1112 } else 1113 qos = 0; 1114 1115 if (iswep) { 1116 struct ieee80211_key *k; 1117 1118 /* 1119 * Construct the 802.11 header+trailer for an encrypted 1120 * frame. The only reason this can fail is because of an 1121 * unknown or unsupported cipher/key type. 1122 * 1123 * NB: we do this even though the firmware will ignore 1124 * what we've done for WEP and TKIP as we need the 1125 * ExtIV filled in for CCMP and this also adjusts 1126 * the headers which simplifies our work below. 1127 */ 1128 k = ieee80211_crypto_encap(ni, m0); 1129 if (k == NULL) { 1130 /* 1131 * This can happen when the key is yanked after the 1132 * frame was queued. Just discard the frame; the 1133 * 802.11 layer counts failures and provides 1134 * debugging/diagnostics. 1135 */ 1136 m_freem(m0); 1137 return EIO; 1138 } 1139 1140 /* 1141 * Adjust the packet length for the crypto additions 1142 * done during encap and any other bits that the f/w 1143 * will add later on. 1144 */ 1145 pktlen = m0->m_pkthdr.len; 1146 1147 /* packet header may have moved, reset our local pointer */ 1148 wh = mtod(m0, struct ieee80211_frame *); 1149 } 1150 1151 if (bpf_peers_present(ifp->if_bpf)) { 1152 sc->malo_tx_th.wt_flags = 0; /* XXX */ 1153 if (iswep) 1154 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1155 sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1156 sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1157 1158 bpf_mtap2(ifp->if_bpf, &sc->malo_tx_th, sc->malo_tx_th_len, m0); 1159 } 1160 1161 /* 1162 * Copy up/down the 802.11 header; the firmware requires 1163 * we present a 2-byte payload length followed by a 1164 * 4-address header (w/o QoS), followed (optionally) by 1165 * any WEP/ExtIV header (but only filled in for CCMP). 1166 * We are assured the mbuf has sufficient headroom to 1167 * prepend in-place by the setup of ic_headroom in 1168 * malo_attach. 1169 */ 1170 if (hdrlen < sizeof(struct malo_txrec)) { 1171 const int space = sizeof(struct malo_txrec) - hdrlen; 1172 if (M_LEADINGSPACE(m0) < space) { 1173 /* NB: should never happen */ 1174 device_printf(sc->malo_dev, 1175 "not enough headroom, need %d found %zd, " 1176 "m_flags 0x%x m_len %d\n", 1177 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1178 ieee80211_dump_pkt(ic, 1179 mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1180 m_freem(m0); 1181 /* XXX stat */ 1182 return EIO; 1183 } 1184 M_PREPEND(m0, space, M_NOWAIT); 1185 } 1186 tr = mtod(m0, struct malo_txrec *); 1187 if (wh != (struct ieee80211_frame *) &tr->wh) 1188 ovbcopy(wh, &tr->wh, hdrlen); 1189 /* 1190 * Note: the "firmware length" is actually the length of the fully 1191 * formed "802.11 payload". That is, it's everything except for 1192 * the 802.11 header. In particular this includes all crypto 1193 * material including the MIC! 1194 */ 1195 tr->fwlen = htole16(pktlen - hdrlen); 1196 1197 /* 1198 * Load the DMA map so any coalescing is done. This 1199 * also calculates the number of descriptors we need. 1200 */ 1201 error = malo_tx_dmasetup(sc, bf, m0); 1202 if (error != 0) 1203 return error; 1204 bf->bf_node = ni; /* NB: held reference */ 1205 m0 = bf->bf_m; /* NB: may have changed */ 1206 tr = mtod(m0, struct malo_txrec *); 1207 wh = (struct ieee80211_frame *)&tr->wh; 1208 1209 /* 1210 * Formulate tx descriptor. 1211 */ 1212 ds = bf->bf_desc; 1213 txq = bf->bf_txq; 1214 1215 ds->qosctrl = qos; /* NB: already little-endian */ 1216 ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1217 ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1218 /* NB: pPhysNext setup once, don't touch */ 1219 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1220 ds->sap_pktinfo = 0; 1221 ds->format = 0; 1222 1223 /* 1224 * Select transmit rate. 1225 */ 1226 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1227 case IEEE80211_FC0_TYPE_MGT: 1228 sc->malo_stats.mst_tx_mgmt++; 1229 /* fall thru... */ 1230 case IEEE80211_FC0_TYPE_CTL: 1231 ds->txpriority = 1; 1232 break; 1233 case IEEE80211_FC0_TYPE_DATA: 1234 ds->txpriority = txq->qnum; 1235 break; 1236 default: 1237 if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1238 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1239 /* XXX statistic */ 1240 m_freem(m0); 1241 return EIO; 1242 } 1243 1244 #ifdef MALO_DEBUG 1245 if (IFF_DUMPPKTS_XMIT(sc)) 1246 ieee80211_dump_pkt(ic, 1247 mtod(m0, const uint8_t *)+sizeof(uint16_t), 1248 m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1249 #endif 1250 1251 MALO_TXQ_LOCK(txq); 1252 if (!IS_DATA_FRAME(wh)) 1253 ds->status |= htole32(1); 1254 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1255 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1256 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1257 1258 ifp->if_opackets++; 1259 ifp->if_timer = 5; 1260 MALO_TXQ_UNLOCK(txq); 1261 return 0; 1262 #undef IEEE80211_DIR_DSTODS 1263 } 1264 1265 static void 1266 malo_start(struct ifnet *ifp) 1267 { 1268 struct malo_softc *sc = ifp->if_softc; 1269 struct ieee80211_node *ni; 1270 struct malo_txq *txq = &sc->malo_txq[0]; 1271 struct malo_txbuf *bf = NULL; 1272 struct mbuf *m; 1273 int nqueued = 0; 1274 1275 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1276 return; 1277 1278 for (;;) { 1279 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1280 if (m == NULL) 1281 break; 1282 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1283 bf = malo_getbuf(sc, txq); 1284 if (bf == NULL) { 1285 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1286 1287 /* XXX blocks other traffic */ 1288 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1289 sc->malo_stats.mst_tx_qstop++; 1290 break; 1291 } 1292 /* 1293 * Pass the frame to the h/w for transmission. 1294 */ 1295 if (malo_tx_start(sc, ni, bf, m)) { 1296 ifp->if_oerrors++; 1297 if (bf != NULL) { 1298 bf->bf_m = NULL; 1299 bf->bf_node = NULL; 1300 MALO_TXQ_LOCK(txq); 1301 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1302 MALO_TXQ_UNLOCK(txq); 1303 } 1304 ieee80211_free_node(ni); 1305 continue; 1306 } 1307 nqueued++; 1308 1309 if (nqueued >= malo_txcoalesce) { 1310 /* 1311 * Poke the firmware to process queued frames; 1312 * see below about (lack of) locking. 1313 */ 1314 nqueued = 0; 1315 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1316 } 1317 } 1318 1319 if (nqueued) { 1320 /* 1321 * NB: We don't need to lock against tx done because 1322 * this just prods the firmware to check the transmit 1323 * descriptors. The firmware will also start fetching 1324 * descriptors by itself if it notices new ones are 1325 * present when it goes to deliver a tx done interrupt 1326 * to the host. So if we race with tx done processing 1327 * it's ok. Delivering the kick here rather than in 1328 * malo_tx_start is an optimization to avoid poking the 1329 * firmware for each packet. 1330 * 1331 * NB: the queue id isn't used so 0 is ok. 1332 */ 1333 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1334 } 1335 } 1336 1337 static void 1338 malo_watchdog(struct ifnet *ifp) 1339 { 1340 struct malo_softc *sc = ifp->if_softc; 1341 1342 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1343 if_printf(ifp, "watchdog timeout\n"); 1344 1345 /* XXX no way to reset h/w. now */ 1346 1347 ifp->if_oerrors++; 1348 sc->malo_stats.mst_watchdog++; 1349 } 1350 } 1351 1352 static int 1353 malo_hal_reset(struct malo_softc *sc) 1354 { 1355 static int first = 0; 1356 struct ifnet *ifp = sc->malo_ifp; 1357 struct ieee80211com *ic = ifp->if_l2com; 1358 struct malo_hal *mh = sc->malo_mh; 1359 1360 if (first == 0) { 1361 /* 1362 * NB: when the device firstly is initialized, sometimes 1363 * firmware could override rx/tx dma registers so we re-set 1364 * these values once. 1365 */ 1366 malo_hal_set_rxtxdma(sc); 1367 first = 1; 1368 } 1369 1370 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1371 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1372 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1373 malo_chan_set(sc, ic->ic_curchan); 1374 1375 /* XXX needs other stuffs? */ 1376 1377 return 1; 1378 } 1379 1380 static __inline struct mbuf * 1381 malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1382 { 1383 struct mbuf *m; 1384 bus_addr_t paddr; 1385 int error; 1386 1387 /* XXX don't need mbuf, just dma buffer */ 1388 m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1389 if (m == NULL) { 1390 sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1391 return NULL; 1392 } 1393 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1394 mtod(m, caddr_t), MJUMPAGESIZE, 1395 malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1396 if (error != 0) { 1397 if_printf(sc->malo_ifp, 1398 "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1399 m_freem(m); 1400 return NULL; 1401 } 1402 bf->bf_data = paddr; 1403 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1404 1405 return m; 1406 } 1407 1408 static int 1409 malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1410 { 1411 struct malo_rxdesc *ds; 1412 1413 ds = bf->bf_desc; 1414 if (bf->bf_m == NULL) { 1415 bf->bf_m = malo_getrxmbuf(sc, bf); 1416 if (bf->bf_m == NULL) { 1417 /* mark descriptor to be skipped */ 1418 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1419 /* NB: don't need PREREAD */ 1420 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1421 return ENOMEM; 1422 } 1423 } 1424 1425 /* 1426 * Setup descriptor. 1427 */ 1428 ds->qosctrl = 0; 1429 ds->snr = 0; 1430 ds->status = MALO_RXD_STATUS_IDLE; 1431 ds->channel = 0; 1432 ds->pktlen = htole16(MALO_RXSIZE); 1433 ds->nf = 0; 1434 ds->physbuffdata = htole32(bf->bf_data); 1435 /* NB: don't touch pPhysNext, set once */ 1436 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1437 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1438 1439 return 0; 1440 } 1441 1442 /* 1443 * Setup the rx data structures. This should only be done once or we may get 1444 * out of sync with the firmware. 1445 */ 1446 static int 1447 malo_startrecv(struct malo_softc *sc) 1448 { 1449 struct malo_rxbuf *bf, *prev; 1450 struct malo_rxdesc *ds; 1451 1452 if (sc->malo_recvsetup == 1) { 1453 malo_mode_init(sc); /* set filters, etc. */ 1454 return 0; 1455 } 1456 1457 prev = NULL; 1458 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1459 int error = malo_rxbuf_init(sc, bf); 1460 if (error != 0) { 1461 DPRINTF(sc, MALO_DEBUG_RECV, 1462 "%s: malo_rxbuf_init failed %d\n", 1463 __func__, error); 1464 return error; 1465 } 1466 if (prev != NULL) { 1467 ds = prev->bf_desc; 1468 ds->physnext = htole32(bf->bf_daddr); 1469 } 1470 prev = bf; 1471 } 1472 if (prev != NULL) { 1473 ds = prev->bf_desc; 1474 ds->physnext = 1475 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1476 } 1477 1478 sc->malo_recvsetup = 1; 1479 1480 malo_mode_init(sc); /* set filters, etc. */ 1481 1482 return 0; 1483 } 1484 1485 static void 1486 malo_init_locked(struct malo_softc *sc) 1487 { 1488 struct ifnet *ifp = sc->malo_ifp; 1489 struct malo_hal *mh = sc->malo_mh; 1490 int error; 1491 1492 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1493 __func__, ifp->if_flags); 1494 1495 MALO_LOCK_ASSERT(sc); 1496 1497 /* 1498 * Stop anything previously setup. This is safe whether this is 1499 * the first time through or not. 1500 */ 1501 malo_stop_locked(ifp, 0); 1502 1503 /* 1504 * Push state to the firmware. 1505 */ 1506 if (!malo_hal_reset(sc)) { 1507 if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1508 return; 1509 } 1510 1511 /* 1512 * Setup recv (once); transmit is already good to go. 1513 */ 1514 error = malo_startrecv(sc); 1515 if (error != 0) { 1516 if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1517 __func__, error); 1518 return; 1519 } 1520 1521 /* 1522 * Enable interrupts. 1523 */ 1524 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1525 | MALO_A2HRIC_BIT_TX_DONE 1526 | MALO_A2HRIC_BIT_OPC_DONE 1527 | MALO_A2HRIC_BIT_MAC_EVENT 1528 | MALO_A2HRIC_BIT_RX_PROBLEM 1529 | MALO_A2HRIC_BIT_ICV_ERROR 1530 | MALO_A2HRIC_BIT_RADAR_DETECT 1531 | MALO_A2HRIC_BIT_CHAN_SWITCH; 1532 1533 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1534 malo_hal_intrset(mh, sc->malo_imask); 1535 } 1536 1537 static void 1538 malo_init(void *arg) 1539 { 1540 struct malo_softc *sc = (struct malo_softc *) arg; 1541 struct ifnet *ifp = sc->malo_ifp; 1542 struct ieee80211com *ic = ifp->if_l2com; 1543 1544 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1545 __func__, ifp->if_flags); 1546 1547 MALO_LOCK(sc); 1548 malo_init_locked(sc); 1549 1550 MALO_UNLOCK(sc); 1551 1552 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1553 ieee80211_start_all(ic); /* start all vap's */ 1554 } 1555 1556 /* 1557 * Set the multicast filter contents into the hardware. 1558 */ 1559 static void 1560 malo_setmcastfilter(struct malo_softc *sc) 1561 { 1562 struct ifnet *ifp = sc->malo_ifp; 1563 struct ieee80211com *ic = ifp->if_l2com; 1564 struct ifmultiaddr *ifma; 1565 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1566 uint8_t *mp; 1567 int nmc; 1568 1569 mp = macs; 1570 nmc = 0; 1571 1572 if (ic->ic_opmode == IEEE80211_M_MONITOR || 1573 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1574 goto all; 1575 1576 IF_ADDR_LOCK(ifp); 1577 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1578 if (ifma->ifma_addr->sa_family != AF_LINK) 1579 continue; 1580 1581 if (nmc == MALO_HAL_MCAST_MAX) { 1582 ifp->if_flags |= IFF_ALLMULTI; 1583 IF_ADDR_UNLOCK(ifp); 1584 goto all; 1585 } 1586 IEEE80211_ADDR_COPY(mp, 1587 LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1588 1589 mp += IEEE80211_ADDR_LEN, nmc++; 1590 } 1591 IF_ADDR_UNLOCK(ifp); 1592 1593 malo_hal_setmcast(sc->malo_mh, nmc, macs); 1594 1595 all: 1596 /* 1597 * XXX we don't know how to set the f/w for supporting 1598 * IFF_ALLMULTI | IFF_PROMISC cases 1599 */ 1600 return; 1601 } 1602 1603 static int 1604 malo_mode_init(struct malo_softc *sc) 1605 { 1606 struct ifnet *ifp = sc->malo_ifp; 1607 struct ieee80211com *ic = ifp->if_l2com; 1608 struct malo_hal *mh = sc->malo_mh; 1609 1610 /* 1611 * NB: Ignore promisc in hostap mode; it's set by the 1612 * bridge. This is wrong but we have no way to 1613 * identify internal requests (from the bridge) 1614 * versus external requests such as for tcpdump. 1615 */ 1616 malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1617 ic->ic_opmode != IEEE80211_M_HOSTAP); 1618 malo_setmcastfilter(sc); 1619 1620 return ENXIO; 1621 } 1622 1623 static void 1624 malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1625 { 1626 struct ieee80211_node *ni; 1627 struct malo_txbuf *bf; 1628 u_int ix; 1629 1630 /* 1631 * NB: this assumes output has been stopped and 1632 * we do not need to block malo_tx_tasklet 1633 */ 1634 for (ix = 0;; ix++) { 1635 MALO_TXQ_LOCK(txq); 1636 bf = STAILQ_FIRST(&txq->active); 1637 if (bf == NULL) { 1638 MALO_TXQ_UNLOCK(txq); 1639 break; 1640 } 1641 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1642 MALO_TXQ_UNLOCK(txq); 1643 #ifdef MALO_DEBUG 1644 if (sc->malo_debug & MALO_DEBUG_RESET) { 1645 struct ifnet *ifp = sc->malo_ifp; 1646 struct ieee80211com *ic = ifp->if_l2com; 1647 const struct malo_txrec *tr = 1648 mtod(bf->bf_m, const struct malo_txrec *); 1649 malo_printtxbuf(bf, txq->qnum, ix); 1650 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1651 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1652 } 1653 #endif /* MALO_DEBUG */ 1654 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1655 ni = bf->bf_node; 1656 bf->bf_node = NULL; 1657 if (ni != NULL) { 1658 /* 1659 * Reclaim node reference. 1660 */ 1661 ieee80211_free_node(ni); 1662 } 1663 m_freem(bf->bf_m); 1664 bf->bf_m = NULL; 1665 1666 MALO_TXQ_LOCK(txq); 1667 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1668 txq->nfree++; 1669 MALO_TXQ_UNLOCK(txq); 1670 } 1671 } 1672 1673 static void 1674 malo_stop_locked(struct ifnet *ifp, int disable) 1675 { 1676 struct malo_softc *sc = ifp->if_softc; 1677 struct malo_hal *mh = sc->malo_mh; 1678 int i; 1679 1680 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1681 __func__, sc->malo_invalid, ifp->if_flags); 1682 1683 MALO_LOCK_ASSERT(sc); 1684 1685 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1686 return; 1687 1688 /* 1689 * Shutdown the hardware and driver: 1690 * disable interrupts 1691 * turn off the radio 1692 * drain and release tx queues 1693 * 1694 * Note that some of this work is not possible if the hardware 1695 * is gone (invalid). 1696 */ 1697 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1698 ifp->if_timer = 0; 1699 /* diable interrupt. */ 1700 malo_hal_intrset(mh, 0); 1701 /* turn off the radio. */ 1702 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1703 1704 /* drain and release tx queues. */ 1705 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1706 malo_tx_draintxq(sc, &sc->malo_txq[i]); 1707 } 1708 1709 static int 1710 malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1711 { 1712 #define MALO_IS_RUNNING(ifp) \ 1713 ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1714 struct malo_softc *sc = ifp->if_softc; 1715 struct ieee80211com *ic = ifp->if_l2com; 1716 struct ifreq *ifr = (struct ifreq *) data; 1717 int error = 0, startall = 0; 1718 1719 MALO_LOCK(sc); 1720 switch (cmd) { 1721 case SIOCSIFFLAGS: 1722 if (MALO_IS_RUNNING(ifp)) { 1723 /* 1724 * To avoid rescanning another access point, 1725 * do not call malo_init() here. Instead, 1726 * only reflect promisc mode settings. 1727 */ 1728 malo_mode_init(sc); 1729 } else if (ifp->if_flags & IFF_UP) { 1730 /* 1731 * Beware of being called during attach/detach 1732 * to reset promiscuous mode. In that case we 1733 * will still be marked UP but not RUNNING. 1734 * However trying to re-init the interface 1735 * is the wrong thing to do as we've already 1736 * torn down much of our state. There's 1737 * probably a better way to deal with this. 1738 */ 1739 if (!sc->malo_invalid) { 1740 malo_init_locked(sc); 1741 startall = 1; 1742 } 1743 } else 1744 malo_stop_locked(ifp, 1); 1745 break; 1746 case SIOCGIFMEDIA: 1747 case SIOCSIFMEDIA: 1748 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1749 break; 1750 default: 1751 error = ether_ioctl(ifp, cmd, data); 1752 break; 1753 } 1754 MALO_UNLOCK(sc); 1755 1756 if (startall) 1757 ieee80211_start_all(ic); 1758 return error; 1759 #undef MALO_IS_RUNNING 1760 } 1761 1762 /* 1763 * Callback from the 802.11 layer to update the slot time 1764 * based on the current setting. We use it to notify the 1765 * firmware of ERP changes and the f/w takes care of things 1766 * like slot time and preamble. 1767 */ 1768 static void 1769 malo_updateslot(struct ifnet *ifp) 1770 { 1771 struct malo_softc *sc = ifp->if_softc; 1772 struct ieee80211com *ic = ifp->if_l2com; 1773 struct malo_hal *mh = sc->malo_mh; 1774 int error; 1775 1776 /* NB: can be called early; suppress needless cmds */ 1777 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1778 return; 1779 1780 DPRINTF(sc, MALO_DEBUG_RESET, 1781 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1782 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1783 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1784 1785 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1786 error = malo_hal_set_slot(mh, 1); 1787 else 1788 error = malo_hal_set_slot(mh, 0); 1789 1790 if (error != 0) 1791 device_printf(sc->malo_dev, "setting %s slot failed\n", 1792 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1793 } 1794 1795 static int 1796 malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1797 { 1798 struct ieee80211com *ic = vap->iv_ic; 1799 struct malo_softc *sc = ic->ic_ifp->if_softc; 1800 struct malo_hal *mh = sc->malo_mh; 1801 int error; 1802 1803 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1804 ieee80211_state_name[vap->iv_state], 1805 ieee80211_state_name[nstate]); 1806 1807 /* 1808 * Invoke the net80211 layer first so iv_bss is setup. 1809 */ 1810 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1811 if (error != 0) 1812 return error; 1813 1814 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1815 struct ieee80211_node *ni = vap->iv_bss; 1816 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1817 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1818 1819 DPRINTF(sc, MALO_DEBUG_STATE, 1820 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1821 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1822 vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1823 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1824 ieee80211_chan2ieee(ic, ic->ic_curchan), 1825 ni->ni_associd, mode, tp->ucastrate); 1826 1827 malo_hal_setradio(mh, 1, 1828 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1829 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1830 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1831 malo_hal_set_rate(mh, mode, 1832 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1833 0 : malo_fix2rate(tp->ucastrate)); 1834 } 1835 return 0; 1836 } 1837 1838 static int 1839 malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1840 const struct ieee80211_bpf_params *params) 1841 { 1842 struct ieee80211com *ic = ni->ni_ic; 1843 struct ifnet *ifp = ic->ic_ifp; 1844 struct malo_softc *sc = ifp->if_softc; 1845 struct malo_txbuf *bf; 1846 struct malo_txq *txq; 1847 1848 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1849 ieee80211_free_node(ni); 1850 m_freem(m); 1851 return ENETDOWN; 1852 } 1853 1854 /* 1855 * Grab a TX buffer and associated resources. Note that we depend 1856 * on the classification by the 802.11 layer to get to the right h/w 1857 * queue. Management frames must ALWAYS go on queue 1 but we 1858 * cannot just force that here because we may receive non-mgt frames. 1859 */ 1860 txq = &sc->malo_txq[0]; 1861 bf = malo_getbuf(sc, txq); 1862 if (bf == NULL) { 1863 /* XXX blocks other traffic */ 1864 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1865 ieee80211_free_node(ni); 1866 m_freem(m); 1867 return ENOBUFS; 1868 } 1869 1870 /* 1871 * Pass the frame to the h/w for transmission. 1872 */ 1873 if (malo_tx_start(sc, ni, bf, m) != 0) { 1874 ifp->if_oerrors++; 1875 bf->bf_m = NULL; 1876 bf->bf_node = NULL; 1877 MALO_TXQ_LOCK(txq); 1878 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1879 txq->nfree++; 1880 MALO_TXQ_UNLOCK(txq); 1881 1882 ieee80211_free_node(ni); 1883 return EIO; /* XXX */ 1884 } 1885 1886 /* 1887 * NB: We don't need to lock against tx done because this just 1888 * prods the firmware to check the transmit descriptors. The firmware 1889 * will also start fetching descriptors by itself if it notices 1890 * new ones are present when it goes to deliver a tx done interrupt 1891 * to the host. So if we race with tx done processing it's ok. 1892 * Delivering the kick here rather than in malo_tx_start is 1893 * an optimization to avoid poking the firmware for each packet. 1894 * 1895 * NB: the queue id isn't used so 0 is ok. 1896 */ 1897 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1898 1899 return 0; 1900 } 1901 1902 static void 1903 malo_bpfattach(struct malo_softc *sc) 1904 { 1905 struct ifnet *ifp = sc->malo_ifp; 1906 1907 bpfattach(ifp, DLT_IEEE802_11_RADIO, 1908 sizeof(struct ieee80211_frame) + sizeof(sc->malo_tx_th)); 1909 1910 /* 1911 * Initialize constant fields. 1912 * XXX make header lengths a multiple of 32-bits so subsequent 1913 * headers are properly aligned; this is a kludge to keep 1914 * certain applications happy. 1915 * 1916 * NB: the channel is setup each time we transition to the 1917 * RUN state to avoid filling it in for each frame. 1918 */ 1919 sc->malo_tx_th_len = roundup(sizeof(sc->malo_tx_th), sizeof(uint32_t)); 1920 sc->malo_tx_th.wt_ihdr.it_len = htole16(sc->malo_tx_th_len); 1921 sc->malo_tx_th.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT); 1922 1923 sc->malo_rx_th_len = roundup(sizeof(sc->malo_rx_th), sizeof(uint32_t)); 1924 sc->malo_rx_th.wr_ihdr.it_len = htole16(sc->malo_rx_th_len); 1925 sc->malo_rx_th.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT); 1926 } 1927 1928 static void 1929 malo_sysctlattach(struct malo_softc *sc) 1930 { 1931 #ifdef MALO_DEBUG 1932 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1933 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1934 1935 sc->malo_debug = malo_debug; 1936 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1937 "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1938 "control debugging printfs"); 1939 #endif 1940 } 1941 1942 static void 1943 malo_announce(struct malo_softc *sc) 1944 { 1945 struct ifnet *ifp = sc->malo_ifp; 1946 1947 if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1948 sc->malo_hwspecs.hwversion, 1949 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1950 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1951 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1952 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1953 sc->malo_hwspecs.regioncode); 1954 1955 if (bootverbose || malo_rxbuf != MALO_RXBUF) 1956 if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1957 if (bootverbose || malo_txbuf != MALO_TXBUF) 1958 if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1959 } 1960 1961 /* 1962 * Convert net80211 channel to a HAL channel. 1963 */ 1964 static void 1965 malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1966 { 1967 hc->channel = chan->ic_ieee; 1968 1969 *(uint32_t *)&hc->flags = 0; 1970 if (IEEE80211_IS_CHAN_2GHZ(chan)) 1971 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1972 } 1973 1974 /* 1975 * Set/change channels. If the channel is really being changed, 1976 * it's done by reseting the chip. To accomplish this we must 1977 * first cleanup any pending DMA, then restart stuff after a la 1978 * malo_init. 1979 */ 1980 static int 1981 malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1982 { 1983 struct malo_hal *mh = sc->malo_mh; 1984 struct malo_hal_channel hchan; 1985 1986 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1987 __func__, chan->ic_freq, chan->ic_flags); 1988 1989 /* 1990 * Convert to a HAL channel description with the flags constrained 1991 * to reflect the current operating mode. 1992 */ 1993 malo_mapchan(&hchan, chan); 1994 malo_hal_intrset(mh, 0); /* disable interrupts */ 1995 malo_hal_setchannel(mh, &hchan); 1996 malo_hal_settxpower(mh, &hchan); 1997 1998 /* 1999 * Update internal state. 2000 */ 2001 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 2002 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 2003 if (IEEE80211_IS_CHAN_ANYG(chan)) { 2004 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 2005 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 2006 } else { 2007 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 2008 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 2009 } 2010 sc->malo_curchan = hchan; 2011 malo_hal_intrset(mh, sc->malo_imask); 2012 2013 return 0; 2014 } 2015 2016 static void 2017 malo_scan_start(struct ieee80211com *ic) 2018 { 2019 struct ifnet *ifp = ic->ic_ifp; 2020 struct malo_softc *sc = ifp->if_softc; 2021 2022 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2023 } 2024 2025 static void 2026 malo_scan_end(struct ieee80211com *ic) 2027 { 2028 struct ifnet *ifp = ic->ic_ifp; 2029 struct malo_softc *sc = ifp->if_softc; 2030 2031 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2032 } 2033 2034 static void 2035 malo_set_channel(struct ieee80211com *ic) 2036 { 2037 struct ifnet *ifp = ic->ic_ifp; 2038 struct malo_softc *sc = ifp->if_softc; 2039 2040 (void) malo_chan_set(sc, ic->ic_curchan); 2041 } 2042 2043 static void 2044 malo_rx_proc(void *arg, int npending) 2045 { 2046 #define IEEE80211_DIR_DSTODS(wh) \ 2047 ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2048 IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2049 struct malo_softc *sc = arg; 2050 struct ifnet *ifp = sc->malo_ifp; 2051 struct ieee80211com *ic = ifp->if_l2com; 2052 struct malo_rxbuf *bf; 2053 struct malo_rxdesc *ds; 2054 struct mbuf *m, *mnew; 2055 struct ieee80211_qosframe *wh; 2056 struct ieee80211_qosframe_addr4 *wh4; 2057 struct ieee80211_node *ni; 2058 int off, len, hdrlen, pktlen, rssi, ntodo; 2059 uint8_t *data, status; 2060 uint32_t readptr, writeptr; 2061 2062 DPRINTF(sc, MALO_DEBUG_RX_PROC, 2063 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2064 __func__, npending, 2065 sc->malo_hwspecs.rxdesc_read, 2066 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2067 sc->malo_hwspecs.rxdesc_write, 2068 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2069 2070 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2071 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2072 if (readptr == writeptr) 2073 return; 2074 2075 bf = sc->malo_rxnext; 2076 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2077 if (bf == NULL) { 2078 bf = STAILQ_FIRST(&sc->malo_rxbuf); 2079 break; 2080 } 2081 ds = bf->bf_desc; 2082 if (bf->bf_m == NULL) { 2083 /* 2084 * If data allocation failed previously there 2085 * will be no buffer; try again to re-populate it. 2086 * Note the firmware will not advance to the next 2087 * descriptor with a dma buffer so we must mimic 2088 * this or we'll get out of sync. 2089 */ 2090 DPRINTF(sc, MALO_DEBUG_ANY, 2091 "%s: rx buf w/o dma memory\n", __func__); 2092 (void)malo_rxbuf_init(sc, bf); 2093 break; 2094 } 2095 MALO_RXDESC_SYNC(sc, ds, 2096 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2097 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2098 break; 2099 2100 readptr = le32toh(ds->physnext); 2101 2102 #ifdef MALO_DEBUG 2103 if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2104 malo_printrxbuf(bf, 0); 2105 #endif 2106 status = ds->status; 2107 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2108 ifp->if_ierrors++; 2109 goto rx_next; 2110 } 2111 /* 2112 * Sync the data buffer. 2113 */ 2114 len = le16toh(ds->pktlen); 2115 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2116 BUS_DMASYNC_POSTREAD); 2117 /* 2118 * The 802.11 header is provided all or in part at the front; 2119 * use it to calculate the true size of the header that we'll 2120 * construct below. We use this to figure out where to copy 2121 * payload prior to constructing the header. 2122 */ 2123 m = bf->bf_m; 2124 data = mtod(m, uint8_t *);; 2125 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2126 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2127 2128 /* 2129 * Calculate RSSI. XXX wrong 2130 */ 2131 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2132 if (rssi > 100) 2133 rssi = 100; 2134 2135 pktlen = hdrlen + (len - off); 2136 /* 2137 * NB: we know our frame is at least as large as 2138 * IEEE80211_MIN_LEN because there is a 4-address frame at 2139 * the front. Hence there's no need to vet the packet length. 2140 * If the frame in fact is too small it should be discarded 2141 * at the net80211 layer. 2142 */ 2143 2144 /* XXX don't need mbuf, just dma buffer */ 2145 mnew = malo_getrxmbuf(sc, bf); 2146 if (mnew == NULL) { 2147 ifp->if_ierrors++; 2148 goto rx_next; 2149 } 2150 /* 2151 * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2152 * re-setup the rx descriptor using the replacement dma 2153 * buffer we just installed above. 2154 */ 2155 bf->bf_m = mnew; 2156 m->m_data += off - hdrlen; 2157 m->m_pkthdr.len = m->m_len = pktlen; 2158 m->m_pkthdr.rcvif = ifp; 2159 2160 /* 2161 * Piece 802.11 header together. 2162 */ 2163 wh = mtod(m, struct ieee80211_qosframe *); 2164 /* NB: don't need to do this sometimes but ... */ 2165 /* XXX special case so we can memcpy after m_devget? */ 2166 ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2167 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2168 if (IEEE80211_DIR_DSTODS(wh)) { 2169 wh4 = mtod(m, 2170 struct ieee80211_qosframe_addr4*); 2171 *(uint16_t *)wh4->i_qos = ds->qosctrl; 2172 } else { 2173 *(uint16_t *)wh->i_qos = ds->qosctrl; 2174 } 2175 } 2176 if (sc->malo_drvbpf != NULL) { 2177 sc->malo_rx_th.wr_flags = 0; 2178 sc->malo_rx_th.wr_rate = ds->rate; 2179 sc->malo_rx_th.wr_antsignal = rssi; 2180 sc->malo_rx_th.wr_antnoise = ds->nf; 2181 2182 bpf_mtap2(ifp->if_bpf, &sc->malo_rx_th, 2183 sc->malo_rx_th_len, m); 2184 } 2185 #ifdef MALO_DEBUG 2186 if (IFF_DUMPPKTS_RECV(sc, wh)) { 2187 ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2188 len, ds->rate, rssi); 2189 } 2190 #endif 2191 ifp->if_ipackets++; 2192 2193 /* dispatch */ 2194 ni = ieee80211_find_rxnode(ic, 2195 (struct ieee80211_frame_min *)wh); 2196 if (ni != NULL) { 2197 (void) ieee80211_input(ni, m, rssi, ds->nf, 0); 2198 ieee80211_free_node(ni); 2199 } else 2200 (void) ieee80211_input_all(ic, m, rssi, ds->nf, 0); 2201 rx_next: 2202 /* NB: ignore ENOMEM so we process more descriptors */ 2203 (void) malo_rxbuf_init(sc, bf); 2204 bf = STAILQ_NEXT(bf, bf_list); 2205 } 2206 2207 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2208 sc->malo_rxnext = bf; 2209 2210 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2211 !IFQ_IS_EMPTY(&ifp->if_snd)) 2212 malo_start(ifp); 2213 #undef IEEE80211_DIR_DSTODS 2214 } 2215 2216 static void 2217 malo_stop(struct ifnet *ifp, int disable) 2218 { 2219 struct malo_softc *sc = ifp->if_softc; 2220 2221 MALO_LOCK(sc); 2222 malo_stop_locked(ifp, disable); 2223 MALO_UNLOCK(sc); 2224 } 2225 2226 /* 2227 * Reclaim all tx queue resources. 2228 */ 2229 static void 2230 malo_tx_cleanup(struct malo_softc *sc) 2231 { 2232 int i; 2233 2234 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2235 malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2236 } 2237 2238 int 2239 malo_detach(struct malo_softc *sc) 2240 { 2241 struct ifnet *ifp = sc->malo_ifp; 2242 struct ieee80211com *ic = ifp->if_l2com; 2243 2244 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2245 __func__, ifp->if_flags); 2246 2247 malo_stop(ifp, 1); 2248 2249 if (sc->malo_tq != NULL) { 2250 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2251 taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2252 taskqueue_free(sc->malo_tq); 2253 sc->malo_tq = NULL; 2254 } 2255 2256 bpfdetach(ifp); 2257 2258 /* 2259 * NB: the order of these is important: 2260 * o call the 802.11 layer before detaching the hal to 2261 * insure callbacks into the driver to delete global 2262 * key cache entries can be handled 2263 * o reclaim the tx queue data structures after calling 2264 * the 802.11 layer as we'll get called back to reclaim 2265 * node state and potentially want to use them 2266 * o to cleanup the tx queues the hal is called, so detach 2267 * it last 2268 * Other than that, it's straightforward... 2269 */ 2270 ieee80211_ifdetach(ic); 2271 malo_dma_cleanup(sc); 2272 malo_tx_cleanup(sc); 2273 malo_hal_detach(sc->malo_mh); 2274 if_free(ifp); 2275 2276 MALO_LOCK_DESTROY(sc); 2277 2278 return 0; 2279 } 2280 2281 void 2282 malo_shutdown(struct malo_softc *sc) 2283 { 2284 malo_stop(sc->malo_ifp, 1); 2285 } 2286 2287 void 2288 malo_suspend(struct malo_softc *sc) 2289 { 2290 struct ifnet *ifp = sc->malo_ifp; 2291 2292 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2293 __func__, ifp->if_flags); 2294 2295 malo_stop(ifp, 1); 2296 } 2297 2298 void 2299 malo_resume(struct malo_softc *sc) 2300 { 2301 struct ifnet *ifp = sc->malo_ifp; 2302 2303 DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2304 __func__, ifp->if_flags); 2305 2306 if (ifp->if_flags & IFF_UP) 2307 malo_init(sc); 2308 } 2309