1 /****************************************************************************** 2 3 Copyright (c) 2013-2014, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXL_H_ 37 #define _IXL_H_ 38 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/buf_ring.h> 43 #include <sys/mbuf.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/module.h> 49 #include <sys/sockio.h> 50 #include <sys/eventhandler.h> 51 52 #include <net/if.h> 53 #include <net/if_var.h> 54 #include <net/if_arp.h> 55 #include <net/bpf.h> 56 #include <net/ethernet.h> 57 #include <net/if_dl.h> 58 #include <net/if_media.h> 59 60 #include <net/bpf.h> 61 #include <net/if_types.h> 62 #include <net/if_vlan_var.h> 63 64 #include <netinet/in_systm.h> 65 #include <netinet/in.h> 66 #include <netinet/if_ether.h> 67 #include <netinet/ip.h> 68 #include <netinet/ip6.h> 69 #include <netinet/tcp.h> 70 #include <netinet/tcp_lro.h> 71 #include <netinet/udp.h> 72 #include <netinet/sctp.h> 73 74 #include <machine/in_cksum.h> 75 76 #include <sys/bus.h> 77 #include <machine/bus.h> 78 #include <sys/rman.h> 79 #include <machine/resource.h> 80 #include <vm/vm.h> 81 #include <vm/pmap.h> 82 #include <machine/clock.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/pcireg.h> 85 #include <sys/proc.h> 86 #include <sys/sysctl.h> 87 #include <sys/endian.h> 88 #include <sys/taskqueue.h> 89 #include <sys/pcpu.h> 90 #include <sys/smp.h> 91 #include <machine/smp.h> 92 93 #include "i40e_type.h" 94 #include "i40e_prototype.h" 95 96 #ifdef IXL_DEBUG 97 #include <sys/sbuf.h> 98 99 #define MAC_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x" 100 #define MAC_FORMAT_ARGS(mac_addr) \ 101 (mac_addr)[0], (mac_addr)[1], (mac_addr)[2], (mac_addr)[3], \ 102 (mac_addr)[4], (mac_addr)[5] 103 #define ON_OFF_STR(is_set) ((is_set) ? "On" : "Off") 104 105 106 #define _DBG_PRINTF(S, ...) printf("%s: " S "\n", __func__, ##__VA_ARGS__) 107 #define _DEV_DBG_PRINTF(dev, S, ...) device_printf(dev, "%s: " S "\n", __func__, ##__VA_ARGS__) 108 #define _IF_DBG_PRINTF(ifp, S, ...) if_printf(ifp, "%s: " S "\n", __func__, ##__VA_ARGS__) 109 110 /* Defines for printing generic debug information */ 111 #define DPRINTF(...) _DBG_PRINTF(__VA_ARGS__) 112 #define DDPRINTF(...) _DEV_DBG_PRINTF(__VA_ARGS__) 113 #define IDPRINTF(...) _IF_DBG_PRINTF(__VA_ARGS__) 114 115 /* Defines for printing specific debug information */ 116 #define DEBUG_INIT 1 117 #define DEBUG_IOCTL 1 118 #define DEBUG_HW 1 119 120 #define INIT_DEBUGOUT(...) if (DEBUG_INIT) _DBG_PRINTF(__VA_ARGS__) 121 #define INIT_DBG_DEV(...) if (DEBUG_INIT) _DEV_DBG_PRINTF(__VA_ARGS__) 122 #define INIT_DBG_IF(...) if (DEBUG_INIT) _IF_DBG_PRINTF(__VA_ARGS__) 123 124 #define IOCTL_DEBUGOUT(...) if (DEBUG_IOCTL) _DBG_PRINTF(__VA_ARGS__) 125 #define IOCTL_DBG_IF2(ifp, S, ...) if (DEBUG_IOCTL) \ 126 if_printf(ifp, S "\n", ##__VA_ARGS__) 127 #define IOCTL_DBG_IF(...) if (DEBUG_IOCTL) _IF_DBG_PRINTF(__VA_ARGS__) 128 129 #define HW_DEBUGOUT(...) if (DEBUG_HW) _DBG_PRINTF(__VA_ARGS__) 130 131 #else 132 #define DEBUG_INIT 0 133 #define DEBUG_IOCTL 0 134 #define DEBUG_HW 0 135 136 #define DPRINTF(...) 137 #define DDPRINTF(...) 138 #define IDPRINTF(...) 139 140 #define INIT_DEBUGOUT(...) 141 #define INIT_DBG_DEV(...) 142 #define INIT_DBG_IF(...) 143 #define IOCTL_DEBUGOUT(...) 144 #define IOCTL_DBG_IF2(...) 145 #define IOCTL_DBG_IF(...) 146 #define HW_DEBUGOUT(...) 147 #endif 148 149 /* Tunables */ 150 151 /* 152 * Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the 153 * number of tx/rx descriptors allocated by the driver. Increasing this 154 * value allows the driver to queue more operations. Each descriptor is 16 155 * or 32 bytes (configurable in FVL) 156 */ 157 #define DEFAULT_RING 1024 158 #define PERFORM_RING 2048 159 #define MAX_RING 4096 160 #define MIN_RING 32 161 162 /* 163 ** Default number of entries in Tx queue buf_ring. 164 */ 165 #define DEFAULT_TXBRSZ (4096 * 4096) 166 167 /* Alignment for rings */ 168 #define DBA_ALIGN 128 169 170 /* 171 * This parameter controls the maximum no of times the driver will loop in 172 * the isr. Minimum Value = 1 173 */ 174 #define MAX_LOOP 10 175 176 /* 177 * This is the max watchdog interval, ie. the time that can 178 * pass between any two TX clean operations, such only happening 179 * when the TX hardware is functioning. 180 */ 181 #define IXL_WATCHDOG (10 * hz) 182 183 /* 184 * This parameters control when the driver calls the routine to reclaim 185 * transmit descriptors. 186 */ 187 #define IXL_TX_CLEANUP_THRESHOLD (que->num_desc / 8) 188 #define IXL_TX_OP_THRESHOLD (que->num_desc / 32) 189 190 /* Flow control constants */ 191 #define IXL_FC_PAUSE 0xFFFF 192 #define IXL_FC_HI 0x20000 193 #define IXL_FC_LO 0x10000 194 195 #define MAX_MULTICAST_ADDR 128 196 197 #define IXL_BAR 3 198 #define IXL_ADM_LIMIT 2 199 #define IXL_TSO_SIZE 65535 200 #define IXL_TX_BUF_SZ ((u32) 1514) 201 #define IXL_AQ_BUF_SZ ((u32) 4096) 202 #define IXL_RX_HDR 128 203 #define IXL_AQ_LEN 256 204 #define IXL_AQ_BUFSZ 4096 205 #define IXL_RX_LIMIT 512 206 #define IXL_RX_ITR 0 207 #define IXL_TX_ITR 1 208 #define IXL_ITR_NONE 3 209 #define IXL_QUEUE_EOL 0x7FF 210 #define IXL_MAX_FRAME 0x2600 211 #define IXL_MAX_TX_SEGS 8 212 #define IXL_MAX_TSO_SEGS 66 213 #define IXL_SPARSE_CHAIN 6 214 #define IXL_QUEUE_HUNG 0x80000000 215 216 /* ERJ: hardware can support ~1.5k filters between all functions */ 217 #define IXL_MAX_FILTERS 256 218 #define IXL_MAX_TX_BUSY 10 219 220 #define IXL_NVM_VERSION_LO_SHIFT 0 221 #define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) 222 #define IXL_NVM_VERSION_HI_SHIFT 12 223 #define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) 224 225 226 /* 227 * Interrupt Moderation parameters 228 */ 229 #define IXL_MAX_ITR 0x07FF 230 #define IXL_ITR_100K 0x0005 231 #define IXL_ITR_20K 0x0019 232 #define IXL_ITR_8K 0x003E 233 #define IXL_ITR_4K 0x007A 234 #define IXL_ITR_DYNAMIC 0x8000 235 #define IXL_LOW_LATENCY 0 236 #define IXL_AVE_LATENCY 1 237 #define IXL_BULK_LATENCY 2 238 239 /* MacVlan Flags */ 240 #define IXL_FILTER_USED (u16)(1 << 0) 241 #define IXL_FILTER_VLAN (u16)(1 << 1) 242 #define IXL_FILTER_ADD (u16)(1 << 2) 243 #define IXL_FILTER_DEL (u16)(1 << 3) 244 #define IXL_FILTER_MC (u16)(1 << 4) 245 246 /* used in the vlan field of the filter when not a vlan */ 247 #define IXL_VLAN_ANY -1 248 249 #define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 250 #define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6) 251 #define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO) 252 253 /* Misc flags for ixl_vsi.flags */ 254 #define IXL_FLAGS_KEEP_TSO4 (1 << 0) 255 #define IXL_FLAGS_KEEP_TSO6 (1 << 1) 256 257 #define IXL_TX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 258 #define IXL_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 259 #define IXL_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 260 #define IXL_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->mtx) 261 #define IXL_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 262 263 #define IXL_RX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 264 #define IXL_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 265 #define IXL_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 266 267 /* 268 ***************************************************************************** 269 * vendor_info_array 270 * 271 * This array contains the list of Subvendor/Subdevice IDs on which the driver 272 * should load. 273 * 274 ***************************************************************************** 275 */ 276 typedef struct _ixl_vendor_info_t { 277 unsigned int vendor_id; 278 unsigned int device_id; 279 unsigned int subvendor_id; 280 unsigned int subdevice_id; 281 unsigned int index; 282 } ixl_vendor_info_t; 283 284 285 struct ixl_tx_buf { 286 u32 eop_index; 287 struct mbuf *m_head; 288 bus_dmamap_t map; 289 bus_dma_tag_t tag; 290 }; 291 292 struct ixl_rx_buf { 293 struct mbuf *m_head; 294 struct mbuf *m_pack; 295 struct mbuf *fmp; 296 bus_dmamap_t hmap; 297 bus_dmamap_t pmap; 298 }; 299 300 /* 301 ** This struct has multiple uses, multicast 302 ** addresses, vlans, and mac filters all use it. 303 */ 304 struct ixl_mac_filter { 305 SLIST_ENTRY(ixl_mac_filter) next; 306 u8 macaddr[ETHER_ADDR_LEN]; 307 s16 vlan; 308 u16 flags; 309 }; 310 311 312 /* 313 * The Transmit ring control struct 314 */ 315 struct tx_ring { 316 struct ixl_queue *que; 317 struct mtx mtx; 318 u32 tail; 319 struct i40e_tx_desc *base; 320 struct i40e_dma_mem dma; 321 u16 next_avail; 322 u16 next_to_clean; 323 u16 atr_rate; 324 u16 atr_count; 325 u16 itr; 326 u16 latency; 327 struct ixl_tx_buf *buffers; 328 volatile u16 avail; 329 u32 cmd; 330 bus_dma_tag_t tx_tag; 331 bus_dma_tag_t tso_tag; 332 char mtx_name[16]; 333 struct buf_ring *br; 334 335 /* Used for Dynamic ITR calculation */ 336 u32 packets; 337 u32 bytes; 338 339 /* Soft Stats */ 340 u64 tx_bytes; 341 u64 no_desc; 342 u64 total_packets; 343 }; 344 345 346 /* 347 * The Receive ring control struct 348 */ 349 struct rx_ring { 350 struct ixl_queue *que; 351 struct mtx mtx; 352 union i40e_rx_desc *base; 353 struct i40e_dma_mem dma; 354 struct lro_ctrl lro; 355 bool lro_enabled; 356 bool hdr_split; 357 bool discard; 358 u16 next_refresh; 359 u16 next_check; 360 u16 itr; 361 u16 latency; 362 char mtx_name[16]; 363 struct ixl_rx_buf *buffers; 364 u32 mbuf_sz; 365 u32 tail; 366 bus_dma_tag_t htag; 367 bus_dma_tag_t ptag; 368 369 /* Used for Dynamic ITR calculation */ 370 u32 packets; 371 u32 bytes; 372 373 /* Soft stats */ 374 u64 split; 375 u64 rx_packets; 376 u64 rx_bytes; 377 u64 discarded; 378 u64 not_done; 379 }; 380 381 /* 382 ** Driver queue struct: this is the interrupt container 383 ** for the associated tx and rx ring pair. 384 */ 385 struct ixl_queue { 386 struct ixl_vsi *vsi; 387 u32 me; 388 u32 msix; /* This queue's MSIX vector */ 389 u32 eims; /* This queue's EIMS bit */ 390 struct resource *res; 391 void *tag; 392 int num_desc; /* both tx and rx */ 393 int busy; 394 struct tx_ring txr; 395 struct rx_ring rxr; 396 struct task task; 397 struct task tx_task; 398 struct taskqueue *tq; 399 400 /* Queue stats */ 401 u64 irqs; 402 u64 tso; 403 u64 mbuf_defrag_failed; 404 u64 mbuf_hdr_failed; 405 u64 mbuf_pkt_failed; 406 u64 tx_map_avail; 407 u64 tx_dma_setup; 408 u64 dropped_pkts; 409 }; 410 411 /* 412 ** Virtual Station interface: 413 ** there would be one of these per traffic class/type 414 ** for now just one, and its embedded in the pf 415 */ 416 SLIST_HEAD(ixl_ftl_head, ixl_mac_filter); 417 struct ixl_vsi { 418 void *back; 419 struct ifnet *ifp; 420 struct device *dev; 421 struct i40e_hw *hw; 422 struct ifmedia media; 423 u64 que_mask; 424 int id; 425 u16 msix_base; /* station base MSIX vector */ 426 u16 num_queues; 427 u16 rx_itr_setting; 428 u16 tx_itr_setting; 429 struct ixl_queue *queues; /* head of queues */ 430 bool link_active; 431 u16 seid; 432 u16 max_frame_size; 433 u32 link_speed; 434 bool link_up; 435 u32 fc; /* local flow ctrl setting */ 436 437 /* MAC/VLAN Filter list */ 438 struct ixl_ftl_head ftl; 439 440 struct i40e_aqc_vsi_properties_data info; 441 442 eventhandler_tag vlan_attach; 443 eventhandler_tag vlan_detach; 444 u16 num_vlans; 445 446 /* Per-VSI stats from hardware */ 447 struct i40e_eth_stats eth_stats; 448 struct i40e_eth_stats eth_stats_offsets; 449 bool stat_offsets_loaded; 450 451 /* Driver statistics */ 452 u64 hw_filters_del; 453 u64 hw_filters_add; 454 455 /* Misc. */ 456 u64 active_queues; 457 u64 flags; 458 }; 459 460 /* 461 ** Find the number of unrefreshed RX descriptors 462 */ 463 static inline u16 464 ixl_rx_unrefreshed(struct ixl_queue *que) 465 { 466 struct rx_ring *rxr = &que->rxr; 467 468 if (rxr->next_check > rxr->next_refresh) 469 return (rxr->next_check - rxr->next_refresh - 1); 470 else 471 return ((que->num_desc + rxr->next_check) - 472 rxr->next_refresh - 1); 473 } 474 475 /* 476 ** Find the next available unused filter 477 */ 478 static inline struct ixl_mac_filter * 479 ixl_get_filter(struct ixl_vsi *vsi) 480 { 481 struct ixl_mac_filter *f; 482 483 /* create a new empty filter */ 484 f = malloc(sizeof(struct ixl_mac_filter), 485 M_DEVBUF, M_NOWAIT | M_ZERO); 486 SLIST_INSERT_HEAD(&vsi->ftl, f, next); 487 488 return (f); 489 } 490 491 /* 492 ** Compare two ethernet addresses 493 */ 494 static inline bool 495 cmp_etheraddr(u8 *ea1, u8 *ea2) 496 { 497 bool cmp = FALSE; 498 499 if ((ea1[0] == ea2[0]) && (ea1[1] == ea2[1]) && 500 (ea1[2] == ea2[2]) && (ea1[3] == ea2[3]) && 501 (ea1[4] == ea2[4]) && (ea1[5] == ea2[5])) 502 cmp = TRUE; 503 504 return (cmp); 505 } 506 507 /* 508 * Info for stats sysctls 509 */ 510 struct ixl_sysctl_info { 511 u64 *stat; 512 char *name; 513 char *description; 514 }; 515 516 extern int ixl_atr_rate; 517 518 /* 519 ** ixl_fw_version_str - format the FW and NVM version strings 520 */ 521 static inline char * 522 ixl_fw_version_str(struct i40e_hw *hw) 523 { 524 static char buf[32]; 525 526 snprintf(buf, sizeof(buf), 527 "f%d.%d a%d.%d n%02x.%02x e%08x", 528 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, 529 hw->aq.api_maj_ver, hw->aq.api_min_ver, 530 (hw->nvm.version & IXL_NVM_VERSION_HI_MASK) >> 531 IXL_NVM_VERSION_HI_SHIFT, 532 (hw->nvm.version & IXL_NVM_VERSION_LO_MASK) >> 533 IXL_NVM_VERSION_LO_SHIFT, 534 hw->nvm.eetrack); 535 return buf; 536 } 537 538 /********************************************************************* 539 * TXRX Function prototypes 540 *********************************************************************/ 541 int ixl_allocate_tx_data(struct ixl_queue *); 542 int ixl_allocate_rx_data(struct ixl_queue *); 543 void ixl_init_tx_ring(struct ixl_queue *); 544 int ixl_init_rx_ring(struct ixl_queue *); 545 bool ixl_rxeof(struct ixl_queue *, int); 546 bool ixl_txeof(struct ixl_queue *); 547 int ixl_mq_start(struct ifnet *, struct mbuf *); 548 int ixl_mq_start_locked(struct ifnet *, struct tx_ring *); 549 void ixl_deferred_mq_start(void *, int); 550 void ixl_qflush(struct ifnet *); 551 void ixl_free_vsi(struct ixl_vsi *); 552 void ixl_free_que_tx(struct ixl_queue *); 553 void ixl_free_que_rx(struct ixl_queue *); 554 #ifdef IXL_FDIR 555 void ixl_atr(struct ixl_queue *, struct tcphdr *, int); 556 #endif 557 558 #endif /* _IXL_H_ */ 559