1 /****************************************************************************** 2 3 Copyright (c) 2013-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 36 #ifndef _IXL_H_ 37 #define _IXL_H_ 38 39 #include "opt_inet.h" 40 #include "opt_inet6.h" 41 #include "opt_rss.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf_ring.h> 46 #include <sys/mbuf.h> 47 #include <sys/protosw.h> 48 #include <sys/socket.h> 49 #include <sys/malloc.h> 50 #include <sys/kernel.h> 51 #include <sys/module.h> 52 #include <sys/sockio.h> 53 #include <sys/eventhandler.h> 54 55 #include <net/if.h> 56 #include <net/if_var.h> 57 #include <net/if_arp.h> 58 #include <net/bpf.h> 59 #include <net/ethernet.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 63 #include <net/bpf.h> 64 #include <net/if_types.h> 65 #include <net/if_vlan_var.h> 66 67 #include <netinet/in_systm.h> 68 #include <netinet/in.h> 69 #include <netinet/if_ether.h> 70 #include <netinet/ip.h> 71 #include <netinet/ip6.h> 72 #include <netinet/tcp.h> 73 #include <netinet/tcp_lro.h> 74 #include <netinet/udp.h> 75 #include <netinet/sctp.h> 76 77 #include <machine/in_cksum.h> 78 79 #include <sys/bus.h> 80 #include <machine/bus.h> 81 #include <sys/rman.h> 82 #include <machine/resource.h> 83 #include <vm/vm.h> 84 #include <vm/pmap.h> 85 #include <machine/clock.h> 86 #include <dev/pci/pcivar.h> 87 #include <dev/pci/pcireg.h> 88 #include <sys/proc.h> 89 #include <sys/sysctl.h> 90 #include <sys/endian.h> 91 #include <sys/taskqueue.h> 92 #include <sys/pcpu.h> 93 #include <sys/smp.h> 94 #include <sys/sbuf.h> 95 #include <machine/smp.h> 96 #include <machine/stdarg.h> 97 98 #ifdef RSS 99 #include <net/rss_config.h> 100 #include <netinet/in_rss.h> 101 #endif 102 103 #include "i40e_type.h" 104 #include "i40e_prototype.h" 105 106 #define MAC_FORMAT "%02x:%02x:%02x:%02x:%02x:%02x" 107 #define MAC_FORMAT_ARGS(mac_addr) \ 108 (mac_addr)[0], (mac_addr)[1], (mac_addr)[2], (mac_addr)[3], \ 109 (mac_addr)[4], (mac_addr)[5] 110 #define ON_OFF_STR(is_set) ((is_set) ? "On" : "Off") 111 112 #ifdef IXL_DEBUG 113 114 #define _DBG_PRINTF(S, ...) printf("%s: " S "\n", __func__, ##__VA_ARGS__) 115 #define _DEV_DBG_PRINTF(dev, S, ...) device_printf(dev, "%s: " S "\n", __func__, ##__VA_ARGS__) 116 #define _IF_DBG_PRINTF(ifp, S, ...) if_printf(ifp, "%s: " S "\n", __func__, ##__VA_ARGS__) 117 118 /* Defines for printing generic debug information */ 119 #define DPRINTF(...) _DBG_PRINTF(__VA_ARGS__) 120 #define DDPRINTF(...) _DEV_DBG_PRINTF(__VA_ARGS__) 121 #define IDPRINTF(...) _IF_DBG_PRINTF(__VA_ARGS__) 122 123 /* Defines for printing specific debug information */ 124 #define DEBUG_INIT 1 125 #define DEBUG_IOCTL 1 126 #define DEBUG_HW 1 127 128 #define INIT_DEBUGOUT(...) if (DEBUG_INIT) _DBG_PRINTF(__VA_ARGS__) 129 #define INIT_DBG_DEV(...) if (DEBUG_INIT) _DEV_DBG_PRINTF(__VA_ARGS__) 130 #define INIT_DBG_IF(...) if (DEBUG_INIT) _IF_DBG_PRINTF(__VA_ARGS__) 131 132 #define IOCTL_DEBUGOUT(...) if (DEBUG_IOCTL) _DBG_PRINTF(__VA_ARGS__) 133 #define IOCTL_DBG_IF2(ifp, S, ...) if (DEBUG_IOCTL) \ 134 if_printf(ifp, S "\n", ##__VA_ARGS__) 135 #define IOCTL_DBG_IF(...) if (DEBUG_IOCTL) _IF_DBG_PRINTF(__VA_ARGS__) 136 137 #define HW_DEBUGOUT(...) if (DEBUG_HW) _DBG_PRINTF(__VA_ARGS__) 138 139 #else /* no IXL_DEBUG */ 140 #define DEBUG_INIT 0 141 #define DEBUG_IOCTL 0 142 #define DEBUG_HW 0 143 144 #define DPRINTF(...) 145 #define DDPRINTF(...) 146 #define IDPRINTF(...) 147 148 #define INIT_DEBUGOUT(...) 149 #define INIT_DBG_DEV(...) 150 #define INIT_DBG_IF(...) 151 #define IOCTL_DEBUGOUT(...) 152 #define IOCTL_DBG_IF2(...) 153 #define IOCTL_DBG_IF(...) 154 #define HW_DEBUGOUT(...) 155 #endif /* IXL_DEBUG */ 156 157 enum ixl_dbg_mask { 158 IXL_DBG_INFO = 0x00000001, 159 IXL_DBG_EN_DIS = 0x00000002, 160 IXL_DBG_AQ = 0x00000004, 161 IXL_DBG_NVMUPD = 0x00000008, 162 163 IXL_DBG_IOCTL_KNOWN = 0x00000010, 164 IXL_DBG_IOCTL_UNKNOWN = 0x00000020, 165 IXL_DBG_IOCTL_ALL = 0x00000030, 166 167 I40E_DEBUG_RSS = 0x00000100, 168 169 IXL_DBG_IOV = 0x00001000, 170 IXL_DBG_IOV_VC = 0x00002000, 171 172 IXL_DBG_SWITCH_INFO = 0x00010000, 173 174 IXL_DBG_ALL = 0xFFFFFFFF 175 }; 176 177 /* Tunables */ 178 179 /* 180 * Ring Descriptors Valid Range: 32-4096 Default Value: 1024 This value is the 181 * number of tx/rx descriptors allocated by the driver. Increasing this 182 * value allows the driver to queue more operations. 183 * 184 * Tx descriptors are always 16 bytes, but Rx descriptors can be 32 bytes. 185 * The driver currently always uses 32 byte Rx descriptors. 186 */ 187 #define DEFAULT_RING 1024 188 #define IXL_MAX_RING 8160 189 #define IXL_MIN_RING 32 190 #define IXL_RING_INCREMENT 32 191 192 #define IXL_AQ_LEN 256 193 #define IXL_AQ_LEN_MAX 1024 194 195 /* 196 ** Default number of entries in Tx queue buf_ring. 197 */ 198 #define DEFAULT_TXBRSZ 4096 199 200 /* Alignment for rings */ 201 #define DBA_ALIGN 128 202 203 /* 204 * This is the max watchdog interval, ie. the time that can 205 * pass between any two TX clean operations, such only happening 206 * when the TX hardware is functioning. 207 */ 208 #define IXL_WATCHDOG (10 * hz) 209 210 /* 211 * This parameters control when the driver calls the routine to reclaim 212 * transmit descriptors. 213 */ 214 #define IXL_TX_CLEANUP_THRESHOLD (que->num_desc / 8) 215 #define IXL_TX_OP_THRESHOLD (que->num_desc / 32) 216 217 #define MAX_MULTICAST_ADDR 128 218 219 #define IXL_BAR 3 220 #define IXL_ADM_LIMIT 2 221 #define IXL_TSO_SIZE 65535 222 #define IXL_AQ_BUF_SZ ((u32) 4096) 223 #define IXL_RX_HDR 128 224 #define IXL_RX_LIMIT 512 225 #define IXL_RX_ITR 0 226 #define IXL_TX_ITR 1 227 #define IXL_ITR_NONE 3 228 #define IXL_QUEUE_EOL 0x7FF 229 #define IXL_MAX_FRAME 9728 230 #define IXL_MAX_TX_SEGS 8 231 #define IXL_MAX_TSO_SEGS 128 232 #define IXL_SPARSE_CHAIN 6 233 #define IXL_QUEUE_HUNG 0x80000000 234 235 #define IXL_RSS_KEY_SIZE_REG 13 236 #define IXL_RSS_KEY_SIZE (IXL_RSS_KEY_SIZE_REG * 4) 237 #define IXL_RSS_VSI_LUT_SIZE 64 /* X722 -> VSI, X710 -> VF */ 238 #define IXL_RSS_VSI_LUT_ENTRY_MASK 0x3F 239 #define IXL_RSS_VF_LUT_ENTRY_MASK 0xF 240 241 #define IXL_VF_MAX_BUFFER 0x3F80 242 #define IXL_VF_MAX_HDR_BUFFER 0x840 243 #define IXL_VF_MAX_FRAME 0x3FFF 244 245 /* ERJ: hardware can support ~2k (SW5+) filters between all functions */ 246 #define IXL_MAX_FILTERS 256 247 #define IXL_MAX_TX_BUSY 10 248 249 #define IXL_NVM_VERSION_LO_SHIFT 0 250 #define IXL_NVM_VERSION_LO_MASK (0xff << IXL_NVM_VERSION_LO_SHIFT) 251 #define IXL_NVM_VERSION_HI_SHIFT 12 252 #define IXL_NVM_VERSION_HI_MASK (0xf << IXL_NVM_VERSION_HI_SHIFT) 253 254 /* 255 * Interrupt Moderation parameters 256 */ 257 #define IXL_MAX_ITR 0x07FF 258 #define IXL_ITR_100K 0x0005 259 #define IXL_ITR_20K 0x0019 260 #define IXL_ITR_8K 0x003E 261 #define IXL_ITR_4K 0x007A 262 #define IXL_ITR_DYNAMIC 0x8000 263 #define IXL_LOW_LATENCY 0 264 #define IXL_AVE_LATENCY 1 265 #define IXL_BULK_LATENCY 2 266 267 /* MacVlan Flags */ 268 #define IXL_FILTER_USED (u16)(1 << 0) 269 #define IXL_FILTER_VLAN (u16)(1 << 1) 270 #define IXL_FILTER_ADD (u16)(1 << 2) 271 #define IXL_FILTER_DEL (u16)(1 << 3) 272 #define IXL_FILTER_MC (u16)(1 << 4) 273 274 /* used in the vlan field of the filter when not a vlan */ 275 #define IXL_VLAN_ANY -1 276 277 #define CSUM_OFFLOAD_IPV4 (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 278 #define CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6|CSUM_UDP_IPV6|CSUM_SCTP_IPV6) 279 #define CSUM_OFFLOAD (CSUM_OFFLOAD_IPV4|CSUM_OFFLOAD_IPV6|CSUM_TSO) 280 281 /* Misc flags for ixl_vsi.flags */ 282 #define IXL_FLAGS_KEEP_TSO4 (1 << 0) 283 #define IXL_FLAGS_KEEP_TSO6 (1 << 1) 284 285 #define IXL_VF_RESET_TIMEOUT 100 286 287 #define IXL_VSI_DATA_PORT 0x01 288 289 #define IXLV_MAX_QUEUES 16 290 #define IXL_MAX_VSI_QUEUES (2 * (I40E_VSILAN_QTABLE_MAX_INDEX + 1)) 291 292 #define IXL_RX_CTX_BASE_UNITS 128 293 #define IXL_TX_CTX_BASE_UNITS 128 294 295 #define IXL_VPINT_LNKLSTN_REG(hw, vector, vf_num) \ 296 I40E_VPINT_LNKLSTN(((vector) - 1) + \ 297 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 298 299 #define IXL_VFINT_DYN_CTLN_REG(hw, vector, vf_num) \ 300 I40E_VFINT_DYN_CTLN(((vector) - 1) + \ 301 (((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num))) 302 303 #define IXL_PF_PCI_CIAA_VF_DEVICE_STATUS 0xAA 304 305 #define IXL_PF_PCI_CIAD_VF_TRANS_PENDING_MASK 0x20 306 307 #define IXL_GLGEN_VFLRSTAT_INDEX(glb_vf) ((glb_vf) / 32) 308 #define IXL_GLGEN_VFLRSTAT_MASK(glb_vf) (1 << ((glb_vf) % 32)) 309 310 #define IXL_MAX_ITR_IDX 3 311 312 #define IXL_END_OF_INTR_LNKLST 0x7FF 313 314 #define IXL_DEFAULT_RSS_HENA (\ 315 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ 316 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ 317 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ 318 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ 319 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ 320 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ 321 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ 322 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ 323 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ 324 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ 325 BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) 326 327 #define IXL_TX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 328 #define IXL_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 329 #define IXL_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 330 #define IXL_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->mtx) 331 #define IXL_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 332 333 #define IXL_RX_LOCK(_sc) mtx_lock(&(_sc)->mtx) 334 #define IXL_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 335 #define IXL_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 336 337 /* Pre-11 counter(9) compatibility */ 338 #if __FreeBSD_version >= 1100036 339 #define IXL_SET_IPACKETS(vsi, count) (vsi)->ipackets = (count) 340 #define IXL_SET_IERRORS(vsi, count) (vsi)->ierrors = (count) 341 #define IXL_SET_OPACKETS(vsi, count) (vsi)->opackets = (count) 342 #define IXL_SET_OERRORS(vsi, count) (vsi)->oerrors = (count) 343 #define IXL_SET_COLLISIONS(vsi, count) /* Do nothing; collisions is always 0. */ 344 #define IXL_SET_IBYTES(vsi, count) (vsi)->ibytes = (count) 345 #define IXL_SET_OBYTES(vsi, count) (vsi)->obytes = (count) 346 #define IXL_SET_IMCASTS(vsi, count) (vsi)->imcasts = (count) 347 #define IXL_SET_OMCASTS(vsi, count) (vsi)->omcasts = (count) 348 #define IXL_SET_IQDROPS(vsi, count) (vsi)->iqdrops = (count) 349 #define IXL_SET_OQDROPS(vsi, count) (vsi)->oqdrops = (count) 350 #define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count) 351 #else 352 #define IXL_SET_IPACKETS(vsi, count) (vsi)->ifp->if_ipackets = (count) 353 #define IXL_SET_IERRORS(vsi, count) (vsi)->ifp->if_ierrors = (count) 354 #define IXL_SET_OPACKETS(vsi, count) (vsi)->ifp->if_opackets = (count) 355 #define IXL_SET_OERRORS(vsi, count) (vsi)->ifp->if_oerrors = (count) 356 #define IXL_SET_COLLISIONS(vsi, count) (vsi)->ifp->if_collisions = (count) 357 #define IXL_SET_IBYTES(vsi, count) (vsi)->ifp->if_ibytes = (count) 358 #define IXL_SET_OBYTES(vsi, count) (vsi)->ifp->if_obytes = (count) 359 #define IXL_SET_IMCASTS(vsi, count) (vsi)->ifp->if_imcasts = (count) 360 #define IXL_SET_OMCASTS(vsi, count) (vsi)->ifp->if_omcasts = (count) 361 #define IXL_SET_IQDROPS(vsi, count) (vsi)->ifp->if_iqdrops = (count) 362 #define IXL_SET_OQDROPS(vsi, odrops) (vsi)->ifp->if_snd.ifq_drops = (odrops) 363 #define IXL_SET_NOPROTO(vsi, count) (vsi)->noproto = (count) 364 #endif 365 366 /* 367 ***************************************************************************** 368 * vendor_info_array 369 * 370 * This array contains the list of Subvendor/Subdevice IDs on which the driver 371 * should load. 372 * 373 ***************************************************************************** 374 */ 375 typedef struct _ixl_vendor_info_t { 376 unsigned int vendor_id; 377 unsigned int device_id; 378 unsigned int subvendor_id; 379 unsigned int subdevice_id; 380 unsigned int index; 381 } ixl_vendor_info_t; 382 383 384 struct ixl_tx_buf { 385 u32 eop_index; 386 struct mbuf *m_head; 387 bus_dmamap_t map; 388 bus_dma_tag_t tag; 389 }; 390 391 struct ixl_rx_buf { 392 struct mbuf *m_head; 393 struct mbuf *m_pack; 394 struct mbuf *fmp; 395 bus_dmamap_t hmap; 396 bus_dmamap_t pmap; 397 }; 398 399 /* 400 ** This struct has multiple uses, multicast 401 ** addresses, vlans, and mac filters all use it. 402 */ 403 struct ixl_mac_filter { 404 SLIST_ENTRY(ixl_mac_filter) next; 405 u8 macaddr[ETHER_ADDR_LEN]; 406 s16 vlan; 407 u16 flags; 408 }; 409 410 /* 411 * The Transmit ring control struct 412 */ 413 struct tx_ring { 414 struct ixl_queue *que; 415 struct mtx mtx; 416 u32 tail; 417 struct i40e_tx_desc *base; 418 struct i40e_dma_mem dma; 419 u16 next_avail; 420 u16 next_to_clean; 421 u16 atr_rate; 422 u16 atr_count; 423 u32 itr; 424 u32 latency; 425 struct ixl_tx_buf *buffers; 426 volatile u16 avail; 427 u32 cmd; 428 bus_dma_tag_t tx_tag; 429 bus_dma_tag_t tso_tag; 430 char mtx_name[16]; 431 struct buf_ring *br; 432 433 /* Used for Dynamic ITR calculation */ 434 u32 packets; 435 u32 bytes; 436 437 /* Soft Stats */ 438 u64 tx_bytes; 439 u64 no_desc; 440 u64 total_packets; 441 }; 442 443 444 /* 445 * The Receive ring control struct 446 */ 447 struct rx_ring { 448 struct ixl_queue *que; 449 struct mtx mtx; 450 union i40e_rx_desc *base; 451 struct i40e_dma_mem dma; 452 struct lro_ctrl lro; 453 bool lro_enabled; 454 bool hdr_split; 455 bool discard; 456 u32 next_refresh; 457 u32 next_check; 458 u32 itr; 459 u32 latency; 460 char mtx_name[16]; 461 struct ixl_rx_buf *buffers; 462 u32 mbuf_sz; 463 u32 tail; 464 bus_dma_tag_t htag; 465 bus_dma_tag_t ptag; 466 467 /* Used for Dynamic ITR calculation */ 468 u32 packets; 469 u32 bytes; 470 471 /* Soft stats */ 472 u64 split; 473 u64 rx_packets; 474 u64 rx_bytes; 475 u64 desc_errs; 476 u64 not_done; 477 }; 478 479 /* 480 ** Driver queue struct: this is the interrupt container 481 ** for the associated tx and rx ring pair. 482 */ 483 struct ixl_queue { 484 struct ixl_vsi *vsi; 485 u32 me; 486 u32 msix; /* This queue's MSIX vector */ 487 u32 eims; /* This queue's EIMS bit */ 488 struct resource *res; 489 void *tag; 490 int num_desc; /* both tx and rx */ 491 int busy; 492 struct tx_ring txr; 493 struct rx_ring rxr; 494 struct task task; 495 struct task tx_task; 496 struct taskqueue *tq; 497 498 /* Queue stats */ 499 u64 irqs; 500 u64 tso; 501 u64 mbuf_defrag_failed; 502 u64 mbuf_hdr_failed; 503 u64 mbuf_pkt_failed; 504 u64 tx_dmamap_failed; 505 u64 dropped_pkts; 506 }; 507 508 /* 509 ** Virtual Station Interface 510 */ 511 SLIST_HEAD(ixl_ftl_head, ixl_mac_filter); 512 struct ixl_vsi { 513 void *back; 514 struct ifnet *ifp; 515 device_t dev; 516 struct i40e_hw *hw; 517 struct ifmedia media; 518 enum i40e_vsi_type type; 519 int id; 520 u16 num_queues; 521 u32 rx_itr_setting; 522 u32 tx_itr_setting; 523 u16 max_frame_size; 524 525 struct ixl_queue *queues; /* head of queues */ 526 527 u16 vsi_num; 528 bool link_active; 529 u16 seid; 530 u16 uplink_seid; 531 u16 downlink_seid; 532 533 /* MAC/VLAN Filter list */ 534 struct ixl_ftl_head ftl; 535 u16 num_macs; 536 537 /* Contains readylist & stat counter id */ 538 struct i40e_aqc_vsi_properties_data info; 539 540 eventhandler_tag vlan_attach; 541 eventhandler_tag vlan_detach; 542 u16 num_vlans; 543 544 /* Per-VSI stats from hardware */ 545 struct i40e_eth_stats eth_stats; 546 struct i40e_eth_stats eth_stats_offsets; 547 bool stat_offsets_loaded; 548 /* VSI stat counters */ 549 u64 ipackets; 550 u64 ierrors; 551 u64 opackets; 552 u64 oerrors; 553 u64 ibytes; 554 u64 obytes; 555 u64 imcasts; 556 u64 omcasts; 557 u64 iqdrops; 558 u64 oqdrops; 559 u64 noproto; 560 561 /* Driver statistics */ 562 u64 hw_filters_del; 563 u64 hw_filters_add; 564 565 /* Misc. */ 566 u64 active_queues; 567 u64 flags; 568 struct sysctl_oid *vsi_node; 569 }; 570 571 /* 572 ** Find the number of unrefreshed RX descriptors 573 */ 574 static inline u16 575 ixl_rx_unrefreshed(struct ixl_queue *que) 576 { 577 struct rx_ring *rxr = &que->rxr; 578 579 if (rxr->next_check > rxr->next_refresh) 580 return (rxr->next_check - rxr->next_refresh - 1); 581 else 582 return ((que->num_desc + rxr->next_check) - 583 rxr->next_refresh - 1); 584 } 585 586 /* 587 ** Find the next available unused filter 588 */ 589 static inline struct ixl_mac_filter * 590 ixl_get_filter(struct ixl_vsi *vsi) 591 { 592 struct ixl_mac_filter *f; 593 594 /* create a new empty filter */ 595 f = malloc(sizeof(struct ixl_mac_filter), 596 M_DEVBUF, M_NOWAIT | M_ZERO); 597 if (f) 598 SLIST_INSERT_HEAD(&vsi->ftl, f, next); 599 600 return (f); 601 } 602 603 /* 604 ** Compare two ethernet addresses 605 */ 606 static inline bool 607 cmp_etheraddr(const u8 *ea1, const u8 *ea2) 608 { 609 bool cmp = FALSE; 610 611 if ((ea1[0] == ea2[0]) && (ea1[1] == ea2[1]) && 612 (ea1[2] == ea2[2]) && (ea1[3] == ea2[3]) && 613 (ea1[4] == ea2[4]) && (ea1[5] == ea2[5])) 614 cmp = TRUE; 615 616 return (cmp); 617 } 618 619 /* 620 * Return next largest power of 2, unsigned 621 * 622 * Public domain, from Bit Twiddling Hacks 623 */ 624 static inline u32 625 next_power_of_two(u32 n) 626 { 627 n--; 628 n |= n >> 1; 629 n |= n >> 2; 630 n |= n >> 4; 631 n |= n >> 8; 632 n |= n >> 16; 633 n++; 634 635 /* Next power of two > 0 is 1 */ 636 n += (n == 0); 637 638 return (n); 639 } 640 641 /* 642 * Info for stats sysctls 643 */ 644 struct ixl_sysctl_info { 645 u64 *stat; 646 char *name; 647 char *description; 648 }; 649 650 static uint8_t ixl_bcast_addr[ETHER_ADDR_LEN] = 651 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 652 653 /********************************************************************* 654 * TXRX Function prototypes 655 *********************************************************************/ 656 int ixl_allocate_tx_data(struct ixl_queue *); 657 int ixl_allocate_rx_data(struct ixl_queue *); 658 void ixl_init_tx_ring(struct ixl_queue *); 659 int ixl_init_rx_ring(struct ixl_queue *); 660 bool ixl_rxeof(struct ixl_queue *, int); 661 bool ixl_txeof(struct ixl_queue *); 662 void ixl_free_que_tx(struct ixl_queue *); 663 void ixl_free_que_rx(struct ixl_queue *); 664 665 int ixl_mq_start(struct ifnet *, struct mbuf *); 666 int ixl_mq_start_locked(struct ifnet *, struct tx_ring *); 667 void ixl_deferred_mq_start(void *, int); 668 void ixl_free_vsi(struct ixl_vsi *); 669 void ixl_qflush(struct ifnet *); 670 671 /* Common function prototypes between PF/VF driver */ 672 #if __FreeBSD_version >= 1100000 673 uint64_t ixl_get_counter(if_t ifp, ift_counter cnt); 674 #endif 675 void ixl_get_default_rss_key(u32 *); 676 #endif /* _IXL_H_ */ 677