xref: /freebsd/sys/dev/ixl/i40e_osdep.h (revision 59c8e88e72633afbc47a4ace0d2170d00d51f7dc)
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3   Copyright (c) 2013-2018, Intel Corporation
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32 ******************************************************************************/
33 
34 #ifndef _I40E_OSDEP_H_
35 #define _I40E_OSDEP_H_
36 
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/endian.h>
41 #include <sys/mbuf.h>
42 #include <sys/protosw.h>
43 #include <sys/socket.h>
44 #include <sys/malloc.h>
45 #include <sys/kernel.h>
46 #include <sys/bus.h>
47 #include <machine/bus.h>
48 #include <sys/rman.h>
49 #include <machine/resource.h>
50 #include <vm/vm.h>
51 #include <vm/pmap.h>
52 #include <machine/clock.h>
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pcireg.h>
55 
56 #define i40e_usec_delay(x) DELAY(x)
57 #define i40e_msec_delay(x) DELAY(1000 * (x))
58 
59 #define DBG 0
60 #define MSGOUT(S, A, B)     printf(S "\n", A, B)
61 #define DEBUGFUNC(F)        DEBUGOUT(F);
62 #if DBG
63 	#define DEBUGOUT(S)         printf(S "\n")
64 	#define DEBUGOUT1(S,A)      printf(S "\n",A)
65 	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
66 	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
67 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
68 #else
69 	#define DEBUGOUT(S)
70 	#define DEBUGOUT1(S,A)
71 	#define DEBUGOUT2(S,A,B)
72 	#define DEBUGOUT3(S,A,B,C)
73 	#define DEBUGOUT6(S,A,B,C,D,E,F)
74 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
75 #endif
76 
77 /* Remove unused shared code macros */
78 #define UNREFERENCED_PARAMETER(_p)
79 #define UNREFERENCED_1PARAMETER(_p)
80 #define UNREFERENCED_2PARAMETER(_p, _q)
81 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
82 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
83 #define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t)
84 
85 #define STATIC	static
86 #define INLINE  inline
87 
88 #define FALSE               0
89 #define false               0 /* shared code requires this */
90 #define TRUE                1
91 #define true                1
92 #define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
93 #define PCI_COMMAND_REGISTER            PCIR_COMMAND
94 #define ARRAY_SIZE(a)		(sizeof(a) / sizeof((a)[0]))
95 
96 #define i40e_memset(a, b, c, d)  memset((a), (b), (c))
97 #define i40e_memcpy(a, b, c, d)  memcpy((a), (b), (c))
98 
99 #define CPU_TO_LE16(o)	htole16(o)
100 #define CPU_TO_LE32(s)	htole32(s)
101 #define CPU_TO_LE64(h)	htole64(h)
102 #define LE16_TO_CPU(a)	le16toh(a)
103 #define LE32_TO_CPU(c)	le32toh(c)
104 #define LE64_TO_CPU(k)	le64toh(k)
105 
106 #define I40E_NTOHS(a)	ntohs(a)
107 #define I40E_NTOHL(a)	ntohl(a)
108 #define I40E_HTONS(a)	htons(a)
109 #define I40E_HTONL(a)	htonl(a)
110 
111 #define FIELD_SIZEOF(x, y) (sizeof(((x*)0)->y))
112 
113 typedef uint8_t		u8;
114 typedef int8_t		s8;
115 typedef uint16_t	u16;
116 typedef int16_t		s16;
117 typedef uint32_t	u32;
118 typedef int32_t		s32;
119 typedef uint64_t	u64;
120 
121 /* long string relief */
122 typedef enum i40e_status_code i40e_status;
123 
124 #define __le16  u16
125 #define __le32  u32
126 #define __le64  u64
127 #define __be16  u16
128 #define __be32  u32
129 #define __be64  u64
130 
131 /* SW spinlock */
132 struct i40e_spinlock {
133         struct mtx mutex;
134 };
135 
136 #define le16_to_cpu
137 
138 #if defined(__amd64__) || defined(i386)
139 static __inline
140 void prefetch(void *x)
141 {
142 	__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
143 }
144 #else
145 #define	prefetch(x)
146 #endif
147 
148 struct i40e_osdep {
149 	bus_space_tag_t		mem_bus_space_tag;
150 	bus_space_handle_t	mem_bus_space_handle;
151 	bus_size_t		mem_bus_space_size;
152 	uint32_t		flush_reg;
153 	int			i2c_intfc_num;
154 	device_t		dev;
155 };
156 
157 struct i40e_dma_mem {
158 	void			*va;
159 	u64			pa;
160 	bus_dma_tag_t		tag;
161 	bus_dmamap_t		map;
162 	bus_size_t              size;
163 };
164 
165 struct i40e_virt_mem {
166 	void *va;
167 	u32 size;
168 };
169 
170 struct i40e_hw; /* forward decl */
171 u16	i40e_read_pci_cfg(struct i40e_hw *, u32);
172 void	i40e_write_pci_cfg(struct i40e_hw *, u32, u16);
173 
174 /*
175 ** i40e_debug - OS dependent version of shared code debug printing
176 */
177 enum i40e_debug_mask;
178 #define i40e_debug(h, m, s, ...)  i40e_debug_shared(h, m, s, ##__VA_ARGS__)
179 extern void i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask,
180     char *fmt_str, ...);
181 
182 /* Non-busy-wait that uses kern_yield() */
183 void i40e_msec_pause(int);
184 
185 const char * ixl_vc_opcode_str(uint16_t op);
186 
187 /*
188 ** This hardware supports either 16 or 32 byte rx descriptors;
189 ** the driver only uses the 32 byte kind.
190 */
191 #define i40e_rx_desc i40e_32byte_rx_desc
192 
193 static __inline uint32_t
194 rd32_osdep(struct i40e_osdep *osdep, uint32_t reg)
195 {
196 
197 	KASSERT(reg < osdep->mem_bus_space_size,
198 	    ("ixl: register offset %#jx too large (max is %#jx)",
199 	    (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
200 
201 	return (bus_space_read_4(osdep->mem_bus_space_tag,
202 	    osdep->mem_bus_space_handle, reg));
203 }
204 
205 static __inline void
206 wr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value)
207 {
208 
209 	KASSERT(reg < osdep->mem_bus_space_size,
210 	    ("ixl: register offset %#jx too large (max is %#jx)",
211 	    (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
212 
213 	bus_space_write_4(osdep->mem_bus_space_tag,
214 	    osdep->mem_bus_space_handle, reg, value);
215 }
216 
217 static __inline void
218 ixl_flush_osdep(struct i40e_osdep *osdep)
219 {
220 	rd32_osdep(osdep, osdep->flush_reg);
221 }
222 
223 #define rd32(a, reg)		rd32_osdep((a)->back, (reg))
224 #define wr32(a, reg, value)	wr32_osdep((a)->back, (reg), (value))
225 
226 #define rd64(a, reg) (\
227    bus_space_read_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \
228                      ((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \
229                      reg))
230 
231 #define wr64(a, reg, value) (\
232    bus_space_write_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \
233                      ((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \
234                      reg, value))
235 
236 #define ixl_flush(a)		ixl_flush_osdep((a)->back)
237 
238 enum i40e_status_code i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset,
239 					       u16 *data);
240 
241 #endif /* _I40E_OSDEP_H_ */
242