1 /****************************************************************************** 2 3 Copyright (c) 2013-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #include <machine/stdarg.h> 36 37 #include "ixl.h" 38 39 /******************************************************************** 40 * Manage DMA'able memory. 41 *******************************************************************/ 42 static void 43 i40e_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nseg, int error) 44 { 45 if (error) 46 return; 47 *(bus_addr_t *) arg = segs->ds_addr; 48 return; 49 } 50 51 i40e_status 52 i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size) 53 { 54 mem->va = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 55 return(mem->va == NULL); 56 } 57 58 i40e_status 59 i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem) 60 { 61 free(mem->va, M_DEVBUF); 62 return(0); 63 } 64 65 i40e_status 66 i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem, 67 enum i40e_memory_type type __unused, u64 size, u32 alignment) 68 { 69 device_t dev = ((struct i40e_osdep *)hw->back)->dev; 70 int err; 71 72 73 err = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 74 alignment, 0, /* alignment, bounds */ 75 BUS_SPACE_MAXADDR, /* lowaddr */ 76 BUS_SPACE_MAXADDR, /* highaddr */ 77 NULL, NULL, /* filter, filterarg */ 78 size, /* maxsize */ 79 1, /* nsegments */ 80 size, /* maxsegsize */ 81 BUS_DMA_ALLOCNOW, /* flags */ 82 NULL, /* lockfunc */ 83 NULL, /* lockfuncarg */ 84 &mem->tag); 85 if (err != 0) { 86 device_printf(dev, 87 "i40e_allocate_dma: bus_dma_tag_create failed, " 88 "error %u\n", err); 89 goto fail_0; 90 } 91 err = bus_dmamem_alloc(mem->tag, (void **)&mem->va, 92 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &mem->map); 93 if (err != 0) { 94 device_printf(dev, 95 "i40e_allocate_dma: bus_dmamem_alloc failed, " 96 "error %u\n", err); 97 goto fail_1; 98 } 99 err = bus_dmamap_load(mem->tag, mem->map, mem->va, 100 size, 101 i40e_dmamap_cb, 102 &mem->pa, 103 BUS_DMA_NOWAIT); 104 if (err != 0) { 105 device_printf(dev, 106 "i40e_allocate_dma: bus_dmamap_load failed, " 107 "error %u\n", err); 108 goto fail_2; 109 } 110 mem->nseg = 1; 111 mem->size = size; 112 bus_dmamap_sync(mem->tag, mem->map, 113 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 114 return (0); 115 fail_2: 116 bus_dmamem_free(mem->tag, mem->va, mem->map); 117 fail_1: 118 bus_dma_tag_destroy(mem->tag); 119 fail_0: 120 mem->map = NULL; 121 mem->tag = NULL; 122 return (err); 123 } 124 125 i40e_status 126 i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem) 127 { 128 bus_dmamap_sync(mem->tag, mem->map, 129 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 130 bus_dmamap_unload(mem->tag, mem->map); 131 bus_dmamem_free(mem->tag, mem->va, mem->map); 132 bus_dma_tag_destroy(mem->tag); 133 return (0); 134 } 135 136 void 137 i40e_init_spinlock(struct i40e_spinlock *lock) 138 { 139 mtx_init(&lock->mutex, "mutex", 140 MTX_NETWORK_LOCK, MTX_DEF | MTX_DUPOK); 141 } 142 143 void 144 i40e_acquire_spinlock(struct i40e_spinlock *lock) 145 { 146 mtx_lock(&lock->mutex); 147 } 148 149 void 150 i40e_release_spinlock(struct i40e_spinlock *lock) 151 { 152 mtx_unlock(&lock->mutex); 153 } 154 155 void 156 i40e_destroy_spinlock(struct i40e_spinlock *lock) 157 { 158 mtx_destroy(&lock->mutex); 159 } 160 161 /* 162 * Helper function for debug statement printing 163 */ 164 void 165 i40e_debug_d(struct i40e_hw *hw, enum i40e_debug_mask mask, char *fmt, ...) 166 { 167 va_list args; 168 169 if (!(mask & ((struct i40e_hw *)hw)->debug_mask)) 170 return; 171 172 va_start(args, fmt); 173 device_printf(((struct i40e_osdep *)hw->back)->dev, fmt, args); 174 va_end(args); 175 } 176 177 u16 178 i40e_read_pci_cfg(struct i40e_hw *hw, u32 reg) 179 { 180 u16 value; 181 182 value = pci_read_config(((struct i40e_osdep *)hw->back)->dev, 183 reg, 2); 184 185 return (value); 186 } 187 188 void 189 i40e_write_pci_cfg(struct i40e_hw *hw, u32 reg, u16 value) 190 { 191 pci_write_config(((struct i40e_osdep *)hw->back)->dev, 192 reg, value, 2); 193 194 return; 195 } 196 197