xref: /freebsd/sys/dev/ixl/i40e_hmc.h (revision 9f44a47fd07924afc035991af15d84e6585dea4f)
1 /******************************************************************************
2 
3   Copyright (c) 2013-2018, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30   POSSIBILITY OF SUCH DAMAGE.
31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _I40E_HMC_H_
36 #define _I40E_HMC_H_
37 
38 #define I40E_HMC_MAX_BP_COUNT 512
39 
40 /* forward-declare the HW struct for the compiler */
41 struct i40e_hw;
42 
43 #define I40E_HMC_INFO_SIGNATURE		0x484D5347 /* HMSG */
44 #define I40E_HMC_PD_CNT_IN_SD		512
45 #define I40E_HMC_DIRECT_BP_SIZE		0x200000 /* 2M */
46 #define I40E_HMC_PAGED_BP_SIZE		4096
47 #define I40E_HMC_PD_BP_BUF_ALIGNMENT	4096
48 #define I40E_FIRST_VF_FPM_ID		16
49 
50 struct i40e_hmc_obj_info {
51 	u64 base;	/* base addr in FPM */
52 	u32 max_cnt;	/* max count available for this hmc func */
53 	u32 cnt;	/* count of objects driver actually wants to create */
54 	u64 size;	/* size in bytes of one object */
55 };
56 
57 enum i40e_sd_entry_type {
58 	I40E_SD_TYPE_INVALID = 0,
59 	I40E_SD_TYPE_PAGED   = 1,
60 	I40E_SD_TYPE_DIRECT  = 2
61 };
62 
63 struct i40e_hmc_bp {
64 	enum i40e_sd_entry_type entry_type;
65 	struct i40e_dma_mem addr; /* populate to be used by hw */
66 	u32 sd_pd_index;
67 	u32 ref_cnt;
68 };
69 
70 struct i40e_hmc_pd_entry {
71 	struct i40e_hmc_bp bp;
72 	u32 sd_index;
73 	bool rsrc_pg;
74 	bool valid;
75 };
76 
77 struct i40e_hmc_pd_table {
78 	struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
79 	struct i40e_hmc_pd_entry  *pd_entry; /* [512] for sw book keeping */
80 	struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
81 
82 	u32 ref_cnt;
83 	u32 sd_index;
84 };
85 
86 struct i40e_hmc_sd_entry {
87 	enum i40e_sd_entry_type entry_type;
88 	bool valid;
89 
90 	union {
91 		struct i40e_hmc_pd_table pd_table;
92 		struct i40e_hmc_bp bp;
93 	} u;
94 };
95 
96 struct i40e_hmc_sd_table {
97 	struct i40e_virt_mem addr; /* used to track sd_entry allocations */
98 	u32 sd_cnt;
99 	u32 ref_cnt;
100 	struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
101 };
102 
103 struct i40e_hmc_info {
104 	u32 signature;
105 	/* equals to pci func num for PF and dynamically allocated for VFs */
106 	u8 hmc_fn_id;
107 	u16 first_sd_index; /* index of the first available SD */
108 
109 	/* hmc objects */
110 	struct i40e_hmc_obj_info *hmc_obj;
111 	struct i40e_virt_mem hmc_obj_virt_mem;
112 	struct i40e_hmc_sd_table sd_table;
113 };
114 
115 #define I40E_INC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt++)
116 #define I40E_INC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt++)
117 #define I40E_INC_BP_REFCNT(bp)		((bp)->ref_cnt++)
118 
119 #define I40E_DEC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt--)
120 #define I40E_DEC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt--)
121 #define I40E_DEC_BP_REFCNT(bp)		((bp)->ref_cnt--)
122 
123 /**
124  * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
125  * @hw: pointer to our hw struct
126  * @pa: pointer to physical address
127  * @sd_index: segment descriptor index
128  * @type: if sd entry is direct or paged
129  **/
130 #define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type)			\
131 {									\
132 	u32 val1, val2, val3;						\
133 	val1 = (u32)(I40E_HI_DWORD(pa));				\
134 	val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT <<			\
135 		 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
136 		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
137 		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) |			\
138 		BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT);		\
139 	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
140 	wr32((hw), I40E_PFHMC_SDDATAHIGH, val1);			\
141 	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
142 	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
143 }
144 
145 /**
146  * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
147  * @hw: pointer to our hw struct
148  * @sd_index: segment descriptor index
149  * @type: if sd entry is direct or paged
150  **/
151 #define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type)			\
152 {									\
153 	u32 val2, val3;							\
154 	val2 = (I40E_HMC_MAX_BP_COUNT <<				\
155 		I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
156 		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
157 		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT);			\
158 	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
159 	wr32((hw), I40E_PFHMC_SDDATAHIGH, 0);				\
160 	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
161 	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
162 }
163 
164 /**
165  * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
166  * @hw: pointer to our hw struct
167  * @sd_idx: segment descriptor index
168  * @pd_idx: page descriptor index
169  **/
170 #define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx)			\
171 	wr32((hw), I40E_PFHMC_PDINV,					\
172 	    (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) |		\
173 	     ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
174 
175 /**
176  * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
177  * @hmc_info: pointer to the HMC configuration information structure
178  * @type: type of HMC resources we're searching
179  * @index: starting index for the object
180  * @cnt: number of objects we're trying to create
181  * @sd_idx: pointer to return index of the segment descriptor in question
182  * @sd_limit: pointer to return the maximum number of segment descriptors
183  *
184  * This function calculates the segment descriptor index and index limit
185  * for the resource defined by i40e_hmc_rsrc_type.
186  **/
187 #define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
188 {									\
189 	u64 fpm_addr, fpm_limit;					\
190 	fpm_addr = (hmc_info)->hmc_obj[(type)].base +			\
191 		   (hmc_info)->hmc_obj[(type)].size * (index);		\
192 	fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
193 	*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE);		\
194 	*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE);	\
195 	/* add one more to the limit to correct our range */		\
196 	*(sd_limit) += 1;						\
197 }
198 
199 /**
200  * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
201  * @hmc_info: pointer to the HMC configuration information struct
202  * @type: HMC resource type we're examining
203  * @idx: starting index for the object
204  * @cnt: number of objects we're trying to create
205  * @pd_index: pointer to return page descriptor index
206  * @pd_limit: pointer to return page descriptor index limit
207  *
208  * Calculates the page descriptor index and index limit for the resource
209  * defined by i40e_hmc_rsrc_type.
210  **/
211 #define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
212 {									\
213 	u64 fpm_adr, fpm_limit;						\
214 	fpm_adr = (hmc_info)->hmc_obj[(type)].base +			\
215 		  (hmc_info)->hmc_obj[(type)].size * (idx);		\
216 	fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt);	\
217 	*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE);		\
218 	*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE);	\
219 	/* add one more to the limit to correct our range */		\
220 	*(pd_limit) += 1;						\
221 }
222 enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw,
223 					      struct i40e_hmc_info *hmc_info,
224 					      u32 sd_index,
225 					      enum i40e_sd_entry_type type,
226 					      u64 direct_mode_sz);
227 
228 enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw,
229 					      struct i40e_hmc_info *hmc_info,
230 					      u32 pd_index,
231 					      struct i40e_dma_mem *rsrc_pg);
232 enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw,
233 					struct i40e_hmc_info *hmc_info,
234 					u32 idx);
235 enum i40e_status_code i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
236 					     u32 idx);
237 enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw,
238 					    struct i40e_hmc_info *hmc_info,
239 					    u32 idx, bool is_pf);
240 enum i40e_status_code i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
241 					       u32 idx);
242 enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw,
243 					      struct i40e_hmc_info *hmc_info,
244 					      u32 idx, bool is_pf);
245 
246 #endif /* _I40E_HMC_H_ */
247