xref: /freebsd/sys/dev/ixl/i40e_dcb.h (revision f4cc2d1710068319774a27d5c5e7ff85856c9278)
1ceebc2f3SEric Joyner /******************************************************************************
2ceebc2f3SEric Joyner 
3*f4cc2d17SEric Joyner   Copyright (c) 2013-2018, Intel Corporation
4ceebc2f3SEric Joyner   All rights reserved.
5ceebc2f3SEric Joyner 
6ceebc2f3SEric Joyner   Redistribution and use in source and binary forms, with or without
7ceebc2f3SEric Joyner   modification, are permitted provided that the following conditions are met:
8ceebc2f3SEric Joyner 
9ceebc2f3SEric Joyner    1. Redistributions of source code must retain the above copyright notice,
10ceebc2f3SEric Joyner       this list of conditions and the following disclaimer.
11ceebc2f3SEric Joyner 
12ceebc2f3SEric Joyner    2. Redistributions in binary form must reproduce the above copyright
13ceebc2f3SEric Joyner       notice, this list of conditions and the following disclaimer in the
14ceebc2f3SEric Joyner       documentation and/or other materials provided with the distribution.
15ceebc2f3SEric Joyner 
16ceebc2f3SEric Joyner    3. Neither the name of the Intel Corporation nor the names of its
17ceebc2f3SEric Joyner       contributors may be used to endorse or promote products derived from
18ceebc2f3SEric Joyner       this software without specific prior written permission.
19ceebc2f3SEric Joyner 
20ceebc2f3SEric Joyner   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21ceebc2f3SEric Joyner   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22ceebc2f3SEric Joyner   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ceebc2f3SEric Joyner   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24ceebc2f3SEric Joyner   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25ceebc2f3SEric Joyner   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26ceebc2f3SEric Joyner   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27ceebc2f3SEric Joyner   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28ceebc2f3SEric Joyner   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ceebc2f3SEric Joyner   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30ceebc2f3SEric Joyner   POSSIBILITY OF SUCH DAMAGE.
31ceebc2f3SEric Joyner 
32ceebc2f3SEric Joyner ******************************************************************************/
33ceebc2f3SEric Joyner /*$FreeBSD$*/
34ceebc2f3SEric Joyner 
35ceebc2f3SEric Joyner #ifndef _I40E_DCB_H_
36ceebc2f3SEric Joyner #define _I40E_DCB_H_
37ceebc2f3SEric Joyner 
38ceebc2f3SEric Joyner #include "i40e_type.h"
39ceebc2f3SEric Joyner 
40ceebc2f3SEric Joyner #define I40E_DCBX_OFFLOAD_DISABLED	0
41ceebc2f3SEric Joyner #define I40E_DCBX_OFFLOAD_ENABLED	1
42ceebc2f3SEric Joyner 
43ceebc2f3SEric Joyner #define I40E_DCBX_STATUS_NOT_STARTED	0
44ceebc2f3SEric Joyner #define I40E_DCBX_STATUS_IN_PROGRESS	1
45ceebc2f3SEric Joyner #define I40E_DCBX_STATUS_DONE		2
46ceebc2f3SEric Joyner #define I40E_DCBX_STATUS_MULTIPLE_PEERS	3
47ceebc2f3SEric Joyner #define I40E_DCBX_STATUS_DISABLED	7
48ceebc2f3SEric Joyner 
49ceebc2f3SEric Joyner #define I40E_TLV_TYPE_END		0
50ceebc2f3SEric Joyner #define I40E_TLV_TYPE_ORG		127
51ceebc2f3SEric Joyner 
52ceebc2f3SEric Joyner #define I40E_IEEE_8021QAZ_OUI		0x0080C2
53ceebc2f3SEric Joyner #define I40E_IEEE_SUBTYPE_ETS_CFG	9
54ceebc2f3SEric Joyner #define I40E_IEEE_SUBTYPE_ETS_REC	10
55ceebc2f3SEric Joyner #define I40E_IEEE_SUBTYPE_PFC_CFG	11
56ceebc2f3SEric Joyner #define I40E_IEEE_SUBTYPE_APP_PRI	12
57ceebc2f3SEric Joyner 
58ceebc2f3SEric Joyner #define I40E_CEE_DCBX_OUI		0x001b21
59ceebc2f3SEric Joyner #define I40E_CEE_DCBX_TYPE		2
60ceebc2f3SEric Joyner 
61ceebc2f3SEric Joyner #define I40E_CEE_SUBTYPE_CTRL		1
62ceebc2f3SEric Joyner #define I40E_CEE_SUBTYPE_PG_CFG		2
63ceebc2f3SEric Joyner #define I40E_CEE_SUBTYPE_PFC_CFG	3
64ceebc2f3SEric Joyner #define I40E_CEE_SUBTYPE_APP_PRI	4
65ceebc2f3SEric Joyner 
66ceebc2f3SEric Joyner #define I40E_CEE_MAX_FEAT_TYPE		3
67ceebc2f3SEric Joyner #define I40E_LLDP_ADMINSTATUS_DISABLED		0
68ceebc2f3SEric Joyner #define I40E_LLDP_ADMINSTATUS_ENABLED_RX	1
69ceebc2f3SEric Joyner #define I40E_LLDP_ADMINSTATUS_ENABLED_TX	2
70ceebc2f3SEric Joyner #define I40E_LLDP_ADMINSTATUS_ENABLED_RXTX	3
71ceebc2f3SEric Joyner 
72ceebc2f3SEric Joyner /* Defines for LLDP TLV header */
73ceebc2f3SEric Joyner #define I40E_LLDP_MIB_HLEN		14
74ceebc2f3SEric Joyner #define I40E_LLDP_TLV_LEN_SHIFT		0
75ceebc2f3SEric Joyner #define I40E_LLDP_TLV_LEN_MASK		(0x01FF << I40E_LLDP_TLV_LEN_SHIFT)
76ceebc2f3SEric Joyner #define I40E_LLDP_TLV_TYPE_SHIFT	9
77ceebc2f3SEric Joyner #define I40E_LLDP_TLV_TYPE_MASK		(0x7F << I40E_LLDP_TLV_TYPE_SHIFT)
78ceebc2f3SEric Joyner #define I40E_LLDP_TLV_SUBTYPE_SHIFT	0
79ceebc2f3SEric Joyner #define I40E_LLDP_TLV_SUBTYPE_MASK	(0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
80ceebc2f3SEric Joyner #define I40E_LLDP_TLV_OUI_SHIFT		8
81ceebc2f3SEric Joyner #define I40E_LLDP_TLV_OUI_MASK		(0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)
82ceebc2f3SEric Joyner 
83ceebc2f3SEric Joyner /* Defines for IEEE ETS TLV */
84ceebc2f3SEric Joyner #define I40E_IEEE_ETS_MAXTC_SHIFT	0
85ceebc2f3SEric Joyner #define I40E_IEEE_ETS_MAXTC_MASK	(0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
86ceebc2f3SEric Joyner #define I40E_IEEE_ETS_CBS_SHIFT		6
87ceebc2f3SEric Joyner #define I40E_IEEE_ETS_CBS_MASK		BIT(I40E_IEEE_ETS_CBS_SHIFT)
88ceebc2f3SEric Joyner #define I40E_IEEE_ETS_WILLING_SHIFT	7
89ceebc2f3SEric Joyner #define I40E_IEEE_ETS_WILLING_MASK	BIT(I40E_IEEE_ETS_WILLING_SHIFT)
90ceebc2f3SEric Joyner #define I40E_IEEE_ETS_PRIO_0_SHIFT	0
91ceebc2f3SEric Joyner #define I40E_IEEE_ETS_PRIO_0_MASK	(0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
92ceebc2f3SEric Joyner #define I40E_IEEE_ETS_PRIO_1_SHIFT	4
93ceebc2f3SEric Joyner #define I40E_IEEE_ETS_PRIO_1_MASK	(0x7 << I40E_IEEE_ETS_PRIO_1_SHIFT)
94ceebc2f3SEric Joyner #define I40E_CEE_PGID_PRIO_0_SHIFT	0
95ceebc2f3SEric Joyner #define I40E_CEE_PGID_PRIO_0_MASK	(0xF << I40E_CEE_PGID_PRIO_0_SHIFT)
96ceebc2f3SEric Joyner #define I40E_CEE_PGID_PRIO_1_SHIFT	4
97ceebc2f3SEric Joyner #define I40E_CEE_PGID_PRIO_1_MASK	(0xF << I40E_CEE_PGID_PRIO_1_SHIFT)
98ceebc2f3SEric Joyner #define I40E_CEE_PGID_STRICT		15
99ceebc2f3SEric Joyner 
100ceebc2f3SEric Joyner /* Defines for IEEE TSA types */
101ceebc2f3SEric Joyner #define I40E_IEEE_TSA_STRICT		0
102ceebc2f3SEric Joyner #define I40E_IEEE_TSA_CBS		1
103ceebc2f3SEric Joyner #define I40E_IEEE_TSA_ETS		2
104ceebc2f3SEric Joyner #define I40E_IEEE_TSA_VENDOR		255
105ceebc2f3SEric Joyner 
106ceebc2f3SEric Joyner /* Defines for IEEE PFC TLV */
107ceebc2f3SEric Joyner #define I40E_IEEE_PFC_CAP_SHIFT		0
108ceebc2f3SEric Joyner #define I40E_IEEE_PFC_CAP_MASK		(0xF << I40E_IEEE_PFC_CAP_SHIFT)
109ceebc2f3SEric Joyner #define I40E_IEEE_PFC_MBC_SHIFT		6
110ceebc2f3SEric Joyner #define I40E_IEEE_PFC_MBC_MASK		BIT(I40E_IEEE_PFC_MBC_SHIFT)
111ceebc2f3SEric Joyner #define I40E_IEEE_PFC_WILLING_SHIFT	7
112ceebc2f3SEric Joyner #define I40E_IEEE_PFC_WILLING_MASK	BIT(I40E_IEEE_PFC_WILLING_SHIFT)
113ceebc2f3SEric Joyner 
114ceebc2f3SEric Joyner /* Defines for IEEE APP TLV */
115ceebc2f3SEric Joyner #define I40E_IEEE_APP_SEL_SHIFT		0
116ceebc2f3SEric Joyner #define I40E_IEEE_APP_SEL_MASK		(0x7 << I40E_IEEE_APP_SEL_SHIFT)
117ceebc2f3SEric Joyner #define I40E_IEEE_APP_PRIO_SHIFT	5
118ceebc2f3SEric Joyner #define I40E_IEEE_APP_PRIO_MASK		(0x7 << I40E_IEEE_APP_PRIO_SHIFT)
119ceebc2f3SEric Joyner 
120ceebc2f3SEric Joyner /* TLV definitions for preparing MIB */
121ceebc2f3SEric Joyner #define I40E_TLV_ID_CHASSIS_ID		0
122ceebc2f3SEric Joyner #define I40E_TLV_ID_PORT_ID		1
123ceebc2f3SEric Joyner #define I40E_TLV_ID_TIME_TO_LIVE	2
124ceebc2f3SEric Joyner #define I40E_IEEE_TLV_ID_ETS_CFG	3
125ceebc2f3SEric Joyner #define I40E_IEEE_TLV_ID_ETS_REC	4
126ceebc2f3SEric Joyner #define I40E_IEEE_TLV_ID_PFC_CFG	5
127ceebc2f3SEric Joyner #define I40E_IEEE_TLV_ID_APP_PRI	6
128ceebc2f3SEric Joyner #define I40E_TLV_ID_END_OF_LLDPPDU	7
129ceebc2f3SEric Joyner #define I40E_TLV_ID_START		I40E_IEEE_TLV_ID_ETS_CFG
130ceebc2f3SEric Joyner 
131ceebc2f3SEric Joyner #define I40E_IEEE_ETS_TLV_LENGTH	25
132ceebc2f3SEric Joyner #define I40E_IEEE_PFC_TLV_LENGTH	6
133ceebc2f3SEric Joyner #define I40E_IEEE_APP_TLV_LENGTH	11
134ceebc2f3SEric Joyner 
135ceebc2f3SEric Joyner #pragma pack(1)
136ceebc2f3SEric Joyner 
137ceebc2f3SEric Joyner /* IEEE 802.1AB LLDP TLV structure */
138ceebc2f3SEric Joyner struct i40e_lldp_generic_tlv {
139ceebc2f3SEric Joyner 	__be16 typelength;
140ceebc2f3SEric Joyner 	u8 tlvinfo[1];
141ceebc2f3SEric Joyner };
142ceebc2f3SEric Joyner 
143ceebc2f3SEric Joyner /* IEEE 802.1AB LLDP Organization specific TLV */
144ceebc2f3SEric Joyner struct i40e_lldp_org_tlv {
145ceebc2f3SEric Joyner 	__be16 typelength;
146ceebc2f3SEric Joyner 	__be32 ouisubtype;
147ceebc2f3SEric Joyner 	u8 tlvinfo[1];
148ceebc2f3SEric Joyner };
149ceebc2f3SEric Joyner 
150ceebc2f3SEric Joyner struct i40e_cee_tlv_hdr {
151ceebc2f3SEric Joyner 	__be16 typelen;
152ceebc2f3SEric Joyner 	u8 operver;
153ceebc2f3SEric Joyner 	u8 maxver;
154ceebc2f3SEric Joyner };
155ceebc2f3SEric Joyner 
156ceebc2f3SEric Joyner struct i40e_cee_ctrl_tlv {
157ceebc2f3SEric Joyner 	struct i40e_cee_tlv_hdr hdr;
158ceebc2f3SEric Joyner 	__be32 seqno;
159ceebc2f3SEric Joyner 	__be32 ackno;
160ceebc2f3SEric Joyner };
161ceebc2f3SEric Joyner 
162ceebc2f3SEric Joyner struct i40e_cee_feat_tlv {
163ceebc2f3SEric Joyner 	struct i40e_cee_tlv_hdr hdr;
164ceebc2f3SEric Joyner 	u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
165ceebc2f3SEric Joyner #define I40E_CEE_FEAT_TLV_ENABLE_MASK	0x80
166ceebc2f3SEric Joyner #define I40E_CEE_FEAT_TLV_WILLING_MASK	0x40
167ceebc2f3SEric Joyner #define I40E_CEE_FEAT_TLV_ERR_MASK	0x20
168ceebc2f3SEric Joyner 	u8 subtype;
169ceebc2f3SEric Joyner 	u8 tlvinfo[1];
170ceebc2f3SEric Joyner };
171ceebc2f3SEric Joyner 
172ceebc2f3SEric Joyner struct i40e_cee_app_prio {
173ceebc2f3SEric Joyner 	__be16 protocol;
174ceebc2f3SEric Joyner 	u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
175ceebc2f3SEric Joyner #define I40E_CEE_APP_SELECTOR_MASK	0x03
176ceebc2f3SEric Joyner 	__be16 lower_oui;
177ceebc2f3SEric Joyner 	u8 prio_map;
178ceebc2f3SEric Joyner };
179ceebc2f3SEric Joyner #pragma pack()
180ceebc2f3SEric Joyner 
181ceebc2f3SEric Joyner /*
182ceebc2f3SEric Joyner  * TODO: The below structures related LLDP/DCBX variables
183ceebc2f3SEric Joyner  * and statistics are defined but need to find how to get
184ceebc2f3SEric Joyner  * the required information from the Firmware to use them
185ceebc2f3SEric Joyner  */
186ceebc2f3SEric Joyner 
187ceebc2f3SEric Joyner /* IEEE 802.1AB LLDP Agent Statistics */
188ceebc2f3SEric Joyner struct i40e_lldp_stats {
189ceebc2f3SEric Joyner 	u64 remtablelastchangetime;
190ceebc2f3SEric Joyner 	u64 remtableinserts;
191ceebc2f3SEric Joyner 	u64 remtabledeletes;
192ceebc2f3SEric Joyner 	u64 remtabledrops;
193ceebc2f3SEric Joyner 	u64 remtableageouts;
194ceebc2f3SEric Joyner 	u64 txframestotal;
195ceebc2f3SEric Joyner 	u64 rxframesdiscarded;
196ceebc2f3SEric Joyner 	u64 rxportframeerrors;
197ceebc2f3SEric Joyner 	u64 rxportframestotal;
198ceebc2f3SEric Joyner 	u64 rxporttlvsdiscardedtotal;
199ceebc2f3SEric Joyner 	u64 rxporttlvsunrecognizedtotal;
200ceebc2f3SEric Joyner 	u64 remtoomanyneighbors;
201ceebc2f3SEric Joyner };
202ceebc2f3SEric Joyner 
203ceebc2f3SEric Joyner /* IEEE 802.1Qaz DCBX variables */
204ceebc2f3SEric Joyner struct i40e_dcbx_variables {
205ceebc2f3SEric Joyner 	u32 defmaxtrafficclasses;
206ceebc2f3SEric Joyner 	u32 defprioritytcmapping;
207ceebc2f3SEric Joyner 	u32 deftcbandwidth;
208ceebc2f3SEric Joyner 	u32 deftsaassignment;
209ceebc2f3SEric Joyner };
210ceebc2f3SEric Joyner 
211ceebc2f3SEric Joyner enum i40e_status_code i40e_get_dcbx_status(struct i40e_hw *hw,
212ceebc2f3SEric Joyner 					   u16 *status);
213ceebc2f3SEric Joyner enum i40e_status_code i40e_lldp_to_dcb_config(u8 *lldpmib,
214ceebc2f3SEric Joyner 					      struct i40e_dcbx_config *dcbcfg);
215ceebc2f3SEric Joyner enum i40e_status_code i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,
216ceebc2f3SEric Joyner 					     u8 bridgetype,
217ceebc2f3SEric Joyner 					     struct i40e_dcbx_config *dcbcfg);
218ceebc2f3SEric Joyner enum i40e_status_code i40e_get_dcb_config(struct i40e_hw *hw);
219ceebc2f3SEric Joyner enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw);
220ceebc2f3SEric Joyner enum i40e_status_code i40e_set_dcb_config(struct i40e_hw *hw);
221ceebc2f3SEric Joyner enum i40e_status_code i40e_dcb_config_to_lldp(u8 *lldpmib, u16 *miblen,
222ceebc2f3SEric Joyner 					      struct i40e_dcbx_config *dcbcfg);
223ceebc2f3SEric Joyner 
224ceebc2f3SEric Joyner #endif /* _I40E_DCB_H_ */
225