1 /****************************************************************************** 2 3 Copyright (c) 2013-2018, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 34 #ifndef _I40E_ADMINQ_H_ 35 #define _I40E_ADMINQ_H_ 36 37 #include "i40e_osdep.h" 38 #include "i40e_status.h" 39 #include "i40e_adminq_cmd.h" 40 41 #define I40E_ADMINQ_DESC(R, i) \ 42 (&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) 43 44 #define I40E_ADMINQ_DESC_ALIGNMENT 4096 45 46 struct i40e_adminq_ring { 47 struct i40e_virt_mem dma_head; /* space for dma structures */ 48 struct i40e_dma_mem desc_buf; /* descriptor ring memory */ 49 struct i40e_virt_mem cmd_buf; /* command buffer memory */ 50 51 union { 52 struct i40e_dma_mem *asq_bi; 53 struct i40e_dma_mem *arq_bi; 54 } r; 55 56 u16 count; /* Number of descriptors */ 57 u16 rx_buf_len; /* Admin Receive Queue buffer length */ 58 59 /* used for interrupt processing */ 60 u16 next_to_use; 61 u16 next_to_clean; 62 63 /* used for queue tracking */ 64 u32 head; 65 u32 tail; 66 u32 len; 67 u32 bah; 68 u32 bal; 69 }; 70 71 /* ASQ transaction details */ 72 struct i40e_asq_cmd_details { 73 void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ 74 u64 cookie; 75 u16 flags_ena; 76 u16 flags_dis; 77 bool async; 78 bool postpone; 79 struct i40e_aq_desc *wb_desc; 80 }; 81 82 #define I40E_ADMINQ_DETAILS(R, i) \ 83 (&(((struct i40e_asq_cmd_details *)((R).cmd_buf.va))[i])) 84 85 /* ARQ event information */ 86 struct i40e_arq_event_info { 87 struct i40e_aq_desc desc; 88 u16 msg_len; 89 u16 buf_len; 90 u8 *msg_buf; 91 }; 92 93 /* Admin Queue information */ 94 struct i40e_adminq_info { 95 struct i40e_adminq_ring arq; /* receive queue */ 96 struct i40e_adminq_ring asq; /* send queue */ 97 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/ 98 u16 num_arq_entries; /* receive queue depth */ 99 u16 num_asq_entries; /* send queue depth */ 100 u16 arq_buf_size; /* receive queue buffer size */ 101 u16 asq_buf_size; /* send queue buffer size */ 102 u16 fw_maj_ver; /* firmware major version */ 103 u16 fw_min_ver; /* firmware minor version */ 104 u32 fw_build; /* firmware build number */ 105 u16 api_maj_ver; /* api major version */ 106 u16 api_min_ver; /* api minor version */ 107 108 struct i40e_spinlock asq_spinlock; /* Send queue spinlock */ 109 struct i40e_spinlock arq_spinlock; /* Receive queue spinlock */ 110 111 /* last status values on send and receive queues */ 112 enum i40e_admin_queue_err asq_last_status; 113 enum i40e_admin_queue_err arq_last_status; 114 }; 115 116 /** 117 * i40e_aq_rc_to_posix - convert errors to user-land codes 118 * aq_ret: AdminQ handler error code can override aq_rc 119 * aq_rc: AdminQ firmware error code to convert 120 **/ 121 static INLINE int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) 122 { 123 int aq_to_posix[] = { 124 0, /* I40E_AQ_RC_OK */ 125 -EPERM, /* I40E_AQ_RC_EPERM */ 126 -ENOENT, /* I40E_AQ_RC_ENOENT */ 127 -ESRCH, /* I40E_AQ_RC_ESRCH */ 128 -EINTR, /* I40E_AQ_RC_EINTR */ 129 -EIO, /* I40E_AQ_RC_EIO */ 130 -ENXIO, /* I40E_AQ_RC_ENXIO */ 131 -E2BIG, /* I40E_AQ_RC_E2BIG */ 132 -EAGAIN, /* I40E_AQ_RC_EAGAIN */ 133 -ENOMEM, /* I40E_AQ_RC_ENOMEM */ 134 -EACCES, /* I40E_AQ_RC_EACCES */ 135 -EFAULT, /* I40E_AQ_RC_EFAULT */ 136 -EBUSY, /* I40E_AQ_RC_EBUSY */ 137 -EEXIST, /* I40E_AQ_RC_EEXIST */ 138 -EINVAL, /* I40E_AQ_RC_EINVAL */ 139 -ENOTTY, /* I40E_AQ_RC_ENOTTY */ 140 -ENOSPC, /* I40E_AQ_RC_ENOSPC */ 141 -ENOSYS, /* I40E_AQ_RC_ENOSYS */ 142 -ERANGE, /* I40E_AQ_RC_ERANGE */ 143 -EPIPE, /* I40E_AQ_RC_EFLUSHED */ 144 -ESPIPE, /* I40E_AQ_RC_BAD_ADDR */ 145 -EROFS, /* I40E_AQ_RC_EMODE */ 146 -EFBIG, /* I40E_AQ_RC_EFBIG */ 147 }; 148 149 /* aq_rc is invalid if AQ timed out */ 150 if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT) 151 return -EAGAIN; 152 153 if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) 154 return -ERANGE; 155 156 return aq_to_posix[aq_rc]; 157 } 158 159 /* general information */ 160 #define I40E_AQ_LARGE_BUF 512 161 #define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */ 162 163 void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, 164 u16 opcode); 165 166 #endif /* _I40E_ADMINQ_H_ */ 167