xref: /freebsd/sys/dev/ixgbe/ixgbe_osdep.h (revision 6486b015fc84e96725fef22b0e3363351399ae83)
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3   Copyright (c) 2001-2012, Intel Corporation
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32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _IXGBE_OS_H_
36 #define _IXGBE_OS_H_
37 
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/bus.h>
48 #include <machine/bus.h>
49 #include <sys/rman.h>
50 #include <machine/resource.h>
51 #include <vm/vm.h>
52 #include <vm/pmap.h>
53 #include <machine/clock.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
56 
57 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
58 
59 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
60 #define usec_delay(x) DELAY(x)
61 #define msec_delay(x) DELAY(1000*(x))
62 
63 #define DBG 0
64 #define MSGOUT(S, A, B)     printf(S "\n", A, B)
65 #define DEBUGFUNC(F)        DEBUGOUT(F);
66 #if DBG
67 	#define DEBUGOUT(S)         printf(S "\n")
68 	#define DEBUGOUT1(S,A)      printf(S "\n",A)
69 	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
70 	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
71 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
72 #else
73 	#define DEBUGOUT(S)
74 	#define DEBUGOUT1(S,A)
75 	#define DEBUGOUT2(S,A,B)
76 	#define DEBUGOUT3(S,A,B,C)
77 	#define DEBUGOUT6(S,A,B,C,D,E,F)
78 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
79 #endif
80 
81 #define FALSE               0
82 #define false               0 /* shared code requires this */
83 #define TRUE                1
84 #define true                1
85 #define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
86 #define PCI_COMMAND_REGISTER            PCIR_COMMAND
87 
88 /* Bunch of defines for shared code bogosity */
89 #define UNREFERENCED_PARAMETER(_p)
90 #define UNREFERENCED_1PARAMETER(_p)
91 #define UNREFERENCED_2PARAMETER(_p, _q)
92 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
93 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
94 
95 
96 #define IXGBE_NTOHL(_i)	ntohl(_i)
97 #define IXGBE_NTOHS(_i)	ntohs(_i)
98 
99 /* XXX these need to be revisited */
100 #define IXGBE_CPU_TO_LE32 le32toh
101 #define IXGBE_LE32_TO_CPUS le32dec
102 
103 typedef uint8_t		u8;
104 typedef int8_t		s8;
105 typedef uint16_t	u16;
106 typedef uint32_t	u32;
107 typedef int32_t		s32;
108 typedef uint64_t	u64;
109 #ifndef __bool_true_false_are_defined
110 typedef boolean_t	bool;
111 #endif
112 
113 #define le16_to_cpu
114 
115 #if __FreeBSD_version < 800000
116 #if defined(__i386__) || defined(__amd64__)
117 #define mb()	__asm volatile("mfence" ::: "memory")
118 #define wmb()	__asm volatile("sfence" ::: "memory")
119 #define rmb()	__asm volatile("lfence" ::: "memory")
120 #else
121 #define mb()
122 #define rmb()
123 #define wmb()
124 #endif
125 #endif
126 
127 #if defined(__i386__) || defined(__amd64__)
128 static __inline
129 void prefetch(void *x)
130 {
131 	__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
132 }
133 #else
134 #define prefetch(x)
135 #endif
136 
137 struct ixgbe_osdep
138 {
139 	bus_space_tag_t    mem_bus_space_tag;
140 	bus_space_handle_t mem_bus_space_handle;
141 	struct device     *dev;
142 };
143 
144 /* These routines are needed by the shared code */
145 struct ixgbe_hw;
146 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
147 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
148 
149 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
150 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
151 
152 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
153 
154 #define IXGBE_READ_REG(a, reg) (\
155    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
156                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
157                      reg))
158 
159 #define IXGBE_WRITE_REG(a, reg, value) (\
160    bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
161                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
162                      reg, value))
163 
164 
165 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
166    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
167                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
168                      (reg + ((offset) << 2))))
169 
170 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
171       bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
172                       ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
173                       (reg + ((offset) << 2)), value))
174 
175 
176 #endif /* _IXGBE_OS_H_ */
177