1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2020, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 35 #ifndef _IXGBE_OSDEP_H_ 36 #define _IXGBE_OSDEP_H_ 37 38 #include <sys/types.h> 39 #include <sys/param.h> 40 #include <sys/endian.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/protosw.h> 44 #include <sys/socket.h> 45 #include <sys/malloc.h> 46 #include <sys/kernel.h> 47 #include <sys/bus.h> 48 #include <machine/bus.h> 49 #include <sys/rman.h> 50 #include <machine/resource.h> 51 #include <vm/vm.h> 52 #include <vm/pmap.h> 53 #include <machine/clock.h> 54 #include <dev/pci/pcivar.h> 55 #include <dev/pci/pcireg.h> 56 57 #define ASSERT(x) if(!(x)) panic("IXGBE: x") 58 #define EWARN(H, W) printf(W) 59 60 enum { 61 IXGBE_ERROR_SOFTWARE, 62 IXGBE_ERROR_POLLING, 63 IXGBE_ERROR_INVALID_STATE, 64 IXGBE_ERROR_UNSUPPORTED, 65 IXGBE_ERROR_ARGUMENT, 66 IXGBE_ERROR_CAUTION, 67 }; 68 69 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 70 #define usec_delay(x) DELAY(x) 71 #define msec_delay(x) DELAY(1000*(x)) 72 73 #define DBG 0 74 #define MSGOUT(S, A, B) printf(S "\n", A, B) 75 #define DEBUGFUNC(F) DEBUGOUT(F); 76 #if DBG 77 #define DEBUGOUT(S) printf(S "\n") 78 #define DEBUGOUT1(S,A) printf(S "\n",A) 79 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 80 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 81 #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D) 82 #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E) 83 #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F) 84 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 85 #define ERROR_REPORT1 ERROR_REPORT 86 #define ERROR_REPORT2 ERROR_REPORT 87 #define ERROR_REPORT3 ERROR_REPORT 88 #define ERROR_REPORT(level, format, arg...) do { \ 89 switch (level) { \ 90 case IXGBE_ERROR_SOFTWARE: \ 91 case IXGBE_ERROR_CAUTION: \ 92 case IXGBE_ERROR_POLLING: \ 93 case IXGBE_ERROR_INVALID_STATE: \ 94 case IXGBE_ERROR_UNSUPPORTED: \ 95 case IXGBE_ERROR_ARGUMENT: \ 96 device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \ 97 break; \ 98 default: \ 99 break; \ 100 } \ 101 } while (0) 102 #else 103 #define DEBUGOUT(S) 104 #define DEBUGOUT1(S,A) 105 #define DEBUGOUT2(S,A,B) 106 #define DEBUGOUT3(S,A,B,C) 107 #define DEBUGOUT4(S,A,B,C,D) 108 #define DEBUGOUT5(S,A,B,C,D,E) 109 #define DEBUGOUT6(S,A,B,C,D,E,F) 110 #define DEBUGOUT7(S,A,B,C,D,E,F,G) 111 112 #define ERROR_REPORT1(S,A) 113 #define ERROR_REPORT2(S,A,B) 114 #define ERROR_REPORT3(S,A,B,C) 115 #endif 116 117 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 118 #define PCI_COMMAND_REGISTER PCIR_COMMAND 119 120 /* Shared code dropped this define.. */ 121 #define IXGBE_INTEL_VENDOR_ID 0x8086 122 123 /* Bunch of defines for shared code bogosity */ 124 #define UNREFERENCED_PARAMETER(_p) 125 #define UNREFERENCED_1PARAMETER(_p) 126 #define UNREFERENCED_2PARAMETER(_p, _q) 127 #define UNREFERENCED_3PARAMETER(_p, _q, _r) 128 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 129 130 #define IXGBE_NTOHL(_i) ntohl(_i) 131 #define IXGBE_NTOHS(_i) ntohs(_i) 132 133 /* XXX these need to be revisited */ 134 #define IXGBE_CPU_TO_LE16 htole16 135 #define IXGBE_CPU_TO_LE32 htole32 136 #define IXGBE_LE32_TO_CPU le32toh 137 #define IXGBE_LE32_TO_CPUS(x) *(x) = le32dec(x) 138 #define IXGBE_CPU_TO_BE16 htobe16 139 #define IXGBE_CPU_TO_BE32 htobe32 140 #define IXGBE_BE32_TO_CPU be32toh 141 142 typedef uint8_t u8; 143 typedef int8_t s8; 144 typedef uint16_t u16; 145 typedef int16_t s16; 146 typedef uint32_t u32; 147 typedef int32_t s32; 148 typedef uint64_t u64; 149 #ifndef __bool_true_false_are_defined 150 typedef boolean_t bool; 151 #endif 152 153 /* shared code requires this */ 154 #define __le16 u16 155 #define __le32 u32 156 #define __le64 u64 157 #define __be16 u16 158 #define __be32 u32 159 #define __be64 u64 160 161 #define le16_to_cpu 162 163 #if defined(__i386__) || defined(__amd64__) 164 static __inline 165 void prefetch(void *x) 166 { 167 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 168 } 169 #else 170 #define prefetch(x) 171 #endif 172 173 /* 174 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes 175 * non-overlapping regions and 32-byte padding on both src and dst. 176 */ 177 static __inline int 178 ixgbe_bcopy(void *restrict _src, void *restrict _dst, int l) 179 { 180 uint64_t *src = _src; 181 uint64_t *dst = _dst; 182 183 for (; l > 0; l -= 32) { 184 *dst++ = *src++; 185 *dst++ = *src++; 186 *dst++ = *src++; 187 *dst++ = *src++; 188 } 189 return (0); 190 } 191 192 struct ixgbe_osdep 193 { 194 bus_space_tag_t mem_bus_space_tag; 195 bus_space_handle_t mem_bus_space_handle; 196 }; 197 198 /* These routines need struct ixgbe_hw declared */ 199 struct ixgbe_hw; 200 201 /* These routines are needed by the shared code */ 202 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 203 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 204 205 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 206 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 207 208 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 209 210 extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32); 211 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg(a, reg) 212 213 extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32); 214 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val) 215 216 extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32); 217 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \ 218 ixgbe_read_reg_array(a, reg, offset) 219 220 extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32); 221 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \ 222 ixgbe_write_reg_array(a, reg, offset, val) 223 224 #endif /* _IXGBE_OSDEP_H_ */ 225