xref: /freebsd/sys/dev/ixgbe/ixgbe_osdep.h (revision 39beb93c3f8bdbf72a61fda42300b5ebed7390c8)
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3   Copyright (c) 2001-2008, Intel Corporation
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32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _IXGBE_OS_H_
36 #define _IXGBE_OS_H_
37 
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/mbuf.h>
42 #include <sys/protosw.h>
43 #include <sys/socket.h>
44 #include <sys/malloc.h>
45 #include <sys/kernel.h>
46 #include <sys/bus.h>
47 #include <machine/bus.h>
48 #include <sys/rman.h>
49 #include <machine/resource.h>
50 #include <vm/vm.h>
51 #include <vm/pmap.h>
52 #include <machine/clock.h>
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pcireg.h>
55 
56 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
57 
58 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
59 #define usec_delay(x) DELAY(x)
60 #define msec_delay(x) DELAY(1000*(x))
61 
62 #define DBG 0
63 #define MSGOUT(S, A, B)     printf(S "\n", A, B)
64 #define DEBUGFUNC(F)        DEBUGOUT(F);
65 #if DBG
66 	#define DEBUGOUT(S)         printf(S "\n")
67 	#define DEBUGOUT1(S,A)      printf(S "\n",A)
68 	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
69 	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
70 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
71 #else
72 	#define DEBUGOUT(S)
73 	#define DEBUGOUT1(S,A)
74 	#define DEBUGOUT2(S,A,B)
75 	#define DEBUGOUT3(S,A,B,C)
76 	#define DEBUGOUT6(S,A,B,C,D,E,F)
77 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
78 #endif
79 
80 #define FALSE               0
81 #define false               0 /* shared code requires this */
82 #define TRUE                1
83 #define true                1
84 #define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
85 #define PCI_COMMAND_REGISTER            PCIR_COMMAND
86 
87 #define IXGBE_HTONL	htonl
88 
89 typedef uint8_t		u8;
90 typedef int8_t		s8;
91 typedef uint16_t	u16;
92 typedef uint32_t	u32;
93 typedef int32_t		s32;
94 typedef uint64_t	u64;
95 typedef boolean_t	bool;
96 
97 #define le16_to_cpu
98 
99 #if defined(__i386__) || defined(__amd64__)
100 #define mb()	__asm volatile("mfence" ::: "memory")
101 #define wmb()	__asm volatile("sfence" ::: "memory")
102 #define rmb()	__asm volatile("lfence" ::: "memory")
103 #else
104 #define mb()
105 #define rmb()
106 #define wmb()
107 #endif
108 
109 struct ixgbe_osdep
110 {
111 	bus_space_tag_t    mem_bus_space_tag;
112 	bus_space_handle_t mem_bus_space_handle;
113 	struct device     *dev;
114 };
115 
116 /* This is needed by the shared code */
117 struct ixgbe_hw;
118 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
119 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
120 
121 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
122 
123 #define IXGBE_READ_REG(a, reg) (\
124    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
125                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
126                      reg))
127 
128 #define IXGBE_WRITE_REG(a, reg, value) (\
129    bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
130                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
131                      reg, value))
132 
133 
134 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
135    bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
136                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
137                      (reg + ((offset) << 2))))
138 
139 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
140       bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
141                       ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
142                       (reg + ((offset) << 2)), value))
143 
144 
145 #endif /* _IXGBE_OS_H_ */
146