1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2020, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 /*$FreeBSD$*/ 35 36 #ifndef _IXGBE_OSDEP_H_ 37 #define _IXGBE_OSDEP_H_ 38 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/endian.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/bus.h> 49 #include <machine/bus.h> 50 #include <sys/rman.h> 51 #include <machine/resource.h> 52 #include <vm/vm.h> 53 #include <vm/pmap.h> 54 #include <machine/clock.h> 55 #include <dev/pci/pcivar.h> 56 #include <dev/pci/pcireg.h> 57 58 #define ASSERT(x) if(!(x)) panic("IXGBE: x") 59 #define EWARN(H, W) printf(W) 60 61 enum { 62 IXGBE_ERROR_SOFTWARE, 63 IXGBE_ERROR_POLLING, 64 IXGBE_ERROR_INVALID_STATE, 65 IXGBE_ERROR_UNSUPPORTED, 66 IXGBE_ERROR_ARGUMENT, 67 IXGBE_ERROR_CAUTION, 68 }; 69 70 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 71 #define usec_delay(x) DELAY(x) 72 #define msec_delay(x) DELAY(1000*(x)) 73 74 #define DBG 0 75 #define MSGOUT(S, A, B) printf(S "\n", A, B) 76 #define DEBUGFUNC(F) DEBUGOUT(F); 77 #if DBG 78 #define DEBUGOUT(S) printf(S "\n") 79 #define DEBUGOUT1(S,A) printf(S "\n",A) 80 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 81 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 82 #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D) 83 #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E) 84 #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F) 85 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 86 #define ERROR_REPORT1 ERROR_REPORT 87 #define ERROR_REPORT2 ERROR_REPORT 88 #define ERROR_REPORT3 ERROR_REPORT 89 #define ERROR_REPORT(level, format, arg...) do { \ 90 switch (level) { \ 91 case IXGBE_ERROR_SOFTWARE: \ 92 case IXGBE_ERROR_CAUTION: \ 93 case IXGBE_ERROR_POLLING: \ 94 case IXGBE_ERROR_INVALID_STATE: \ 95 case IXGBE_ERROR_UNSUPPORTED: \ 96 case IXGBE_ERROR_ARGUMENT: \ 97 device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \ 98 break; \ 99 default: \ 100 break; \ 101 } \ 102 } while (0) 103 #else 104 #define DEBUGOUT(S) 105 #define DEBUGOUT1(S,A) 106 #define DEBUGOUT2(S,A,B) 107 #define DEBUGOUT3(S,A,B,C) 108 #define DEBUGOUT4(S,A,B,C,D) 109 #define DEBUGOUT5(S,A,B,C,D,E) 110 #define DEBUGOUT6(S,A,B,C,D,E,F) 111 #define DEBUGOUT7(S,A,B,C,D,E,F,G) 112 113 #define ERROR_REPORT1(S,A) 114 #define ERROR_REPORT2(S,A,B) 115 #define ERROR_REPORT3(S,A,B,C) 116 #endif 117 118 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 119 #define PCI_COMMAND_REGISTER PCIR_COMMAND 120 121 /* Shared code dropped this define.. */ 122 #define IXGBE_INTEL_VENDOR_ID 0x8086 123 124 /* Bunch of defines for shared code bogosity */ 125 #define UNREFERENCED_PARAMETER(_p) 126 #define UNREFERENCED_1PARAMETER(_p) 127 #define UNREFERENCED_2PARAMETER(_p, _q) 128 #define UNREFERENCED_3PARAMETER(_p, _q, _r) 129 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 130 131 #define IXGBE_NTOHL(_i) ntohl(_i) 132 #define IXGBE_NTOHS(_i) ntohs(_i) 133 134 /* XXX these need to be revisited */ 135 #define IXGBE_CPU_TO_LE16 htole16 136 #define IXGBE_CPU_TO_LE32 htole32 137 #define IXGBE_LE32_TO_CPU le32toh 138 #define IXGBE_LE32_TO_CPUS(x) 139 #define IXGBE_CPU_TO_BE16 htobe16 140 #define IXGBE_CPU_TO_BE32 htobe32 141 #define IXGBE_BE32_TO_CPU be32toh 142 143 typedef uint8_t u8; 144 typedef int8_t s8; 145 typedef uint16_t u16; 146 typedef int16_t s16; 147 typedef uint32_t u32; 148 typedef int32_t s32; 149 typedef uint64_t u64; 150 #ifndef __bool_true_false_are_defined 151 typedef boolean_t bool; 152 #endif 153 154 /* shared code requires this */ 155 #define __le16 u16 156 #define __le32 u32 157 #define __le64 u64 158 #define __be16 u16 159 #define __be32 u32 160 #define __be64 u64 161 162 #define le16_to_cpu 163 164 #if __FreeBSD_version < 800000 165 #if defined(__i386__) || defined(__amd64__) 166 #define mb() __asm volatile("mfence" ::: "memory") 167 #define wmb() __asm volatile("sfence" ::: "memory") 168 #define rmb() __asm volatile("lfence" ::: "memory") 169 #else 170 #define mb() 171 #define rmb() 172 #define wmb() 173 #endif 174 #endif 175 176 #if defined(__i386__) || defined(__amd64__) 177 static __inline 178 void prefetch(void *x) 179 { 180 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 181 } 182 #else 183 #define prefetch(x) 184 #endif 185 186 /* 187 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes 188 * non-overlapping regions and 32-byte padding on both src and dst. 189 */ 190 static __inline int 191 ixgbe_bcopy(void *restrict _src, void *restrict _dst, int l) 192 { 193 uint64_t *src = _src; 194 uint64_t *dst = _dst; 195 196 for (; l > 0; l -= 32) { 197 *dst++ = *src++; 198 *dst++ = *src++; 199 *dst++ = *src++; 200 *dst++ = *src++; 201 } 202 return (0); 203 } 204 205 struct ixgbe_osdep 206 { 207 bus_space_tag_t mem_bus_space_tag; 208 bus_space_handle_t mem_bus_space_handle; 209 }; 210 211 /* These routines need struct ixgbe_hw declared */ 212 struct ixgbe_hw; 213 214 /* These routines are needed by the shared code */ 215 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 216 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 217 218 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 219 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 220 221 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 222 223 extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32); 224 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg(a, reg) 225 226 extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32); 227 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val) 228 229 extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32); 230 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \ 231 ixgbe_read_reg_array(a, reg, offset) 232 233 extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32); 234 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \ 235 ixgbe_write_reg_array(a, reg, offset, val) 236 237 #endif /* _IXGBE_OSDEP_H_ */ 238