1 /****************************************************************************** 2 3 Copyright (c) 2001-2020, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 34 #include "ixgbe.h" 35 36 inline device_t 37 ixgbe_dev_from_hw(struct ixgbe_hw *hw) 38 { 39 return ((struct ixgbe_softc *)hw->back)->dev; 40 } 41 42 inline u8 43 ixgbe_read_pci_cfg_byte(struct ixgbe_hw *hw, u32 reg) 44 { 45 return (pci_read_config(ixgbe_dev_from_hw(hw), reg, 1)); 46 } 47 48 inline u16 49 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg) 50 { 51 return (pci_read_config(ixgbe_dev_from_hw(hw), reg, 2)); 52 } 53 54 inline void 55 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value) 56 { 57 pci_write_config(((struct ixgbe_softc *)hw->back)->dev, reg, value, 2); 58 } 59 60 inline u32 61 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) 62 { 63 return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 64 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, reg); 65 } 66 67 inline void 68 ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val) 69 { 70 bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 71 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 72 reg, val); 73 } 74 75 inline u32 76 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset) 77 { 78 return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 79 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 80 reg + (offset << 2)); 81 } 82 83 inline void 84 ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val) 85 { 86 bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 87 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 88 reg + (offset << 2), val); 89 } 90 91 uint64_t 92 ixgbe_link_speed_to_baudrate(ixgbe_link_speed speed) 93 { 94 uint64_t baudrate; 95 96 switch (speed) { 97 case IXGBE_LINK_SPEED_10GB_FULL: 98 baudrate = IF_Gbps(10); 99 break; 100 case IXGBE_LINK_SPEED_5GB_FULL: 101 baudrate = IF_Gbps(5); 102 break; 103 case IXGBE_LINK_SPEED_2_5GB_FULL: 104 baudrate = IF_Mbps(2500); 105 break; 106 case IXGBE_LINK_SPEED_1GB_FULL: 107 baudrate = IF_Gbps(1); 108 break; 109 case IXGBE_LINK_SPEED_100_FULL: 110 baudrate = IF_Mbps(100); 111 break; 112 case IXGBE_LINK_SPEED_10_FULL: 113 baudrate = IF_Mbps(10); 114 break; 115 case IXGBE_LINK_SPEED_UNKNOWN: 116 default: 117 baudrate = 0; 118 break; 119 } 120 121 return baudrate; 122 } 123 124 void 125 ixgbe_init_lock(struct ixgbe_lock *lock) 126 { 127 mtx_init(&lock->mutex, "mutex", 128 "ixgbe ACI lock", MTX_DEF | MTX_DUPOK); 129 } 130 131 void 132 ixgbe_acquire_lock(struct ixgbe_lock *lock) 133 { 134 mtx_lock(&lock->mutex); 135 } 136 137 void 138 ixgbe_release_lock(struct ixgbe_lock *lock) 139 { 140 mtx_unlock(&lock->mutex); 141 } 142 143 void 144 ixgbe_destroy_lock(struct ixgbe_lock *lock) 145 { 146 if (mtx_initialized(&lock->mutex)) 147 mtx_destroy(&lock->mutex); 148 } 149 150 /** 151 * ixgbe_info_fwlog - Format and print an array of values to the console 152 * @hw: private hardware structure 153 * @rowsize: preferred number of rows to use 154 * @groupsize: preferred size in bytes to print each chunk 155 * @buf: the array buffer to print 156 * @len: size of the array buffer 157 * 158 * Format the given array as a series of uint8_t values with hexadecimal 159 * notation and log the contents to the console log. This variation is 160 * specific to firmware logging. 161 * 162 * TODO: Currently only supports a group size of 1, due to the way hexdump is 163 * implemented. 164 */ 165 void 166 ixgbe_info_fwlog(struct ixgbe_hw *hw, uint32_t rowsize, uint32_t __unused groupsize, 167 uint8_t *buf, size_t len) 168 { 169 device_t dev = ((struct ixgbe_softc *)hw->back)->dev; 170 char prettyname[20]; 171 172 if (!ixgbe_fwlog_supported(hw)) 173 return; 174 175 /* Format the device header to a string */ 176 snprintf(prettyname, sizeof(prettyname), "%s: FWLOG: ", 177 device_get_nameunit(dev)); 178 179 /* Make sure the row-size isn't too large */ 180 if (rowsize > 0xFF) 181 rowsize = 0xFF; 182 183 hexdump(buf, len, prettyname, HD_OMIT_CHARS | rowsize); 184 } 185