1 /****************************************************************************** 2 3 Copyright (c) 2001-2020, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #include "ixgbe.h" 36 37 inline u16 38 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg) 39 { 40 return pci_read_config(((struct ixgbe_softc *)hw->back)->dev, reg, 2); 41 } 42 43 inline void 44 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value) 45 { 46 pci_write_config(((struct ixgbe_softc *)hw->back)->dev, reg, value, 2); 47 } 48 49 inline u32 50 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) 51 { 52 return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 53 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, reg); 54 } 55 56 inline void 57 ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val) 58 { 59 bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 60 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 61 reg, val); 62 } 63 64 inline u32 65 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset) 66 { 67 return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 68 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 69 reg + (offset << 2)); 70 } 71 72 inline void 73 ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val) 74 { 75 bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag, 76 ((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, 77 reg + (offset << 2), val); 78 } 79